JPS60111449A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS60111449A
JPS60111449A JP58219961A JP21996183A JPS60111449A JP S60111449 A JPS60111449 A JP S60111449A JP 58219961 A JP58219961 A JP 58219961A JP 21996183 A JP21996183 A JP 21996183A JP S60111449 A JPS60111449 A JP S60111449A
Authority
JP
Japan
Prior art keywords
semiconductor element
leads
semiconductor
element mounting
lead frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58219961A
Other languages
English (en)
Inventor
Masakazu Matsushima
松島　政数
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP58219961A priority Critical patent/JPS60111449A/ja
Publication of JPS60111449A publication Critical patent/JPS60111449A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49503—Lead-frames or other flat leads characterised by the die pad
    • H01L23/4951—Chip-on-leads or leads-on-chip techniques, i.e. inner lead fingers being used as die pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3201—Structure
    • H01L2224/32012—Structure relative to the bonding area, e.g. bond pad
    • H01L2224/32014—Structure relative to the bonding area, e.g. bond pad the layer connector being smaller than the bonding area, e.g. bond pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 本発明は半導体装置に関し、特に半導体装置の組立て構
造に関するものである。
近年、トランスファー樹脂モールド型の半導体装置が多
用されており、この種の半導体装置では、銅系、コバー
ル、又は鉄等の金楓板を打抜法や化学エツチング法にて
リードフレーム（ベースリボン）全形成し、リードフレ
ームの素子搭載部に半導体素子を接着し、そしてワイヤ
ポンディングを施して樹脂モールドを行っている。
すなわち、第１図Ａ、Ｂ図に示すように、半導体素子搭
載部ｌおよびその周辺ｌから外部に延びる複数の外部導
出リード２を有するリードフレーム１０を用意し、半導
体素子搭載部ｌに半導体素子３を導電ペースト４にて搭
載した後、半導体素子３の電極と外部導出リード２とを
金属細線５にてワイヤ結線する。そしてモールド境界７
に沿って樹脂封止される。このような半導体装置におい
ては、半導体素子搭載部ｌＱサイズによって搭載する半
導体素子３のサイズを制限してしまう。すなわち、同型
パッケージにおいて、半導体素子搭載部サイズの異なる
リードフレーム（ベースリボン）が多種になってしまう
欠点がおる。少量多種となるため、コスト面、生韮性に
おいても量産効果に欠ける。さらに、半導体素子設計、
ベースリボン設計においても制限される欠点がある。
本発明の目的は、を並性、設計性に優れた組立構造を有
する半導体装置を提供することにある。
本発明は、素子搭載部を取り除き、各リード線を内部に
まで延在形成し、半導体素子を各リード線にまたがって
搭載するようにしたことを特徴とし、以下１図面によｐ
本発明の実施例を詳述する。
第２図に本発明の一実施例を示す。第２図ａから明らか
なように、本実施例によるリードフレームは半導体素子
搭載部が設けられておらず、各リード２はさらに内部に
延在形成されている。各リード２のモールド境界７の内
部にある内部リード部分（インナーリード）２′にまた
がって、例えは市販されているエポキシ樹脂ペースト等
の絶琢ペースト６金用いて半導体索子３が搭載されてい
る。
したがって、従来のように半導体素子搭載部サイズによ
って搭載する半導体素子サイズが制限されるという欠点
はなくなる。この結果、同型パッケージにおいてに、リ
ードフレーム（ペースリボン）は統合でき、且つ、コス
トも安価になり、生産性も向上する。又、半導体素子搭
載部がないので半導体素子の設計、ベー　スリボンの設
計が非常に容易となる。さらに、従来のように素子搭載
部を保持する保持リードが不要となり、それだけ樹脂と
金属との界面からの水分浸入も少なくなり耐湿性にも効
果がある。さらにまた、素子搭載部への貴金属メッキが
不要となるという効果もおる。
第３図は本発明の他の実施例を示す。第２図では、樹脂
内部におるインナーリード部分２′は平坦に形成されて
いた。このため、絶縁ペースト等の搭載材６が内部リー
ド部分２′のワイヤ結線領域まで広がることがアリ、こ
の結果、ワイヤボンド不良がおきたりワイヤハガレが生
じたりする等特性。
品質面に悪影響金及はす場合があｐ得る。また。
半導体素子３と内部リード部分２′との高低差が大きい
ために半導体素子３のエツジにワイヤ５が接触する危険
性がめる。
第３図は、これらの起こり得る障害をも取り除くため、
第３図（ｂ）から明らかなように、内部り−ド部分２′
に段差を設け、低くなつｆｃ部分８に半導体素子３を搭
載している。ボンディングワイヤ５は高い平坦部９に結
線されている。
したがって、ワイヤ結線領域９への絶縁ペースト等の搭
載材６の広がりを防ぐことが出来る。さらに、ワイヤ結
線領域９と搭載後の半導体素子３との高低差が小さくな
るか、もしくは搭載した半導体素子３の高さがワイヤ結
線領域９の高さより低くなるため、半導体素子３のエツ
ジにワイヤ５がタッチすることがなくなる。これらによ
シ特性。
品質面共に安定した半導体装置全提供することが出来る
。
【図面の簡単な説明】
第１図は従来の半導体装置を示し％Ａはその平面図％Ｂ
は断面図である。第２図は本発明の一実施例でおり、ａ
はリードフレーム平面図１．　ｂは素子搭載後の平面図
を、Ｃはその断面図をそれぞれ示す。第３図は他の実施
例で、ａはリードフレーム平面図ｔ％　ｂはベレット搭
載後の断面図をそ５− れぞれ示す。 ｌ・・・・・・素子搭載部、２・・川・リード線、３・
・・・・・半導体素子、４・・・・・・導電性ペースト
、５・・・・・・ワイヤ、６・・・・・・絶縁ペースト
、７・・・・・・モールドｍ界、　２’・・・・・・内
部リード部分、８・・・・・・一段低いリード部分、９
・・・・・・ワイヤ結線領域、ｉｏ・・団・リードフレ
ーム。 ６−

Claims (2)

    【特許請求の範囲】
  1. （１）それぞれがインナーリード部分およびアウターリ
    ード部分を有する複数のリードと、複数のリードのイン
    ナーリード部分にまたがって搭載された半導体素子とを
    有することを特徴とする半導体装置。
  2. （２）前記各インナーリード部分に段差が設けられてお
    り、前記半導体素子は低くなったインナーリード部分に
    搭載されていることを特徴とする特許請求の範囲第１項
    記載の半導体装置。
JP58219961A 1983-11-22 1983-11-22 半導体装置 Pending JPS60111449A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58219961A JPS60111449A (ja) 1983-11-22 1983-11-22 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58219961A JPS60111449A (ja) 1983-11-22 1983-11-22 半導体装置

Publications (1)

Publication Number Publication Date
JPS60111449A true JPS60111449A (ja) 1985-06-17

Family

ID=16743746

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58219961A Pending JPS60111449A (ja) 1983-11-22 1983-11-22 半導体装置

Country Status (1)

Country Link
JP (1) JPS60111449A (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0228966A (ja) * 1988-07-19 1990-01-31 Seiko Epson Corp 半導体装置
US5126821A (en) * 1985-03-25 1992-06-30 Hitachi, Ltd. Semiconductor device having inner leads extending over a surface of a semiconductor pellet

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5126821A (en) * 1985-03-25 1992-06-30 Hitachi, Ltd. Semiconductor device having inner leads extending over a surface of a semiconductor pellet
JPH0228966A (ja) * 1988-07-19 1990-01-31 Seiko Epson Corp 半導体装置

Similar Documents

Publication Publication Date Title
KR100369393B1 (ko) 리드프레임 및 이를 이용한 반도체패키지와 그 제조 방법
US6175149B1 (en) Mounting multiple semiconductor dies in a package
US7321162B1 (en) Semiconductor package having reduced thickness
KR100355794B1 (ko) 리드프레임 및 이를 이용한 반도체패키지
US6396129B1 (en) Leadframe with dot array of silver-plated regions on die pad for use in exposed-pad semiconductor package
JP2560974B2 (ja) 半導体装置
JP2008135688A (ja) 半導体装置および半導体装置の製造方法
JPH06252328A (ja) 半導体素子搭載用のリードフレーム
JP2002198482A (ja) 半導体装置およびその製造方法
KR200489837Y1 (ko) 예비성형된 범용 리드 프레임 장치
US7102208B1 (en) Leadframe and semiconductor package with improved solder joint strength
JPS60111449A (ja) 半導体装置
JP2003297994A5 (ja)
JP2002076234A (ja) 樹脂封止型半導体装置
JP3134445B2 (ja) 樹脂封止型半導体装置
KR0132404Y1 (ko) 반도체 패키지
KR200295664Y1 (ko) 적층형반도체패키지
KR100753409B1 (ko) 초박형 패키지 및 그 제조방법
JPS6120770Y2 (ja)
JPH01255259A (ja) 樹脂封止型半導体装置
JPH0498861A (ja) 樹脂封止型半導体装置
JP3015458B2 (ja) リードフレームを用いた半導体装置の製造方法
JPS62120035A (ja) 樹脂封止型半導体装置の製造方法
JPS60161643A (ja) 半導体装置
JPH06326234A (ja) 半導体装置用リードフレームおよび前記リードフレームを使用した半導体装置