JPS59915A - Method of producing laminated circuit part - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] The present invention relates to a method for manufacturing a laminated circuit component, and is intended to construct a highly integrated electric circuit in a circuit having a titanium oxide type or barium titanate type capacitor having a dielectric constant. be.

Generally, magnetic capacitors are widely used in electronic circuits due to their high performance and reliability. Recent advances in packaging technology have been remarkable, and leadless components such as chip capacitors and chip resistors have been put into practical use and widely used. Particularly, in the field of chip capacitors, with the development of the green sheet method, which is a ceramic manufacturing technology, compact, high-capacity capacitors have been realized as multilayer capacitors. Materials with high dielectric constants are used as magnetic capacitors.

These chip components, together with semiconductor components, play an important role in making electronic devices smaller and more dense. In order to realize higher density mounting of the many used ceramic capacitors, configuring multiple capacitors on one chip increases the mounting density and the ground terminal is internal McT! Since the terminal 11E can be used in common with other terminals, the number of poles of the terminal 11E can be reduced compared to when a single-function chip capacitor is used. The next step would be to construct a functional circuit using the surface of the ceramic capacitor. At this time, a distributed capacitance was generated between the electrodes at the moment when the capacitor had a high tjlt rate, which caused a problem in the circuit. A method to solve this problem is to provide an insulating layer such as a recrystallized sintered low-temperature glass layer in the necessary parts of the MIIE element, and to provide a resistor on this insulating layer.
No. 8-18015), or a layer of a weak dielectric material whose thermal expansion is almost the same as that of the dielectric element is formed almost entirely on the dielectric element, and a layer of R, which is formed over the weak dielectric layer, straddles the capacitor itself. Techniques such as a method for mounting electric components such as IC elements (Japanese Patent Publication No. 46-40129) are available. This will be explained using the schematic diagram of FIG. In Figure 1 (1
) is a dielectric layer, (2) is an internal electrode, (3 is a wiring electrode,
(April J thick film resistor, (6) is a semiconductor element, (6) is a low dielectric constant layer (glass), a low @ heavy layer (6) such as glass is placed on the dielectric layer (1) By providing wiring electrodes (
3), thick film resistor (4), and semiconductor element (6) with dielectric layer (
1) The structure is such that it does not come into direct contact with. This method is effective when configuring only a planar circuit, but when configuring an eight-dimensional circuit, for example, when the circuit is mounted on both sides of the dielectric layer (1), or when configuring a planar circuit and mounting the circuit on both sides of the dielectric layer (1).
One example is when a signal circuit is configured through the end of the board to the motherboard (printed circuit board). In either case, it is necessary to take the end of the dielectric layer (1) as a wiring route, and if this continues, distributed capacitance will occur. Therefore, it is possible to apply a low dielectric constant material such as glass to the edges, but normally
Alternatively, in the case of printing, it is difficult to process the edges of the dielectric layer (1) from a manufacturing technology perspective. The reason for this is the dimensional variation of the dielectric element and the fact that 1' and u during sintering are certain. A low dielectric constant layer (6) must be interposed below the wiring electrode (3) at the edge, but it is difficult to process the four edges in terms of man-hours and yield. There is a problem with this.

The method of the present invention was devised to solve these problems, and provides a laminated circuit component that lowers the distributed capacitance to a level where it can be put to practical use as an electric circuit, thereby making it possible to construct an electric circuit eight-dimensionally. It is. In order to achieve this objective, the present invention electrolessly plating at least one metal such as nickel or copper on the surface of a multilayer ceramic capacitor,
It is characterized in that it is then heat-treated in an oxidizing atmosphere, and then electrical components are mounted on the porcelain capacitor.

An embodiment of the present invention will be described below in detail based on FIGS. 2 and 8. In FIG. ) indicates a semiconductor element, αQ indicates a wire, and Qη indicates a diffusion layer.

By the way, to explain the manufacturing method of a laminated circuit component like Jin, one or more layers of internal electrodes (b) and ferroelectric layers (b) are laminated to form a laminated capacitor having at least one capacitor. .

The sintering temperature is usually 1000-1400°C.

After that, different types of ions other than those forming the strong 8m body with a certain thickness are diffused on the surface of this ferroelectric substrate (large surface when it is in the form of a chip), in order to make only the surface layer resemble a low WsWIL rate. This is the diffusion layer aη.

In order to prevent the thickness of the diffusion layer (b) from reaching the inner electrode layer, it is best to stack the green sheet thickly in advance when performing step 1 of the green sheet. It is also effective in ensuring sufficient strength as a substrate. - For example, the optimal substrate thickness is around 1 InI.

Inside in cross-sectional direction! Itt! 111aa is 1/8 in the center
The thickness is 1/8 on the top surface and 1/8 on the bottom surface.
It is conceivable to configure a ferroelectric layer that does not have tMJ- (a portion that does not contribute to the electromagnetic value).

A certain thickness of elements is diffused from the surface of this laminated chip-shaped ferroelectric substrate. The element is required to be easily thermally diffused and to be highly effective in lowering the dielectric constant. In addition, the diffusion described in (b) involves electroless plating of metal ions, depositing them on the surface of the dielectric, and then heat-treating them at a temperature at which they diffuse into the laminated dielectric substrate as metal ions or metal oxides. It has been found that nickel and copper are effective metals suitable for the above-mentioned conditions, and the optimum heat treatment temperature is 50°C. This is because thermal diffusion is difficult to occur below 800°C, and the metal does not become a metal oxide but remains as it is, reducing insulation resistance. This is to cause deterioration. It is preferable that the heat treatment be carried out in the air or in an oxidizing atmosphere.By using the technique of thermal diffusion in the method of the present invention, the surface layer can be uniformly treated, and the dimensional variations of the element can be eliminated. In addition to being able to configure a low dielectric layer regardless of the rows, it has become possible to lower the distribution state to within a practical range and manufacture an element that can have an eight-dimensional circuit configuration. Using this board, conductors and resistance patterns are constructed using thick film technology, thin film technology, etc. on one side, and a functional circuit is obtained by mounting a semiconductor element on one side, and a module is realized as a CR module and LC module on the Q side. Possible applications can be considered for all electronic circuits.

This functional circuit is effective for compact, high-density packaging, and the design is standardized once it is created as a functional circuit block.

It is also effective against star production.

A specific example will be explained below.

[Specific Example 1] A titanic acid (lium) clean sheet having a dielectric constant of 4600 and I (radium) as an internal electrode material are alternately laminated and punched into a chip shape of 12 x 12 m and 1.2 fl thick. The laminated dielectric chips were sintered under the conditions of a firing temperature of 1850°C and a firing time of 2 hours.The integrally sintered multilayer capacitor was 9×9 in size and had a thickness of 0.9.The internal electrode layers were The electrode pattern is interposed in the center of eight equal parts in the thickness direction and forms a plurality of capacitors.

Further, the lead wire of the internal electrode for the capacitor is sintered and provided around the periphery of the laminate. The multilayer capacitor thus obtained was electrolessly plated with the metals shown in Table 1, and thermal diffusion was carried out at the heat treatment temperature and atmosphere shown in Table 1. An electrode pattern of W7L width 0.5 mm, length 4 mm, and electrode spacing 0.4 m was printed on the diffusion surface of the laminated capacitor treated in this way using Ag/4'd conductor paste, and 850' The capacitance between the electrodes formed on the diffusion surface was measured using a capacitance bridge. I can see that it has changed. In addition, the thickness of the diffusion layer was confirmed to be within the range of 0.1 to 0.2151 using an X-ray microanalyzer. Note that the edge portion where the terminal electrode is provided is polished by approximately 60 μm to expose the new palladium internal electrode. As described above, by the method of the present invention, it is possible to form an eight-dimensionally uniform low dielectric constant layer on the high dielectric constant surface layer, and a high density circuit component can be obtained using a capacitor as a substrate.

Table 1 [Specific Example 2] A green sheet was created using titanium oxide having a dielectric constant of 100, and platinum and palladium were alternately laminated as internal electrodes, 1lxllffl, thickness 111.
Cut into 1 chip. The thus cut r-co dielectric chips were fired at a firing temperature of 1400° C. and a firing time of 2 hours. The monolithically sintered multilayer capacitor is 9 x 9M1K, 0.9mm thick and 0.9mm thick.

The internal electrodes are interposed at the center of eight equal parts in the thickness direction, forming a plurality of capacitors. Further, the extraction of the internal Wlt pole for the capacitor is the same as in the first embodiment.

The titanium oxide fill capacitor thus obtained was deposited on the surface layer by electroless plating using the metals shown in Table 2, and then heat treated under the conditions shown in Table 2. . The diffusion surface of the titanium oxide multilayer capacitor treated in this way was used in Example 1:
Configure a g-pole pattern, measure the capacitance between the tt and tt. The results are shown in Table 2.

In addition, the diffusion layer was confirmed using an X-ray microanalyzer, and it was confirmed that it did not reach the internal electrode layer.
In this way, the surface layer of the titanium oxide multilayer capacitor was made to have a low dielectric constant, the electrodes and resistors were constructed with thick films, and a high-density circuit component that mounted semiconductor elements was realized.

The present invention can be carried out as described above.The surface layer of a titanium oxide/barium titanate multilayer capacitor is made to have a low dielectric constant by thermal diffusion, and electrodes and resistors are formed on the upper surface of the layer as shown in Table 2. A high-density circuit component that can mount semiconductor elements has been realized.

[Brief explanation of drawings]

Figure llSx is a cross-sectional view showing a conventional example, Figure #I2 is a cross-sectional view showing an embodiment of the present invention, and Figure 8 is a plan view thereof. 01...all: body layer, 斡...internal electrode, (to)...
・・Wiring electrode, Q, 11゛・・Thick film resistor, cap・・Semiconductor region, DI−・Wire, Qη・・Diffusion layer agent Ihiro Morimoto Figure 1 2

Claims (1)

[Claims] 1. Nickel, #! A multilayer circuit in which at least one kind of gold ingot is electrolessly plated on the surface of a multilayer antimagnetic capacitor, and then heat treated in the air or in an oxidizing atmosphere, and then electrical components are mounted on the magnetic capacitor. How the parts are manufactured. 2. The method for manufacturing a laminated circuit component according to claim 1, wherein the ceramic capacitor is a titanium oxide and barium titanate-based magnetic capacitor. 8. The method for manufacturing a laminated circuit component according to claim 1, wherein the heat treatment temperature is 800 to 1800°C.