JPS5990965A - 光電変換モジユ−ル - Google Patents

光電変換モジユ−ル

Info

Publication number
JPS5990965A
JPS5990965A JP57201543A JP20154382A JPS5990965A JP S5990965 A JPS5990965 A JP S5990965A JP 57201543 A JP57201543 A JP 57201543A JP 20154382 A JP20154382 A JP 20154382A JP S5990965 A JPS5990965 A JP S5990965A
Authority
JP
Japan
Prior art keywords
light
chip
substrate
molded
resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57201543A
Other languages
English (en)
Inventor
Atsushi Yonekura
米倉　篤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP57201543A priority Critical patent/JPS5990965A/ja
Publication of JPS5990965A publication Critical patent/JPS5990965A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/12—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof structurally associated with, e.g. formed in or on a common substrate with, one or more electric light sources, e.g. electroluminescent light sources, and electrically or optically coupled thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909—Post-treatment of the connector or wire bonding area
    • H01L2224/8592—Applying permanent coating, e.g. protective coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Light Receiving Elements (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 本発明は同一パッケージ内の個別の基板上にＩＣチップ
と受光チップとを配置し九九電変換モジュールに関する
１゜ 従来の光重変換モジュールでは、ＩＣチップの表面に外
部からの光が当った場合でもＩＣの電気的特性にその影
響が及ばないようにＩＣチップの表面をまず絶縁性樹脂
で覆い、更にその上にじゃ光性物質を添加した樹脂を塗
布していた。ところがこの方法ではボンティング線を結
線した後に樹脂を塗布することになるため、ボンディン
グ線の変形、断線が予想されこれを防ぐために塗布作業
を慎重に行ない多大な工数を必要とする欠点があった。
またＩ　Ｃチップに塗布された樹脂はそれ自身の粘度及
び硬化温度により厚さがバラツクために根本目的である
しゃ光性が不安定にカリＩＣの電気的特性に悪影響を及
はすという欠点があった。
本発明の目的は、少ない工数で１にチップの表面を完全
にし中光した光電変換モジー−ルを提供することにある
。
本発明は基板上のＩＣチップと別の基板上の受光チップ
とをそれぞれ光不透過性樹脂と光透過性樹脂とで成型し
たものである。
次に本発明を実施例について図面を参照して詳細に説明
する。
第１図は従来の光電変換モジーールの断面図であり、第
２図は特許の実施例を説明するための製凸断面図である
。
従来の光電変換モジー−ルでは、基板２及び２′上にそ
れぞれ受光チップ４及びＩＣチップ６をＡｇペースト３
及び３′でマウントしてＩＣチップ６の表面にまずポリ
イミド８等の絶縁物を塗布し、熱硬化させ絶縁保膜膜を
形成して更にその上に炭素等の導電性じゃ光物質を添加
したポリイミド７等を塗布し、しゃ光膜を形成した後光
透過性樹脂１で第１図の如く成形していた。しかし前述
の通りじゃ光のだめの工数が大であり、しかもしゃ光性
が不安定である。そこで第２図のように基板２′に配置
さねたＩＣチップ６を光不透過性のエポキシ樹脂９でト
ランスファモールドし、その後すでに光不透過性のエポ
キシ樹脂９で成形はれたＩＣチップ６及び基板２に配置
された受光チップ４全体を更に光透過性樹脂１でトラン
スファモールドすれば、少ない工数でＩＣチップ６を完
全にじゃ光した光電変換モジュールが得られる。この方
法によれば既存の技術であるトランスファモールドを２
回行なうだけで済むため実用性に富みしかも量産性にも
冨んでいる。
【図面の簡単な説明】
第１図は従来の光電変換モジュールの断面図であり、第
２図は本発明の詳細な説明する／こめの製品の断面図で
ある。 １・・・・・・光透過性樹脂、２・・・・・・基板、２
′・・四基板、３・・・・・・Ａｇペースト、３′・・
曲Ａｇベースト、４・・曲受光チップ、５・・・・・・
ボンディング線、５′曲・・ボンディング線、６・・・
・・・ＩＣテッグ、７・・・・・導電性しゃ光物質を添
加したボリイｉド、８・・曲ポリイミド、９・・・・・
・光不透過性樹脂。

Claims (1)

    【特許請求の範囲】
  1. 個別の基板上にそれぞれＩＣチップと受光チップとが配
    置され、全体を樹脂で成型した光電変換モジュールにお
    いて、基板上のＩＣチップと別の基板上の受光チップと
    をそれぞれ光透過率の異なる樹脂で成型したことを特徴
    とする光電変換モジュール。
JP57201543A 1982-11-17 1982-11-17 光電変換モジユ−ル Pending JPS5990965A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57201543A JPS5990965A (ja) 1982-11-17 1982-11-17 光電変換モジユ−ル

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57201543A JPS5990965A (ja) 1982-11-17 1982-11-17 光電変換モジユ−ル

Publications (1)

Publication Number Publication Date
JPS5990965A true JPS5990965A (ja) 1984-05-25

Family

ID=16442786

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57201543A Pending JPS5990965A (ja) 1982-11-17 1982-11-17 光電変換モジユ−ル

Country Status (1)

Country Link
JP (1) JPS5990965A (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0233978A (ja) * 1988-07-22 1990-02-05 Matsushita Electron Corp 光半導体装置
US5291054A (en) * 1991-06-24 1994-03-01 Sanyo Electric Co., Ltd. Light receiving module for converting light signal to electric signal

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0233978A (ja) * 1988-07-22 1990-02-05 Matsushita Electron Corp 光半導体装置
US5291054A (en) * 1991-06-24 1994-03-01 Sanyo Electric Co., Ltd. Light receiving module for converting light signal to electric signal

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