JPS5986316A - Switching circuit of differential amplifier pair - Google Patents
Switching circuit of differential amplifier pairInfo
- Publication number
- JPS5986316A JPS5986316A JP57195692A JP19569282A JPS5986316A JP S5986316 A JPS5986316 A JP S5986316A JP 57195692 A JP57195692 A JP 57195692A JP 19569282 A JP19569282 A JP 19569282A JP S5986316 A JPS5986316 A JP S5986316A
- Authority
- JP
- Japan
- Prior art keywords
- pair
- differential
- transistor
- turned
- differential pair
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
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- Amplifiers (AREA)
- Control Of Electrical Variables (AREA)
Abstract
Description
【発明の詳細な説明】
発明の技術分野
本発明は、差動増幅器対の切替回路に関し、特に該差動
増幅器対の駆動電圧が低くても済むようにするGのであ
る。DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to a switching circuit for a pair of differential amplifiers, and in particular to a switching circuit for switching a pair of differential amplifiers, and in particular to a switching circuit that allows the pair of differential amplifiers to be driven at a low voltage.
従来技術と問題点
2組の差動対の一方だけを動作可能な状態にする切替回
路には、第1図に示すように第3の差動対DF3を用い
るものがある。この差動対DF3はトランジスタQ3I
、Q32からなり、Q32側に基準電圧VR2が、また
Q31側に切替電圧Vcが印加される。そしてVC>V
H2であればトランジスタQ31がオンして第1の差動
対DF+と定電流源11との間が接続され、またVC<
VH2であればトランジスタQ32がオンして第2の差
動対DF2と定電流源■1との間が接続される。第1の
差動対DF+はトランジスタQ、、 、 Q、2から
なり、Qllには入力vAが、またQ、2には基準電圧
VRIが接続される。第2の差動対DF2はトランジス
タQ211 Q2.、からなり、Q2.には共通の該基
準電圧VR1が、またQ2□には他の入力vBが印加さ
れる。Prior Art and Problems Some switching circuits that make only one of two differential pairs operable use a third differential pair DF3, as shown in FIG. This differential pair DF3 is a transistor Q3I
, Q32, the reference voltage VR2 is applied to the Q32 side, and the switching voltage Vc is applied to the Q31 side. And VC>V
If H2, the transistor Q31 is turned on and the first differential pair DF+ and the constant current source 11 are connected, and VC<
If it is VH2, the transistor Q32 is turned on, and the second differential pair DF2 and the constant current source 1 are connected. The first differential pair DF+ consists of transistors Q, , Q,2, with input vA connected to Qll and reference voltage VRI connected to Q,2. The second differential pair DF2 includes transistors Q211 Q2. , consists of Q2. The common reference voltage VR1 is applied to Q2□, and another input vB is applied to Q2□.
この回路構成の欠点は基準電圧■R1、入力電圧VA、
VBが高くないと差動対DPI、DF2が動作しない点
である。つまり、アース電位から差動対DF3のエミッ
タまでの電位差は、定電流源■1をトランジスタ1段で
構成すれば、該1−ランジスクの飽和時のコレクタ、エ
ミ・ツク間電圧1VcEs(約0.4V)である。選択
される差動対DFまたはDF2のエミッタ電位はそれよ
り切換用トランジスタQ31またはQ32のVCESI
段分高い。The disadvantages of this circuit configuration are the reference voltage ■R1, input voltage VA,
The point is that the differential pair DPI and DF2 do not operate unless VB is high. In other words, if the constant current source 1 is constructed with one stage of transistors, the potential difference from the ground potential to the emitter of the differential pair DF3 is 1VcEs (about 0. 4V). The emitter potential of the selected differential pair DF or DF2 is then VCESI of the switching transistor Q31 or Q32.
It's a step higher.
これにi・ランジスタQ12またはQ2.のベース、エ
ミッタ間電圧VBE(約0.7V)を加えた値が基準電
圧VRI の最低設定電位になるのでVR+ > V
BE+ 2 VCES = 1.5 V ・−・−・
−(11となる。入力電圧VΔ、VBばVRI の上、
下に変る必要がある。In addition to this, the i-transistor Q12 or Q2. The sum of the base-emitter voltage VBE (approximately 0.7V) becomes the lowest set potential of the reference voltage VRI, so VR+ > V
BE+ 2 VCES = 1.5 V ・−・−・
-(becomes 11.Input voltage VΔ, VB is above VRI,
I need to change down.
一般に基準電圧VRI としては温度依存性の少ないバ
ンドギャップリファレンス(BGR)を使用したいとこ
ろであるが、これにより得られる電圧は1.2〜163
Vが限界であるから(])式の関係を満たずことはでき
ない。Generally, it is desirable to use a bandgap reference (BGR) with less temperature dependence as the reference voltage VRI, but the voltage obtained with this is 1.2 to 163.
Since V is the limit, it is impossible to satisfy the relationship expressed by the equation (]).
発明の目的
本発明は、差動対の切替回路を工夫することで上述した
問題点を解決しようとするものである。OBJECTS OF THE INVENTION The present invention attempts to solve the above-mentioned problems by devising a differential pair switching circuit.
発明の構成
本発明は、各一対のトランジスタと定電流源を備える2
組の差動増幅器対のいずれが一方を動作可能とする切替
回路において、各差動増幅器対の定号を受けて該トラン
ジスタを排他的にオン、オフさせる切替用トランジスタ
を設けてなることを特徴とするが、以下図示の実施例を
参照しながらこれを詳細に説明する。Structure of the Invention The present invention provides two transistors each comprising a pair of transistors and a constant current source.
A switching circuit that enables one of a pair of differential amplifiers to operate, characterized in that a switching transistor is provided that exclusively turns on and off the transistor in response to the constant voltage of each differential amplifier pair. However, this will be explained in detail below with reference to the illustrated embodiment.
発明の実施例
第2図は本発明の一実施例で、Q41 、Q4□は差動
増幅器対DPI、DF2毎に設けた定電流源用のトラン
ジスタ、Q5. 、 Q、はl・ランジスタQ4、。Embodiment of the Invention FIG. 2 shows an embodiment of the present invention, in which Q41 and Q4□ are constant current source transistors provided for each differential amplifier pair DPI and DF2, Q5. , Q is l transistor Q4.
Q42をオン、オフ制御するトランジスタである。This is a transistor that controls Q42 to turn on and off.
定電流源’21とダイオードD1は1−ランジスタQ、
。Constant current source '21 and diode D1 are 1-transistor Q,
.
がオフのときにトランジスタQ4.のベースに定電圧を
印加して該トランジスタをオンにする。同様に定電流源
I22とダイオードD2はトランジスタQ、2がオフの
ときにトランジスタQ42のベースに定電圧を印加して
該トランジスタをオンにする。is off when transistor Q4. The transistor is turned on by applying a constant voltage to the base of the transistor. Similarly, constant current source I22 and diode D2 apply a constant voltage to the base of transistor Q42 to turn it on when transistors Q and 2 are off.
トランジスタQ1.. Q、のベースには互いに逆相
の関係にある切替信号C,Cが印加される。Transistor Q1. .. Switching signals C and C having opposite phases to each other are applied to the base of Q.
かかる構成においてトランジスタQ41とQ4□、ダイ
オードD1とD2、および電流源’21と122が等し
ければトランジスタQ4、およびQ4□は同じ電流を流
す定電流源として働き、第1図の定電流源■−と等価に
なる。そして入力CがL(ロー)レベルでトランジスタ
Q5.がオフであればトランジスタQ、1は電流源’2
1よりベース電流を供給されてオンとなり、差動対DF
+が選択される。このときυはH(ハイ)レベルである
からトランジスタQ、ばオン、従ってトランジスタQ4
2はベース電流を断たれてオフとなり、差動対DF2は
動作しない。逆にC=H,C=Lであればトランジスタ
Q、がオフ、Q42がオンで差動対DF2が選択され、
I・ランジスタQ、1はオン、Q41はオフで、差動対
DF+は選択されない。In such a configuration, if transistors Q41 and Q4□, diodes D1 and D2, and current sources '21 and 122 are equal, transistors Q4 and Q4□ function as constant current sources that flow the same current, and the constant current source ■- in FIG. is equivalent to Then, when the input C is at the L (low) level, the transistor Q5. If is off, transistor Q, 1 is current source '2
The base current is supplied from 1 and turns on, and the differential pair DF
+ is selected. At this time, since υ is at H (high) level, transistor Q is turned on, so transistor Q4
The base current is cut off and the differential pair DF2 is turned off, and the differential pair DF2 does not operate. Conversely, if C=H and C=L, transistor Q is off, Q42 is on, and differential pair DF2 is selected.
I transistor Q,1 is on, Q41 is off, and differential pair DF+ is not selected.
従って、差動対の切替回路としての機能は第1図と変ら
ないが、差動対DPI、DF2に共通に与える基準電圧
VRO値は、トランジスタQ41゜Q、21段分のVC
ESとトランジスタQ、2. Q2、のVBEI段分
との和に低減できる。Therefore, the function as a differential pair switching circuit is the same as in Fig. 1, but the reference voltage VRO value commonly applied to differential pairs DPI and DF2 is
ES and transistor Q, 2. It can be reduced to the sum of the VBEI stage of Q2.
VR> VBE+ VCES = 1. I V
、、、、、、、、、(2)このため、基準電圧■Rに1
.2〜1.3 Vのバンドギャップリファレンス(BG
R)を採用することができる。また、第1図の信号Vc
の振幅は(V BE→−VCE)以上必要であるが、本
発明の信号C,Cの振幅はVBEで足りる。VR>VBE+VCES=1. IV
, , , , , , (2) Therefore, the reference voltage ■R is 1
.. 2-1.3 V bandgap reference (BG
R) can be adopted. Also, the signal Vc in FIG.
The amplitude of (VBE→-VCE) or more is required, but the amplitude of the signals C and C of the present invention is sufficient to be VBE.
第3図はレギュレータへの応用例である。同図において
、D3およびトランジスタQ6.は差動対DF1.DF
2に共通な能動負荷、Q6.、、 Q63は同じく共
通の出力トランジスタである。出力トランジスタQ6゜
、Q63を駆動するオペアンプは通合一方の差動対だけ
で構成されるが、本例のオペアンプOPは2つの差動対
DF1.DF2を含んで構成される。このレギュレータ
の出力Vou tとアース間には直列抵抗R1〜R3が
接続され、RI。FIG. 3 shows an example of application to a regulator. In the figure, D3 and transistor Q6. is the differential pair DF1. DF
Active load common to Q6. ,, Q63 is also a common output transistor. The operational amplifiers that drive the output transistors Q6° and Q63 are generally composed of only one differential pair, but the operational amplifier OP of this example is composed of two differential pairs DF1. It is configured including DF2. Series resistors R1 to R3 are connected between the output Vout of this regulator and ground, and RI.
R2の直列接続点電位は差動対DF+の反転入力に負帰
還され、またR2.R:lの直列接続点電位は差動対D
F2の反転入力に負帰還される。差動対DPI、DF2
の各非反転入力には基準電圧vRが印加される。この回
路は入力電圧VΔ、vBが基準電圧vRに等しくなるよ
うに動作するので、切替信号CをLとして差動対DF+
を選択したときば
となり、また信号CをLとして差動対DF2を選択した
ときは
となる。両式の間には(31< (41という関係があ
るので、これにより高、低2値の直流出力Vou tを
発生ずることができる。尚、Vinは一般に電源電圧で
あるが、この値が低いと+31. +41式で規定する
電圧が発生できないので、これらより充分高い電圧とし
ておく。定電流源12. + D + 、 Q4.及び
I22゜D2.Q42では、ダイオードD1.D2に流
れる電流とトランジスタQ4.. Q42のエミッタに
流れる電流は一定の比(各ジャンクションの面稍比)を
持ち、カレントミラーとして動作する。The potential at the series connection point of R2 is negatively fed back to the inverting input of the differential pair DF+, and the potential at the series connection point of R2. The potential at the series connection point of R:l is the differential pair D
Negative feedback is provided to the inverting input of F2. Differential pair DPI, DF2
A reference voltage vR is applied to each non-inverting input of. This circuit operates so that the input voltages VΔ, vB are equal to the reference voltage vR, so the switching signal C is set to L and the differential pair DF+
When , is selected, and when the differential pair DF2 is selected with signal C set to L, then is. Since there is a relationship between the two equations (31 < (41), it is possible to generate a high/low binary DC output Vout. Note that Vin is generally the power supply voltage, but this value If it is low, the voltage specified by formula +31. +41 cannot be generated, so the voltage is set sufficiently higher than these.In the constant current source 12. + D + , Q4. and I22°D2.Q42, the current flowing through the diode D1. The currents flowing into the emitters of transistors Q4...Q42 have a constant ratio (area ratio of each junction) and operate as a current mirror.
発明の効果
以上述べたように本発明では相補信号により排他的にオ
ン、オフする一対のトランジスタQ51.Q5□により
差動対DPI、DF2の定電流源をオン、オフし、これ
により該2つの差動対を切替えるようにしたので、該差
動対の基準電圧を低減し、温度依存(’lの少ないハン
トギャップリファレンスの採用が可能となる。Effects of the Invention As described above, in the present invention, a pair of transistors Q51. Since the constant current sources of the differential pairs DPI and DF2 are turned on and off by Q5□, and the two differential pairs are thereby switched, the reference voltage of the differential pair is reduced and the temperature dependence ('l This makes it possible to adopt a hunt gap reference with a small number of errors.
第1図は従来の差動増幅器対切替回路を示す構成図、第
2図は本発明の一実施例を示す回路図、第3図は本発明
の応用例を示す回路図である。
図中、DPl、DF2は差動増幅器対、Q41゜Q42
は定電流源用l・ランジスタ、(1)、、jI、Q、は
切替用トランジスタである。
出願人 富士通株式会社
代理人弁理士 青 柳 稔FIG. 1 is a block diagram showing a conventional differential amplifier pair switching circuit, FIG. 2 is a circuit diagram showing an embodiment of the present invention, and FIG. 3 is a circuit diagram showing an application example of the present invention. In the figure, DPl and DF2 are a differential amplifier pair, Q41°Q42
is a constant current source L transistor, (1), , jI, Q are switching transistors. Applicant Fujitsu Limited Representative Patent Attorney Minoru Aoyagi
Claims (1)
幅器対のいずれか一方を動作可能とする切替回路におい
て、各差動増幅器対の定電流源を構成するトランジスタ
に、相補の切替信号を受けて該トランジスタを排他的に
オン、オフさせる切替用トランジスタを設けてなること
を特徴とする差動増幅器対の切替回路。In a switching circuit that enables operation of one of two differential amplifier pairs each comprising a pair of transistors and a constant current source, complementary switching signals are applied to the transistors forming the constant current source of each differential amplifier pair. 1. A switching circuit for a pair of differential amplifiers, comprising a switching transistor that exclusively turns on and off the transistor in response to a switching circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57195692A JPH0628013B2 (en) | 1982-11-08 | 1982-11-08 | Regulator circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57195692A JPH0628013B2 (en) | 1982-11-08 | 1982-11-08 | Regulator circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5986316A true JPS5986316A (en) | 1984-05-18 |
JPH0628013B2 JPH0628013B2 (en) | 1994-04-13 |
Family
ID=16345405
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57195692A Expired - Lifetime JPH0628013B2 (en) | 1982-11-08 | 1982-11-08 | Regulator circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0628013B2 (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6146508A (en) * | 1984-08-11 | 1986-03-06 | Fujitsu Ltd | Stabilizing circuit for constant current source |
JPS626505A (en) * | 1985-07-02 | 1987-01-13 | Rohm Co Ltd | Signal switching circuit |
WO1993017495A1 (en) * | 1989-10-11 | 1993-09-02 | Noriaki Uchida | Amplifier circuit with switch |
US9777619B2 (en) | 2012-01-20 | 2017-10-03 | Yanmar Co., Ltd. | Ship engine |
US9790848B2 (en) | 2012-03-28 | 2017-10-17 | Yanmar Co., Ltd. | Engine |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5574116U (en) * | 1978-11-15 | 1980-05-22 |
-
1982
- 1982-11-08 JP JP57195692A patent/JPH0628013B2/en not_active Expired - Lifetime
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5574116U (en) * | 1978-11-15 | 1980-05-22 |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6146508A (en) * | 1984-08-11 | 1986-03-06 | Fujitsu Ltd | Stabilizing circuit for constant current source |
JPS626505A (en) * | 1985-07-02 | 1987-01-13 | Rohm Co Ltd | Signal switching circuit |
WO1993017495A1 (en) * | 1989-10-11 | 1993-09-02 | Noriaki Uchida | Amplifier circuit with switch |
US9777619B2 (en) | 2012-01-20 | 2017-10-03 | Yanmar Co., Ltd. | Ship engine |
US9790848B2 (en) | 2012-03-28 | 2017-10-17 | Yanmar Co., Ltd. | Engine |
Also Published As
Publication number | Publication date |
---|---|
JPH0628013B2 (en) | 1994-04-13 |
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