JPS5984863U - multilayer printed wiring board - Google Patents

multilayer printed wiring board

Info

Publication number
JPS5984863U
JPS5984863U JP18000482U JP18000482U JPS5984863U JP S5984863 U JPS5984863 U JP S5984863U JP 18000482 U JP18000482 U JP 18000482U JP 18000482 U JP18000482 U JP 18000482U JP S5984863 U JPS5984863 U JP S5984863U
Authority
JP
Japan
Prior art keywords
wiring board
printed wiring
signal pattern
multilayer printed
inner layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18000482U
Other languages
Japanese (ja)
Inventor
渡部 忠二
Original Assignee
株式会社東芝
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社東芝 filed Critical 株式会社東芝
Priority to JP18000482U priority Critical patent/JPS5984863U/en
Publication of JPS5984863U publication Critical patent/JPS5984863U/en
Pending legal-status Critical Current

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Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の多層配線基板を示す側面図、第2図は第
1図に示された実装部品の平面図、第3図は本考案の一
実施例を示す側面図、第4図は第3図に示された実装部
品の平面−である。 1・・・・・・多層印刷配線基板、3a、  3b・・
・・・・実装部品、5a・・・・・・内層に設けられた
信号パターン、5b・・・・・・外層に設けられた信号
パターンの一部、11・・・・・・スルーホール。
Fig. 1 is a side view showing a conventional multilayer wiring board, Fig. 2 is a plan view of the mounted components shown in Fig. 1, Fig. 3 is a side view showing an embodiment of the present invention, and Fig. 4 is a side view showing a conventional multilayer wiring board. This is a plane view of the mounted component shown in FIG. 3. 1...Multilayer printed wiring board, 3a, 3b...
...Mounted component, 5a...Signal pattern provided on inner layer, 5b...Part of signal pattern provided on outer layer, 11...Through hole.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 内層部分に設けられた信号パターンと、外層に設けられ
てこの信号パターンとスルーホールニヨり接続された前
記信号パター′ンの一部とを有し、この信号パターンの
一部を介して前記内層の信号パターンと実装部品とが接
続されることを特徴とする多層印刷配線基板。
It has a signal pattern provided in an inner layer portion, and a part of the signal pattern provided in an outer layer and connected to this signal pattern through a through hole, and the signal pattern is connected to the inner layer through a part of the signal pattern. A multilayer printed wiring board characterized in that a signal pattern and a mounted component are connected.
JP18000482U 1982-11-30 1982-11-30 multilayer printed wiring board Pending JPS5984863U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18000482U JPS5984863U (en) 1982-11-30 1982-11-30 multilayer printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18000482U JPS5984863U (en) 1982-11-30 1982-11-30 multilayer printed wiring board

Publications (1)

Publication Number Publication Date
JPS5984863U true JPS5984863U (en) 1984-06-08

Family

ID=30390405

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18000482U Pending JPS5984863U (en) 1982-11-30 1982-11-30 multilayer printed wiring board

Country Status (1)

Country Link
JP (1) JPS5984863U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5247034B2 (en) * 1972-10-16 1977-11-29

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5247034B2 (en) * 1972-10-16 1977-11-29

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