JPS5955062A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To improve the reliability of a large capacity dynamic memory by ion implanting an oxygen to a silicon nitride film, and then annealing the film to form a dielectric film which is made of silicon oxynitride. CONSTITUTION:After desired number of oxygen ions are implanted by a normal ion implantation method on an Si3N4 film 3, the film is then annealed in an oxygen atmosphere to modify the film 3 into a silicon oxynitride film 4' having desired composition. The defect of the film 3 is removed by this oxidation, an unleaky silicon oxynitride film 4' having no defect such as pinhole or the like can be obtained. Then, with a resist pattern corresponding to the capacitor as a mask the film 4' is selectively etched by dry etching means, and a silicon oxynitride dielectric pattern 4 is formed corresponding to the capacitor pattern on a surface Si substrate 1.

Description

[Detailed Description of the Invention] (a) Technical Field of the Invention The present invention also relates to a method for manufacturing a semiconductor device, and in particular to a method for manufacturing a semiconductor device, and in particular to a method for manufacturing a semiconductor device, in particular a method for manufacturing an insulated gate transistor. Using a pre-manufacturing method for dynamic memory elements = (b) Prior art and problems □ In dynamic MOS memory elements, the signal margin is increased by increasing the capacitance of the capacitor connected in series with the MOS transistor. As the capacity of memory increases, the reliability of memory increases.
As the pattern density increases, the capacitor area also decreases, and the reliability of the memory device tends to decrease. 'Therefore, attempts have been made to use a silicon nitride film as the dielectric film of the capacitor because it has a dielectric constant that is about twice that of the conventional dielectric film made of silicon oxide. The silicon nitride film has built-in defects such as visible holes, so it is leakier than the silicon oxide dielectric film, which reduces the longevity of the information written to the capacitor. There was a problem with this.

(c) Purpose of the Invention The present invention provides a method for manufacturing a dynamic memory element using a silicon oxy nitride film as a dielectric film Q.The purpose of the present invention is to eliminate all of the above problems and achieve a large capacity. The objective is to improve the reliability of dynamic memory.

(d) Structure of the Invention The present invention relates to a method for manufacturing a transverse semiconductor bag tube in which a capacitor is connected in series to an insulated gate transistor. A process of forming a silicon nitride film by chemical vapor deposition on the silicon nitride film, implanting oxygen ions into the silicon nitride film, and performing an annealing treatment to form a dielectric film made of silicon oxynitride, or a semiconductor substrate. - has a technology of forming a silicon oxide film by thermal oxidation method, implanting nine elements into the silicon oxide film, and performing an annealing process to form a dielectric film made of silicon 0 oxyψ nitride. It is characterized by

(e) Embodiments of the Invention The present invention will now be described in detail with reference to embodiments, with reference to the drawings.

Figures 1) to 1 are cross-sectional views of steps in one embodiment of the method of the present invention, and Figures 2(a) to 2(b) are sectional views of steps in another embodiment of the method of the present invention. FIG.

When forming a dynamic MOS memory having, for example, one transistor and one capacitor structure using the method of the present invention, for example, as shown in FIG. The first page is fi-
For example, silicon nitride (Si3
N4) Form the film 3.

Note that the 813N4 film may contain defects such as pinholes as described above.

Next, as shown in FIG. 1(b), the Si, N,
For example, several (KeV) ~ 1
After fully implanting the desired number of 3- oxygen ions (0+) with an acceleration energy of about 0 (KeV), annealing treatment is performed at a temperature of about 900 ('C) in an oxygen (02) atmosphere for about 5 to 6 minutes. Go and say S i! The N4 film 3 is made of silicon 0oxy ψ nitride (S I
X Oy N7) Changes the quality of the film 4'. By the oxidation treatment, defects in the Si3N4 film are removed, and an uncommon silicon fist oxynitride film 4' having no defects such as pinholes is obtained.

Next, carbon tetrafluoride (CF4.) or methane trifluoride (CH4.
The silicon/oxynitride film 4' is selectively etched by a dry etching method such as normal glue active ion etching using F3) as the main etching gas, as shown in FIG. 1(C). , a silicon Φ oxy nitride dielectric pattern 4 corresponding to a capacitor pattern is formed on the exposed St substrate 1 .

Then, as shown in FIG.
For example, an n-type polycrystalline 51M5'ffi doped with a high concentration of 9(P) and having a thickness of about 5000 to 6000(A) is formed by a method, and then formed using a normal photoφ process. The above n''-type polycrystalline S is etched by a dry etching method such as conventional reactive fist ion etching using an etching gas of CF4+Ot''4 using a gold mask with a resist working pattern corresponding to the capacitor.
The entire i-layer 5' is selectively etched to form a silicon oxy nitride dielectric pattern 4 as shown in FIG.
''Second, an n+# polycrystalline S1 capacitor electrode 5 is formed.

In the following, the conventional 5i02, which is characterized by the present invention,
A capacitor with a larger capacity than the conventional capacitor is formed by using an all-dielectric film made of silicon oxynitride, which has a dielectric constant of about 1.5 to 1.8 times that of a dielectric film and is uncommon. The dielectric constant of the silicon 0 oxy ψ nitride film can be varied within the above range by changing the amount of 0+ ions implanted.

Thereafter, according to the usual manufacturing method, first, as shown in FIG.
An insulating film 6 is formed, and then a gate oxide film 7 with a thickness of about 300 to 500 (A), for example, is formed by thermal oxidation on the exposed p-type St substrate surface.

Next, a layer with a thickness of 5000 to 600 mm is deposited on the substrate by CVD method.
A non-doped polycrystalline layer 81 having a thickness of about As shown in (g), the capacitor electrode 5 is made of Sin, which is adjacent to the capacitor electrode 5 with an insulating film 6 interposed therebetween, and the gate oxide film 7 is entirely formed below, and a part of the gate oxide film 7 is stacked on the top of the capacitor electrode 7 with the insulating film 6 interposed therebetween. Non-doped polycrystalline St pattern 8' corresponding to the gate electrode
form.

Next, arsenic ions (As+) are selectively implanted into one surface of the p-type Sl substrate using the usual Zinone-doped polycrystalline St pattern 8' and the capacitor electrode 7 as masks, and a normal annealing process is performed. As shown in (g), an n+ type source/drain region 9 connected to the bit line is formed. At this time, As+ is also implanted into the non-doped polycrystalline Si pattern 8' used as a mask to form a type 1 polycrystalline St gate electrode 8. Through the above steps, a dynamic MOS memory element is formed in which a capacitor whose dielectric film is silicon oxynitride is connected in series to an insulated gate transistor.

In another embodiment of the present invention, a silicon-oxyΦ nitride dielectric film for a capacitor in a dynamic MOS memory device is formed as follows.

That is, first, as shown in FIG. 2(a), a substrate to be processed in which one surface of a p-type Sl substrate is separated and exposed by a field oxide film 2 is oxidized by a normal thermal oxidation method, and one surface of an exposed St substrate is oxidized. For example, Sin with a thickness of about 100 to 200 (A),
A film 10 is formed. Note that the 5i0 formed by the thermal oxidation
It is well known that the 2 film 10 is an uncommon film with no defects.

Next, as shown in FIG. 2(b), a desired number of nitrogen ions (N+) are implanted into the substrate surface using an acceleration energy of, for example, 7-key to 10-key, and then nitrogen (Nt) is implanted into the substrate surface.
) An annealing treatment is performed in an atmosphere at a temperature of about c+oo (°C) for about 5 to 6 minutes to transform the S tO film 10 into silicon oxy nitride (S) having a desired composition.
IxOyNz) The film 4' is changed in quality.

This silicon-oxy nitride film 4' is an unclean film with no defects.

From then on, Figures 4 (c) to (1) explained according to the force.
A dynamic M in which a capacitor having the silicon oxy nitride film as a dielectric film is connected in series with an insulated gate transistor in the same manner as in the embodiment of
In this method, silicon oxide having various dielectric constants within the range of about 1.5 to 1.8 times that of the 5tot film can be obtained by changing the n+ implantation -Re. - A nitride dielectric film can be formed.

(f) As described in detail, according to the method of the present invention, it is possible to easily form an unclean silicon oxy nitride film having a dielectric constant p higher than that of di8-silicon oxide and having no defects. can do.

Therefore, it is possible to form a capacitor with a larger capacitance than the conventional one using a silicon oxy nitride film as a dielectric film, which blocks the high dielectric constant, which improves the reliability of a dynamic memory in which a capacitor is connected in series with an insulated gate φ transistor. Improvements can be made.

[Brief explanation of the drawing]

Figures 1 (a) to (g) are cross-sectional views of steps in one embodiment of the method of the present invention, and Figures 2 (a) to (b) are process cross-sectional views of another embodiment of the method of the present invention. FIG. In the figure, 1 is a p-type silicon substrate, 2 is a field oxide film, 3 is a silicon nitride film, 4' is a silicon fist oxynitride film, 4 is a silicon oxynitride dielectric pattern, and 5' is a silicon nitride film. n+ type polycrystalline silicon layer, 5 is n
+ type polycrystalline silicon 0 capacitor electrode, 6 is silicon dioxide isolated R film, 7 is gate oxide film, 8' is non-doped polycrystalline silicon 0 capacitor electrode, 8' is non-doped polycrystalline silicon 0 capacitor electrode, Or++-+JC Rikibachi mouth 5, 1 gate Electrode, 9 is n+ type source/drain region, 10 is silicon dioxide film, 0+ is oxygen ion NJ-
indicates a nitrogen ion, and As+ indicates an arsenic ion. 11- Flat diagram

Claims (1)

[Claims] 1. In a semiconductor device having a structure in which a capacitor is connected in series to an insulated gate transistor, when forming the capacitor, a semi-integral board is mainly formed by chemical vapor deposition. By implanting oxygen ions into the silicon nitride film and annealing it,
1. A manufacturing method for a semiconductor device, comprising a step of forming a dielectric film made of oxynitride. □2. In a semiconductor device having a structure in which a capacitor is connected in series to an insulated gate transistor, when forming the capacitor, a silicon oxide film is formed on the semiconductor substrate by a thermal oxidation method, By implanting nitrogen ions into the silicon oxide film and performing an annealing process, silicon
1. A method for manufacturing a semiconductor device, comprising a stone knee forming a dielectric film made of oxynitride. □