JPS5954246A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS5954246A
JPS5954246A JP57164465A JP16446582A JPS5954246A JP S5954246 A JPS5954246 A JP S5954246A JP 57164465 A JP57164465 A JP 57164465A JP 16446582 A JP16446582 A JP 16446582A JP S5954246 A JPS5954246 A JP S5954246A
Authority
JP
Japan
Prior art keywords
plating
mask
forming
pattern
photoresist
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57164465A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6357942B2 (cs
Inventor
Hiromichi Kono
博通 河野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP57164465A priority Critical patent/JPS5954246A/ja
Publication of JPS5954246A publication Critical patent/JPS5954246A/ja
Publication of JPS6357942B2 publication Critical patent/JPS6357942B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/79Apparatus for Tape Automated Bonding [TAB]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/50Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Chemically Coating (AREA)
  • Electroplating Methods And Accessories (AREA)
JP57164465A 1982-09-21 1982-09-21 半導体装置の製造方法 Granted JPS5954246A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57164465A JPS5954246A (ja) 1982-09-21 1982-09-21 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57164465A JPS5954246A (ja) 1982-09-21 1982-09-21 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS5954246A true JPS5954246A (ja) 1984-03-29
JPS6357942B2 JPS6357942B2 (cs) 1988-11-14

Family

ID=15793689

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57164465A Granted JPS5954246A (ja) 1982-09-21 1982-09-21 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS5954246A (cs)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5040511A (cs) * 1973-07-31 1975-04-14
JPS57113260A (en) * 1980-12-29 1982-07-14 Nec Corp Manufacture of semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5040511A (cs) * 1973-07-31 1975-04-14
JPS57113260A (en) * 1980-12-29 1982-07-14 Nec Corp Manufacture of semiconductor device

Also Published As

Publication number Publication date
JPS6357942B2 (cs) 1988-11-14

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