JPS5942461B2 - Method of forming resistors in hybrid integrated circuits - Google Patents
Method of forming resistors in hybrid integrated circuitsInfo
- Publication number
- JPS5942461B2 JPS5942461B2 JP56084576A JP8457681A JPS5942461B2 JP S5942461 B2 JPS5942461 B2 JP S5942461B2 JP 56084576 A JP56084576 A JP 56084576A JP 8457681 A JP8457681 A JP 8457681A JP S5942461 B2 JPS5942461 B2 JP S5942461B2
- Authority
- JP
- Japan
- Prior art keywords
- resistor
- hybrid integrated
- nickel
- conductive
- conductive band
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/702—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof of thick-or thin-film circuits or parts thereof
- H01L21/707—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof of thick-or thin-film circuits or parts thereof of thin-film circuits or parts thereof
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
- Apparatuses And Processes For Manufacturing Resistors (AREA)
Description
【発明の詳細な説明】
本発明は混成集積回路の抵抗形成方法に関し、特に金属
基板上に形成されたニッケル抵抗をレーザトリミングす
ることに依つて高抵抗を得る抵抗形成方法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for forming a resistor in a hybrid integrated circuit, and more particularly to a method for forming a resistor in which high resistance is obtained by laser trimming a nickel resistor formed on a metal substrate.
一般に混成集積回路の基板にはセラミックあるいは金属
基板が用いられるが、放熱性の良さから主にアルミニウ
ムの金属基板が多く用いられている。Ceramic or metal substrates are generally used as substrates for hybrid integrated circuits, but aluminum metal substrates are often used because of their good heat dissipation properties.
金属基板上には混成集積回路の受動素子である抵抗がカ
ーボンのスクリーン印刷あるいはニッケルのメッキに依
つて形成されるが、ニッケル抵抗の場合、比較的低抵抗
は容易に形成できるが高抵抗を形成する場合にはレーザ
を用いて櫛歯状に切削し抵抗路を長く形成していた。第
１図はニッケル抵抗に依つて高抵抗を得る場合の従来の
パターン図であり、このパターンは金属基板上に形成さ
れた絶縁層上に形成される。Resistors, which are passive elements of hybrid integrated circuits, are formed on metal substrates by carbon screen printing or nickel plating.In the case of nickel resistors, relatively low resistance can be easily formed, but high resistance can be formed easily. In this case, a laser is used to cut the resistance path into a comb-like shape to form a long resistance path. FIG. 1 is a diagram of a conventional pattern for obtaining high resistance using a nickel resistor, and this pattern is formed on an insulating layer formed on a metal substrate.
絶縁層上には導電路１が形成され、その導電路１間にニ
ッケルメッキに依つてニッケル抵抗体２が形成されるが
、ニッケル抵抗体２は比抵抗が数１０Ω以下と低いため
高抵抗とするためには、ニッケル抵抗体２の両側辺から
櫛歯状に切込み３をレーザに依つて形成し、抵抗路を細
く且つ長くしている。従つて切込み３を多数作ることに
依つて所望の高抵抗が得られる。しかしながら第１図に
示された高抵抗に大電流を流した場合櫛歯状の切込み３
の先端部に於いて電流集中が発生するためその先端部が
焼断する危惧を有していた。A conductive path 1 is formed on the insulating layer, and a nickel resistor 2 is formed between the conductive paths 1 by nickel plating, but the nickel resistor 2 has a low specific resistance of several tens of ohms or less, so it has a high resistance. In order to do this, comb-like notches 3 are formed on both sides of the nickel resistor 2 using a laser to make the resistance path narrower and longer. Therefore, by making a large number of cuts 3, a desired high resistance can be obtained. However, when a large current is passed through the high resistance shown in Figure 1, the comb-like notches 3
Because current concentration occurs at the tip, there is a risk that the tip will burn out.
本発明は上述した点に鑑みて為されたものであり、導電
帯をニッケル抵抗体の側辺部に重畳させることに依り電
流集中の発生を防止できる抵抗形成方法を提供するもの
である。The present invention has been made in view of the above-mentioned points, and provides a method of forming a resistor that can prevent current concentration by overlapping conductive bands on the side portions of a nickel resistor.
以下図面を参照して本発明を詳述する。第２図ａ、ｂは
本発明の実施例を示す抵抗のパターン図であり、４は導
電路、５は導電帯、６はニッケル抵抗体、Ｔは切込みで
ある。The present invention will be described in detail below with reference to the drawings. FIGS. 2a and 2b are resistor pattern diagrams showing an embodiment of the present invention, in which 4 is a conductive path, 5 is a conductive band, 6 is a nickel resistor, and T is a notch.
本実施例のパターンが形成される混成集積回路の基板に
はアルミニウム金属基板が用いられ、このアルミニウム
金属基板は陽極酸化に依つて表面に絶縁性の金属酸化層
が形成され、更に金属酸化層上にはエポキシ系樹脂の絶
縁層が設けられている。また絶縁層はアルミニウム金属
基板と銅箔とを絶縁して接着するものであり、接着され
た銅箔を所定のパターンにエッチングすることに依り絶
縁層上に導電路４が形成されるのである。導電路４は混
成集積回路を形成する能動素子及び受動素子等を結線す
るものであり、所定の導電路４間には抵抗が形成される
。第２図ａに於いて、先ず所定の導電路４間に導電帯５
をニツケル抵抗体６の両側辺部と重畳する位置で且つ両
端を導電路４と重畳させて形成する。An aluminum metal substrate is used as the substrate of the hybrid integrated circuit on which the pattern of this example is formed, and an insulating metal oxide layer is formed on the surface of this aluminum metal substrate by anodic oxidation. is provided with an insulating layer of epoxy resin. The insulating layer is used to insulate and bond the aluminum metal substrate and the copper foil, and the conductive path 4 is formed on the insulating layer by etching the bonded copper foil into a predetermined pattern. The conductive paths 4 connect active elements, passive elements, etc. forming a hybrid integrated circuit, and a resistor is formed between predetermined conductive paths 4. In FIG. 2a, first a conductive band 5 is placed between a predetermined conductive path 4.
are formed at positions overlapping both sides of the nickel resistor 6 and with both ends overlapping the conductive path 4.
この導電帯５はリン、コバルトあるいはタングステン等
の不純物を３％以内含むニツケルあるいは不純物の少な
い銅が用いられ、蒸着あるいはメツキに依つて１μ〜３
μ程度の厚さに形成される。導電帯５を厚く形成すると
レーザトリミングの際レーザのエネルギーを大きくしな
ければならなくなり、絶縁層を損傷する危れがある。次
に導電路４及び導電帯５に側辺部を重畳してニツケル抵
抗体６を形成する。ニツケル抵抗体６は硫化ニツケル及
び次亜リン酸ソーダ等から成る無電解メツキ液に依つて
所定の比抵抗が得られる厚さに形成されるが、それでも
数μ以下とする。またニツケル抵抗体６にはその比抵抗
を増加するためにリン、コバルトあるいはタングステン
等の不純物が８％〜１０％程度以上含まれている。次に
第２図ｂに於いて、ニツケル抵抗体６の両側辺部から櫛
歯状の切込み７を設ける。This conductive band 5 is made of nickel containing impurities such as phosphorus, cobalt, or tungsten within 3%, or copper with few impurities, and varies from 1μ to 3μ depending on vapor deposition or plating.
It is formed to a thickness of approximately μ. If the conductive band 5 is formed thickly, the laser energy must be increased during laser trimming, and there is a risk of damaging the insulating layer. Next, a nickel resistor 6 is formed by overlapping the side portions of the conductive path 4 and the conductive band 5. The nickel resistor 6 is formed using an electroless plating solution made of nickel sulfide, sodium hypophosphite, etc. to a thickness that provides a predetermined resistivity, but the thickness is still several microns or less. Further, the nickel resistor 6 contains about 8% to 10% or more of impurities such as phosphorus, cobalt, or tungsten in order to increase its specific resistance. Next, in FIG. 2b, comb-shaped notches 7 are provided from both sides of the nickel resistor 6.
切込み７はレーザに依つて形成され、レーザのエネルギ
ーは導電帯５とニツケル抵抗体６の総厚を切削できる大
きさとする。このレーザが照射されるとその部分のニツ
ケル抵抗体６及び導電帯５が瞬時に熔解、蒸発して切込
み７が形成される。この櫛歯状の切込み７の先端は導電
帯５にまで延在され、導電帯５の一部が切削される様に
する。従つて第２図ａ及びｂの方法で形成された抵抗は
ニツケル抵抗体６が導電路４間に折り返えされた構造と
なり、その折り返えされた部分には良導電性の導電帯５
が重畳しているため、切込み７の先端での電流集中が無
くなり、焼断電流が従来の３倍以上になるのである。The cut 7 is formed by a laser, and the energy of the laser is set to be large enough to cut the total thickness of the conductive band 5 and the nickel resistor 6. When irradiated with this laser, the nickel resistor 6 and conductive band 5 in that area are instantly melted and evaporated to form a cut 7. The tip of this comb-shaped cut 7 is extended to the conductive band 5 so that a part of the conductive band 5 is cut off. Therefore, the resistor formed by the method shown in FIG.
Since these are superimposed, there is no current concentration at the tip of the notch 7, and the burning current is more than three times that of the conventional one.
尚第２図ａ及びｂに示された方法では、導電帯５はニツ
ケル抵抗体６の形成前に設けたが、ニツケル抵抗体６の
形成後に設けても全く同じ効果を有する。In the method shown in FIGS. 2a and 2b, the conductive band 5 is provided before the formation of the nickel resistor 6, but even if it is provided after the formation of the nickel resistor 6, the same effect can be obtained.
上述の如く本発明に依ればニツケル抵抗体に依つて高抵
抗でしかも電流容量の大きい抵抗が得られるものであり
、特に金属基板を用いた混成集積回路内に形成した場合
にはその放熱性の良さという点との相乗効果に依つて更
に電流容量の増加が得られる利点を有するものである。As mentioned above, according to the present invention, a resistor with high resistance and large current capacity can be obtained by using a nickel resistor, and especially when formed in a hybrid integrated circuit using a metal substrate, its heat dissipation property is improved. This has the advantage that the current capacity can be further increased due to the synergistic effect with the good performance.
第１図は従来例を示すパターン図、第２図Ａ，ｂは本発
明の実施例を示すパターン図である〇４・・・・・・導
電路、５・・・・・・導電帯、６・・・・・・ニツケル
抵抗体、７・・・・・・切込み。Fig. 1 is a pattern diagram showing a conventional example, and Fig. 2 A and b are pattern diagrams showing an embodiment of the present invention. 6...Nickel resistor, 7...Notch.
Claims (1)
た導電路間にニッケルメッキに依つて抵抗体を形成し、
該抵抗体をレーザトリミングすることに依つて高抵抗を
得る混成集積回路の抵抗形成方法に於いて、前記導電路
間に形成される抵抗体の側辺部分と重畳する導電帯を形
成し、前記抵抗体の両側辺から櫛歯状に且つ櫛歯の先端
が前記導電帯に達する様にレーザトリミングに依つて前
記抵抗体及び導電帯を切削することを特徴とする混成集
積回路の抵抗形成方法。1. An insulating layer is provided on a metal substrate, and a resistor is formed between the conductive paths formed on the insulating layer by nickel plating,
In a method for forming a resistor in a hybrid integrated circuit that obtains high resistance by laser trimming the resistor, a conductive band is formed that overlaps with a side portion of the resistor formed between the conductive paths; A method for forming a resistor in a hybrid integrated circuit, comprising cutting the resistor and the conductive band by laser trimming from both sides of the resistor in a comb-teeth shape such that the tip of the comb-teeth reaches the conductive band.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56084576A JPS5942461B2 (en) | 1981-06-01 | 1981-06-01 | Method of forming resistors in hybrid integrated circuits |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56084576A JPS5942461B2 (en) | 1981-06-01 | 1981-06-01 | Method of forming resistors in hybrid integrated circuits |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS57199247A JPS57199247A (en) | 1982-12-07 |
| JPS5942461B2 true JPS5942461B2 (en) | 1984-10-15 |
Family
ID=13834495
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56084576A Expired JPS5942461B2 (en) | 1981-06-01 | 1981-06-01 | Method of forming resistors in hybrid integrated circuits |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5942461B2 (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS49124518A (en) * | 1973-04-02 | 1974-11-28 |
-
1981
- 1981-06-01 JP JP56084576A patent/JPS5942461B2/en not_active Expired
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS49124518A (en) * | 1973-04-02 | 1974-11-28 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS57199247A (en) | 1982-12-07 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR101883040B1 (en) | Chip resistor | |
| GB1265375A (en) | ||
| KR20170083335A (en) | Chip resistor | |
| KR102632374B1 (en) | Chip resistor and chip resistor assembly | |
| US5428339A (en) | Trimmable resistors with reducible resistance and method of manufacture | |
| JPS5942461B2 (en) | Method of forming resistors in hybrid integrated circuits | |
| JP6969159B2 (en) | Chip resistor element and chip resistor element assembly | |
| JPH08288606A (en) | Metallic core type printed board, its manufacture, and electric circuit board | |
| JPH07122406A (en) | Chip-shaped fuse resistor and manufacture thereof | |
| JP3913121B2 (en) | Method for manufacturing a chip resistor having a low resistance value | |
| JP3476849B2 (en) | Fuze resistor and method of manufacturing the same | |
| JPH0245996A (en) | Manufacture of hybrid integrated circuit | |
| JP3818492B2 (en) | Multilayer printed circuit board | |
| JP3838560B2 (en) | Chip resistor having low resistance value and manufacturing method thereof | |
| JPH0636675A (en) | Fuse resistor and manufacture thereof | |
| US20220301750A1 (en) | Resistor unit, manufacturing method therefor, and device provided with resistor unit | |
| JPS5911695A (en) | Hybrid integrated circuit device | |
| JPS6320081Y2 (en) | ||
| JPH0553285B2 (en) | ||
| JP2004022920A (en) | Chip resistor having low resistance and its manufacturing method | |
| KR101843252B1 (en) | Chip resistor and chip resistor assembly | |
| JPS6011655Y2 (en) | printed board | |
| JPS60226156A (en) | Hybrid ic | |
| JP2001068301A (en) | Structure of thin film type resistor | |
| JPH0228914B2 (en) |