JPS5911695A - Hybrid integrated circuit device - Google Patents

Hybrid integrated circuit device

Info

Publication number
JPS5911695A
JPS5911695A JP12251082A JP12251082A JPS5911695A JP S5911695 A JPS5911695 A JP S5911695A JP 12251082 A JP12251082 A JP 12251082A JP 12251082 A JP12251082 A JP 12251082A JP S5911695 A JPS5911695 A JP S5911695A
Authority
JP
Japan
Prior art keywords
layer
integrated circuit
resistor layer
hybrid integrated
conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12251082A
Other languages
Japanese (ja)
Inventor
川上 隆由
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP12251082A priority Critical patent/JPS5911695A/en
Publication of JPS5911695A publication Critical patent/JPS5911695A/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 本発明は、薄膜抵抗体層または厚膜抵抗体層のいずれか
の抵抗体層を介して電気部品が電極あるいは他の電気部
品に接続される構成の混成集積回路装置に関するもので
ある。
DETAILED DESCRIPTION OF THE INVENTION The present invention provides a hybrid integrated circuit device in which electrical components are connected to electrodes or other electrical components through a resistor layer, either a thin film resistor layer or a thick film resistor layer. It is related to.

従来、混成集積回路装置においては電気部品が電極等に
短絡したりなどして異常状態になった時、過電流による
電気部品の発熱あるいは焼損などの事故を防ぐだめ、電
気部品相互間あるいは電気部品と電極とは抵抗体層を介
して電気的に接続し、この抵抗体層によって過電流の抑
制あるいは抵抗体層自体を先に焼損1せることにより、
電気部品の事故を未然に防止する構成がとられている。
Conventionally, in hybrid integrated circuit devices, when electrical parts are short-circuited to electrodes or other abnormal conditions, there is a need to prevent electrical parts from overheating or burning out due to overcurrent. and the electrode are electrically connected through a resistor layer, and by suppressing overcurrent by this resistor layer or by burning out the resistor layer itself first,
A structure is adopted to prevent accidents involving electrical parts.

すなわち、第1図に示すようにガラス、セラミック等の
絶縁性基板(1)の表面に導電体層(2a)、 (2b
)(2c)を形成し、さらに導電体層(2b) 、 (
2c)の上層部に抵抗体層(3)を形成して導電体層(
2b) q2c)とを電気的に接続した後、チップ形コ
ンデンサ等の電気部品(4)を導電体層(2a)と(2
b)との間に電気的に接続することにより、電気部品(
4)には抵抗体層(3)を介して電流が流れるようにし
、電気部品(4)の事故を未然に防止する構成がとられ
ている。
That is, as shown in FIG. 1, conductive layers (2a), (2b
) (2c), and further conductor layers (2b), (
A resistor layer (3) is formed on the upper layer of 2c) to form a conductor layer (
2b) After electrically connecting q2c), an electrical component (4) such as a chip capacitor is connected to the conductive layer (2a) and (2).
b) by making an electrical connection between the electrical component (
4) is configured to allow a current to flow through the resistor layer (3) to prevent an accident with the electrical component (4).

ところがこのような構成において、抵抗体層(3)を先
に焼損させようとする場合、正常動作時に比べて少なく
とも100倍以上の電流が流れるように回路設計を行う
必要があり、設計に特別の配慮が必要になるという欠点
がある。また、このような充分に余裕のある回路設計は
実際上非常に困難であるため、実際には正常動作時にお
いても抵抗体層(3)が劣化したり、あるいは焼損して
しまうという欠点が生じている。この場合、混成集積回
路の外部にヒユーズを設けることも考えられるが、混成
集積回路内部で閉ループ回路が形成されている時にはヒ
ユーズとしての機能が全く役立たないものとなる1、 本発明はこのような欠点に鑑みなされたもので、その目
的は回路設計に特別の配慮を必要とせず、かつ異常時に
は電気部品を含む回路系の焼損などの事故を確実に防止
し得るようにした混成集積回路装置を提供することにあ
る1、 このため本発明は、抵抗体層の上層部に絶縁体層を介し
て形成され、かつ低融点導体金属で電気的に接続された
導電体層を設け、上記抵抗体層と電気部品とを上記導電
体層を介して電気的に接続し、短絡などの異常時には上
記抵抗体層による発熱で低融点導体金属を溶断すること
によシ、回路系が電気的に開放状態となるようにしだも
のである。
However, in such a configuration, if the resistor layer (3) is to be burned out first, it is necessary to design the circuit so that at least 100 times more current flows than during normal operation, and special measures are required in the design. The disadvantage is that it requires consideration. In addition, since it is extremely difficult to design a circuit with such sufficient margin, in reality, the resistor layer (3) may deteriorate or burn out even during normal operation. ing. In this case, it is conceivable to provide a fuse outside the hybrid integrated circuit, but when a closed loop circuit is formed inside the hybrid integrated circuit, the function of the fuse becomes completely useless1. The purpose was to create a hybrid integrated circuit device that does not require special consideration in circuit design and that can reliably prevent accidents such as burnout of the circuit system including electrical parts in the event of an abnormality. 1. For this reason, the present invention provides a conductor layer formed on the upper layer of the resistor layer via an insulator layer and electrically connected with a low melting point conductive metal, The layer and the electrical component are electrically connected through the conductor layer, and in the event of an abnormality such as a short circuit, the heat generated by the resistor layer melts the low-melting point conductor metal, thereby electrically opening the circuit system. It is something that is made to become a state.

以下、図示する実施例に基づき本発明の詳細な説明する
Hereinafter, the present invention will be described in detail based on illustrated embodiments.

第2図は本発明を適用した厚膜混成集積回路装置の一実
施例を示す平面図であって、ここでは抵抗体層などのパ
ターンを透視した形で示している。
FIG. 2 is a plan view showing an embodiment of a thick film hybrid integrated circuit device to which the present invention is applied, and here, patterns such as a resistor layer are shown in a transparent manner.

なお、第1図と同一部分は同一記号で表わしている。Note that the same parts as in FIG. 1 are represented by the same symbols.

第2図において、絶縁性基板(1)の上層部には第1導
電体層(2a) t (2bx) t (2b2) +
 (2c)が形成され、さらにその上層部には込抱体層
(3)が形成され、この抵抗体層(3)はその両端が第
1導電体層(2b2)  と(2c)とに電気的に接続
されている。また、抵抗体層(3)の上層部には絶縁体
層(5)が形成され、さらにその上層部には抵抗体層(
3)を横断するように第2導電体層(6a) t (6
b)が形成され、この第2導電体層(6a)と(6b)
とは牛用などから成る低融点導体金属(7)によって電
気的に接続されている。また、この第2導電体層(6a
) ? (6b)の一方の端部は接続部(8a) ? 
(8b)とによって最下層の第1導電体層(2bl)と
(2b2)にそれぞれ電気的に接続されている。そして
、第1導電体層(2bl)と(2a)との間には電気部
品(4)が電気的に接続され、この電気部品(4)には
、第2導電体層(6a) t (6b)および低融点導
体金属(力と、抵抗体層(3)を介して電流が流れるよ
うに構成されている。
In FIG. 2, the upper layer of the insulating substrate (1) includes a first conductive layer (2a) t (2bx) t (2b2) +
(2c) is formed, and an inclusion layer (3) is formed on the upper layer thereof, and both ends of this resistor layer (3) are electrically connected to the first conductor layer (2b2) and (2c). connected. Further, an insulator layer (5) is formed on the upper layer of the resistor layer (3), and a resistor layer (5) is formed on the upper layer of the insulator layer (5).
The second conductive layer (6a) t (6
b) is formed, and this second conductor layer (6a) and (6b)
and are electrically connected to each other by a low melting point conductive metal (7) made of a material used for cattle or the like. Moreover, this second conductor layer (6a
)? One end of (6b) is the connection part (8a)?
(8b) and are electrically connected to the lowermost first conductor layers (2bl) and (2b2), respectively. An electric component (4) is electrically connected between the first conductor layer (2bl) and (2a), and this electric component (4) has a second conductor layer (6a) t ( 6b) and a low melting point conductor metal (force) and is configured to allow current to flow through the resistor layer (3).

このような構成において、電気部品(′/4)が短絡事
故を起した場合、抵抗体層(3)に過大な短絡電流が流
れ、抵抗体層(3)が発熱し、その発熱温度が低融点導
体金属(力の溶融温度を越えると、低融点導体金属(7
)が溶解してしまう。このため、第2導電体層(6a)
 + (6b)との間が電気的に開放状態となシ、電気
部品(4)に対する電流径路が遮断される。この結果、
電気部品(4)の焼損などの事故を未然に、しかも確実
に防止できるようになる。この場合、抵抗体層(3)自
体は焼損させる必要が無く、かつ発熱作用が良好なもの
を選定するだけで良いため、回路設計に際して従来のよ
うな特別の配慮をする必要が全く無くなる。
In such a configuration, if a short circuit occurs in the electrical component ('/4), an excessive short circuit current will flow through the resistor layer (3), causing the resistor layer (3) to generate heat, and the temperature at which it generates will decrease. When the melting temperature of the melting point conductor metal (force is exceeded), the melting point of the low melting point conductor metal (7
) will dissolve. For this reason, the second conductor layer (6a)
+ (6b) is electrically open, and the current path to the electrical component (4) is cut off. As a result,
Accidents such as burnout of electrical parts (4) can be prevented in advance and reliably. In this case, there is no need to burn out the resistor layer (3) itself, and it is only necessary to select one with a good heat generation effect, so there is no need to take any special consideration when designing the circuit as in the past.

なお、この実施例では厚膜混成集積回路装置について説
明しだが、薄膜混成集積回路装置についても同様に適用
できる。また、低融点導体金属(7)で接続する第2導
電体層(6a)と(6b)の接続部分は、低融点導体金
属(力が溶′解したときに電気的に切り離れやすいパタ
ーン形状とすればさらに良い。
Although this embodiment describes a thick film hybrid integrated circuit device, the invention can be similarly applied to a thin film hybrid integrated circuit device. In addition, the connecting portion of the second conductive layer (6a) and (6b) connected by the low melting point conductive metal (7) is a low melting point conductive metal (with a pattern shape that is easily separated electrically when melted by force). Even better.

以上説明したように本発明は、抵抗体層の上層部に絶縁
体層を介して形成され、かつ低融点導体金属゛で電気的
に接続された導電体層を設け、上記抵抗体層と電気部品
とを上記導電体層を介して電気的に接続し、短絡などの
異常時には上記抵抗体層による発熱で低融点導体金属を
溶断することにより、回路系が電気的に開放状態となる
ようにしたものである。
As explained above, the present invention provides a conductor layer formed on the upper layer of the resistor layer via an insulator layer and electrically connected with a low melting point conductive metal, and electrically connects to the resistor layer. The circuit system is electrically connected to the parts through the conductive layer, and in the event of an abnormality such as a short circuit, the heat generated by the resistor layer melts the low-melting point conductive metal, so that the circuit system becomes electrically open. This is what I did.

このため、回路設計に特別の配慮をする必要がなくカリ
、かつ短絡などの異常時には電気部品を含む回路系の焼
損などの事故を確実に防止することができるという効果
がある。
Therefore, there is no need to take special consideration in circuit design, and in the event of an abnormality such as a short circuit, it is possible to reliably prevent accidents such as burnout of the circuit system including electrical parts.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の混成集積回路装置の一例を示す平面図、
第2図は本発明の一実施例を示す平面図である。 (2a)、(2b1)、(2b2)、(2c)・・・・
第1導電体層、(3)・・・・抵抗体層、(4)・・・
・電気部品、(5)・・・・絶縁体層、(6a)y(6
b)・・・・第2導電体層、(7)・・・・低融点導体
金属、(8a) 、 (8b)  ・・・・接続部。
FIG. 1 is a plan view showing an example of a conventional hybrid integrated circuit device;
FIG. 2 is a plan view showing an embodiment of the present invention. (2a), (2b1), (2b2), (2c)...
First conductor layer, (3)...Resistor layer, (4)...
・Electrical component, (5)...Insulator layer, (6a)y(6
b)...Second conductor layer, (7)...Low melting point conductor metal, (8a), (8b)...Connection portion.

Claims (1)

【特許請求の範囲】[Claims] 薄膜抵抗体層または厚膜抵抗体層のいずれかの抵抗体層
を介して電気部品が接続される混成集積回路装置におい
て、上記抵抗体層の上層部に絶縁体層を介して形成され
、低融点導体金属で電気的に接続された導電体層を設け
、上記抵抗体層と電気部品とを上記導電体層を介して接
続したことを特徴とする混成集積回路装置。
In a hybrid integrated circuit device in which electrical components are connected through a resistor layer, either a thin film resistor layer or a thick film resistor layer, a low 1. A hybrid integrated circuit device comprising: a conductor layer electrically connected with a melting point conductor metal; and the resistor layer and an electrical component are connected via the conductor layer.
JP12251082A 1982-07-12 1982-07-12 Hybrid integrated circuit device Pending JPS5911695A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12251082A JPS5911695A (en) 1982-07-12 1982-07-12 Hybrid integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12251082A JPS5911695A (en) 1982-07-12 1982-07-12 Hybrid integrated circuit device

Publications (1)

Publication Number Publication Date
JPS5911695A true JPS5911695A (en) 1984-01-21

Family

ID=14837631

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12251082A Pending JPS5911695A (en) 1982-07-12 1982-07-12 Hybrid integrated circuit device

Country Status (1)

Country Link
JP (1) JPS5911695A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01229835A (en) * 1988-03-03 1989-09-13 Teijin Ltd Spun yarn for moquette woven fabric pile
JPH07153367A (en) * 1993-08-31 1995-06-16 Sony Corp Protective element, manufacture thereof, and circuit board
JPH08161990A (en) * 1994-11-30 1996-06-21 Sony Chem Corp Protective element and its manufacture
JP2014135217A (en) * 2013-01-11 2014-07-24 Murata Mfg Co Ltd Fuse

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01229835A (en) * 1988-03-03 1989-09-13 Teijin Ltd Spun yarn for moquette woven fabric pile
JPH07153367A (en) * 1993-08-31 1995-06-16 Sony Corp Protective element, manufacture thereof, and circuit board
JPH08161990A (en) * 1994-11-30 1996-06-21 Sony Chem Corp Protective element and its manufacture
JP2014135217A (en) * 2013-01-11 2014-07-24 Murata Mfg Co Ltd Fuse

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