JPH0553285B2 - - Google Patents
Info
- Publication number
- JPH0553285B2 JPH0553285B2 JP61222625A JP22262586A JPH0553285B2 JP H0553285 B2 JPH0553285 B2 JP H0553285B2 JP 61222625 A JP61222625 A JP 61222625A JP 22262586 A JP22262586 A JP 22262586A JP H0553285 B2 JPH0553285 B2 JP H0553285B2
- Authority
- JP
- Japan
- Prior art keywords
- resistor
- trimming
- resistance value
- pattern
- trimmed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000009966 trimming Methods 0.000 claims description 26
- 239000000758 substrate Substances 0.000 claims description 9
- 238000000034 method Methods 0.000 claims description 7
- 229910052751 metal Inorganic materials 0.000 claims description 5
- 239000002184 metal Substances 0.000 claims description 5
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 18
- 229910052759 nickel Inorganic materials 0.000 description 9
- 238000010586 diagram Methods 0.000 description 7
- 101100008047 Caenorhabditis elegans cut-3 gene Proteins 0.000 description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 4
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 229910052799 carbon Inorganic materials 0.000 description 2
- 239000011889 copper foil Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229910044991 metal oxide Inorganic materials 0.000 description 2
- 150000004706 metal oxides Chemical class 0.000 description 2
- KWSLGOVYXMQPPX-UHFFFAOYSA-N 5-[3-(trifluoromethyl)phenyl]-2h-tetrazole Chemical compound FC(F)(F)C1=CC=CC(C2=NNN=N2)=C1 KWSLGOVYXMQPPX-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 229910017052 cobalt Inorganic materials 0.000 description 1
- 239000010941 cobalt Substances 0.000 description 1
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 230000007261 regionalization Effects 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 229910001379 sodium hypophosphite Inorganic materials 0.000 description 1
- WWNBZGLDODTKEM-UHFFFAOYSA-N sulfanylidenenickel Chemical compound [Ni]=S WWNBZGLDODTKEM-UHFFFAOYSA-N 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
Landscapes
- Non-Adjustable Resistors (AREA)
- Apparatuses And Processes For Manufacturing Resistors (AREA)
Description
【発明の詳細な説明】
(イ) 産業上の利用分野
本発明は混成集積回路の抵抗体のトリミング方
法に関し、特に金属基板上に形成されたカーボン
あるいはニツケル抵抗のレーザトリミングの改良
に関する。DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to a method for trimming a resistor of a hybrid integrated circuit, and more particularly to an improvement in laser trimming of a carbon or nickel resistor formed on a metal substrate.
(ロ) 従来の技術
一般に混成集積回路の基板にはセラミツクある
いは金属板が用いられるが、放熱性の良さから主
にアルミニウムを用いた金属基板が用いられる。
金属基板上には混成集積回路の受動素子である抵
抗がカーボのスクリーン印刷あるいはニツケルの
メツキによつて形成される。そのニツケルメツキ
抵抗はレーザトリミングによつて所定の抵抗値に
調整される。(b) Prior Art Ceramic or metal plates are generally used for the substrates of hybrid integrated circuits, but metal substrates made of aluminum are mainly used because of their good heat dissipation properties.
A resistor, which is a passive element of the hybrid integrated circuit, is formed on the metal substrate by screen printing with carbon or plating with nickel. The nickel-plated resistor is adjusted to a predetermined resistance value by laser trimming.
この様な技術は特公昭60−5226号公報に記載さ
れている。 Such a technique is described in Japanese Patent Publication No. 60-5226.
またレーザトリミングによつて抵抗値を調整す
る場合、第5図に示す様に電極11間に設けられ
た抵抗素子12にL字形の切欠き13を設けて行
なうのが一般的である。 Further, when adjusting the resistance value by laser trimming, it is common to provide an L-shaped notch 13 in the resistance element 12 provided between the electrodes 11, as shown in FIG.
この様な技術は特公昭61−22445号公報に記載
されている。 Such a technique is described in Japanese Patent Publication No. 61-22445.
(ハ) 発明が解決しようとする問題点
確かにレーザトリミングにおいてLカツトは精
度的に優れた抵抗の調整方法である。しかしトリ
ミング前の抵抗体の初期抵抗値は膜厚、パターン
形成時のバラツキ等の製造上異なつた値を示すた
めLカツトの折曲点抵抗をトリミングのプログラ
ム上、目的抵抗値の90%〜95%程度に設定される
ので、例えば初期抵抗値が目標抵抗値に近い抵抗
体ではトリミングの方向転換が行なわれる前に抵
抗値が目標値に達してしまい単なるストレートカ
ツトになり、トリミング終了地点での電流の集中
を生じて、素子の劣化を招く恐れがある。また初
期抵抗値が目標抵抗値よりかなり低い抵抗体では
目標抵抗値に達する前に電極に到達し、トリミン
グが終了しない場合があるという問題点を有して
いた。(c) Problems to be Solved by the Invention It is true that the L-cut is a highly accurate resistance adjustment method in laser trimming. However, the initial resistance value of the resistor before trimming shows different values due to manufacturing factors such as variations in film thickness and pattern formation. For example, if the initial resistance value is close to the target resistance value, the resistance value will reach the target value before the trimming direction is changed, resulting in a simple straight cut. This may cause concentration of current, leading to deterioration of the element. Further, in the case of a resistor whose initial resistance value is considerably lower than the target resistance value, there is a problem that the resistor reaches the electrode before reaching the target resistance value, and trimming may not be completed.
(ニ) 問題点を解決するための手段
本発明は上述した点に鑑みてなされたものであ
り、第1図a、第1図b及び第2図に示す如く、
あらかじめ複数個のL字形で形成されたトリミン
グパターン4に沿つて抵抗体2を1本づつトリミ
ングして抵抗体2の抵抗値があらかじめ定められ
た値に到達したときにトリミングを停止させて抵
抗値を調整する。(d) Means for solving the problems The present invention has been made in view of the above points, and as shown in FIGS. 1a, 1b, and 2,
The resistor 2 is trimmed one by one along the trimming pattern 4 formed in advance in a plurality of L shapes, and when the resistance value of the resistor 2 reaches a predetermined value, the trimming is stopped and the resistance value is determined. Adjust.
(ホ) 作用
この様にあらかじめ複数個のL字形で形成され
たトリミングパターンに沿つて抵抗体をトリミン
グすることでバラツキのある抵抗体すべてに対応
して安定したトリミングが行なえる。(e) Effect By trimming the resistor along the trimming pattern formed in advance in a plurality of L shapes in this way, stable trimming can be performed to accommodate all the resistors having variations.
(ヘ) 実施例
以下に第1図a及び第1図bに示した一実施例
に基づいて本発明を詳述する。(F) Example The present invention will be described in detail below based on an example shown in FIGS. 1a and 1b.
第1図a及び第1図bは本発明の実施例を示す
抵抗のパターン図であり、1は導電路、2はニツ
ケル抵抗体、3は切込みである。 1A and 1B are resistor pattern diagrams showing an embodiment of the present invention, in which 1 is a conductive path, 2 is a nickel resistor, and 3 is a notch.
本実施例のパターンが形成される混成集積回路
の基板にはアルミニウム金属基板が用いられ、こ
のアルミニウム金属基板は陽極酸化に依つて表面
に絶縁性の金属酸化膜が形成される。更にその金
属酸化膜上にはエポキシ系樹脂の絶縁層が設けら
れている。また絶縁層はアルミニウム金属基板と
銅箔とを絶縁して接着するものであり、接着され
た銅箔を所定のパターンにエツチングすることに
より絶縁層上に導電路1が形成されるのである。
導電路1は混成集積回路を形成する能動素子及び
受動素子等を結線するものであり、所定の導電路
1間に抵抗体2が形成される。 An aluminum metal substrate is used as the substrate of the hybrid integrated circuit on which the pattern of this embodiment is formed, and an insulating metal oxide film is formed on the surface of this aluminum metal substrate by anodic oxidation. Furthermore, an insulating layer of epoxy resin is provided on the metal oxide film. The insulating layer is used to insulate and bond the aluminum metal substrate and the copper foil, and the conductive path 1 is formed on the insulating layer by etching the bonded copper foil into a predetermined pattern.
The conductive paths 1 connect active elements, passive elements, etc. forming a hybrid integrated circuit, and resistors 2 are formed between predetermined conductive paths 1.
先ず、第1図aの如く、導電路1間にニツケル
抵抗体2を形成する。ニツケル抵抗体2は硫化ニ
ツケル及び次亜リン酸ソーダ等から成る無電解メ
ツキ液に依つて所定の比抵抗(以下初期抵抗)が
得られる厚さ、例えば0.5〜3μ位の厚さに形成す
る。またニツケル抵抗体2にはその初期抵抗を増
加するためにリン、コバルトあるいはタングステ
ン等の不純物が8%〜10%程度以上含まれてい
る。 First, as shown in FIG. 1a, a nickel resistor 2 is formed between conductive paths 1. The nickel resistor 2 is formed using an electroless plating solution made of nickel sulfide, sodium hypophosphite, etc. to a thickness such that a predetermined specific resistance (hereinafter referred to as initial resistance) can be obtained, for example, about 0.5 to 3 μm. Further, the nickel resistor 2 contains about 8% to 10% or more of impurities such as phosphorus, cobalt, or tungsten in order to increase its initial resistance.
次に第1図bの如く、ニツケル抵抗体2の一側
辺からL字形の切込み3を形成する。切込み3は
レーザによつて形成され、レーザのエネルギーは
絶縁層が切削できない大きさとする。このレーザ
ーが照射されるとその部分のニツケル抵抗体2が
瞬時に熔解蒸発してL字形の切込み3が形成され
る。 Next, as shown in FIG. 1b, an L-shaped cut 3 is formed from one side of the nickel resistor 2. The cut 3 is formed by a laser, and the energy of the laser is set to a level that does not cut the insulating layer. When irradiated with this laser, the nickel resistor 2 in that area is instantly melted and vaporized, forming an L-shaped notch 3.
本発明の特徴はあらかじめ複数のL字形のパタ
ーンを有するトリミングパターンに沿つて抵抗体
2を1本づつトリミングし目標抵抗値に抵抗体2
の抵抗値が到達したときにトリミングを終了する
ものである。 The feature of the present invention is that the resistor 2 is trimmed one by one along a trimming pattern having a plurality of L-shaped patterns in advance, and the resistor 2 is adjusted to a target resistance value.
The trimming ends when the resistance value of .
トリミングパターンは第2図に示す如く、L字
形が互いに向き合い且つ交互となる様に形成し、
抵抗体の縦方向をあらかじめ所定の間隔に分割し
トリムリミツト距離W1……Wnを設定し、それに
対応して同様にトリムリミツト距離l1……lnをプ
ログラム上にすべて設定する。また第4図に示す
如く、L字形のパターンが同一方向に設定される
パターンも考えられる。 The trimming pattern is formed so that the L-shapes face each other and alternate, as shown in Figure 2.
The longitudinal direction of the resistor is divided in advance into predetermined intervals, trim limit distances W 1 . . . Wn are set, and correspondingly all trim limit distances l 1 . Furthermore, as shown in FIG. 4, a pattern in which L-shaped patterns are set in the same direction is also conceivable.
今、ニツケル抵抗体2の初期抵抗値が5KΩの
抵抗体があり、抵抗体2の目標抵抗値が10KΩと
した場合について説明すると、第3図に示す如
く、トリミングパターンに沿つて抵抗体2にW1,
l1の切込み3′がトリミングされる。トリミング
された抵抗値が目標抵抗値に満されない場合は次
の切込み3″のW2,l2がトリミングされ、更に目
標抵抗値に到達しない場合は次の切込み3の
W3,l3がトリミングされる。この切込み3のl3
の1/3の距離の点Aで目標抵抗値の10KΩに到達
したときトリミングを終了する。 Now, to explain the case where the initial resistance value of the nickel resistor 2 is 5KΩ, and the target resistance value of the resistor 2 is 10KΩ, as shown in Fig. 3, the resistor 2 is attached along the trimming pattern. W1 ,
The notch 3' of l 1 is trimmed. If the trimmed resistance value does not meet the target resistance value, W 2 , l 2 of the next cut 3" is trimmed, and if the target resistance value is not reached, the next cut 3" is trimmed.
W 3 and l 3 are trimmed. l 3 of this cut 3
Trimming ends when the target resistance value of 10KΩ is reached at point A, which is 1/3 the distance from the point A.
斯る方法を用いることにより、初期抵抗値が目
標抵抗値に近い抵抗体でも必らずLカツトのトリ
ミングが行なえ安定した電流径路が形成でき電流
集中などを防止できる。また初期抵抗値が目標抵
抗値よりかなり低い抵抗体でも導電路に到達する
ことなくトリミングが行なえるものである。 By using such a method, L-cut trimming can be performed without fail even for a resistor whose initial resistance value is close to the target resistance value, a stable current path can be formed, and current concentration can be prevented. Further, even a resistor whose initial resistance value is considerably lower than the target resistance value can be trimmed without reaching the conductive path.
(ト) 発明の効果
上述の如く、本発明によれば抵抗体の抵抗にバ
ラツキがあつた場合でもあらかじめ定められたト
リミングパターンにより確実にL字形のトリミン
グが行なえるものである。(G) Effects of the Invention As described above, according to the present invention, L-shaped trimming can be reliably performed using a predetermined trimming pattern even if there is variation in the resistance of the resistor.
また、本発明はトリミングパターンに沿つてト
リミングができバラツキのある抵抗体すべてに対
応することができる為、従来の様に個々の抵抗体
のLカツトの折曲点の設定値を計算する必要が無
いので作業性が向上する利点を有するものであ
る。 In addition, since the present invention can be trimmed along a trimming pattern and can be applied to all resistors with variations, there is no need to calculate the setting value of the L-cut bending point of each resistor as in the past. This has the advantage that workability is improved because there is no such thing.
第1図a及び第1図bは本発明の実施例を示す
パターン図、第2図はレーザ装置に記憶されるパ
ターンを示すパターン図、第3図は実施例を示す
パターン図、第4図は他の実施例を示すパターン
図、第5図は従来例を示すパターン図である。
1……導電路、2……抵抗体、3……切込み、
4……パターン図。
1a and 1b are pattern diagrams showing an embodiment of the present invention, FIG. 2 is a pattern diagram showing a pattern stored in a laser device, FIG. 3 is a pattern diagram showing an embodiment, and FIG. is a pattern diagram showing another embodiment, and FIG. 5 is a pattern diagram showing a conventional example. 1... Conductive path, 2... Resistor, 3... Notch,
4...Pattern diagram.
Claims (1)
成された導電路間に抵抗体を形成し、該抵抗体を
レーザートリミングする抵抗体のトリミング方法
において、あらかじめ独立分離した複数個のL字
形で形成されたトリミングパターンを有したプロ
グラムに基づき、前記抵抗体に1本づつL字型の
パターンでトリミングし、前記抵抗体の抵抗値が
あらかじめ定められた値に到達したときにトリミ
ングを停止させ抵抗値を調整することを特徴とす
る抵抗体のトリミング方法。1 In a resistor trimming method in which an insulating layer is provided on a metal substrate, a resistor is formed between conductive paths formed on the insulating layer, and the resistor is laser trimmed, a plurality of independently separated L Based on a program having a trimming pattern formed in a letter shape, the resistors are trimmed one by one in an L-shaped pattern, and the trimming is stopped when the resistance value of the resistor reaches a predetermined value. A method for trimming a resistor, characterized by adjusting the resistance value.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61222625A JPS6377101A (en) | 1986-09-19 | 1986-09-19 | Trimming of resistor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61222625A JPS6377101A (en) | 1986-09-19 | 1986-09-19 | Trimming of resistor |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6377101A JPS6377101A (en) | 1988-04-07 |
JPH0553285B2 true JPH0553285B2 (en) | 1993-08-09 |
Family
ID=16785381
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP61222625A Granted JPS6377101A (en) | 1986-09-19 | 1986-09-19 | Trimming of resistor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6377101A (en) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2014017378A (en) * | 2012-07-09 | 2014-01-30 | Denso Corp | Method for trimming resistor |
JP2018190922A (en) * | 2017-05-11 | 2018-11-29 | Koa株式会社 | Manufacturing method of chip resistor |
JP7085378B2 (en) * | 2018-03-23 | 2022-06-16 | Koa株式会社 | Chip resistor |
WO2024162186A1 (en) * | 2023-01-31 | 2024-08-08 | パナソニックIpマネジメント株式会社 | Chip resistor |
WO2024203240A1 (en) * | 2023-03-31 | 2024-10-03 | パナソニックIpマネジメント株式会社 | Chip resistor and method for manufacturing chip resistor |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS616802A (en) * | 1984-04-30 | 1986-01-13 | ベルトン・エレクトロニクス・コ−ポレイシヨン | Film resistor and method of producing same |
JPS6188504A (en) * | 1984-10-08 | 1986-05-06 | 日本電気株式会社 | Trimming of resistor |
-
1986
- 1986-09-19 JP JP61222625A patent/JPS6377101A/en active Granted
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS616802A (en) * | 1984-04-30 | 1986-01-13 | ベルトン・エレクトロニクス・コ−ポレイシヨン | Film resistor and method of producing same |
JPS6188504A (en) * | 1984-10-08 | 1986-05-06 | 日本電気株式会社 | Trimming of resistor |
Also Published As
Publication number | Publication date |
---|---|
JPS6377101A (en) | 1988-04-07 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EXPY | Cancellation because of completion of term |