JPS594008U - Analog circuit control device - Google Patents
Analog circuit control deviceInfo
- Publication number
- JPS594008U JPS594008U JP9776082U JP9776082U JPS594008U JP S594008 U JPS594008 U JP S594008U JP 9776082 U JP9776082 U JP 9776082U JP 9776082 U JP9776082 U JP 9776082U JP S594008 U JPS594008 U JP S594008U
- Authority
- JP
- Japan
- Prior art keywords
- digital signal
- analog circuit
- signal
- control device
- parallel digital
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Control By Computers (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来のアナログ回路制御装置のブロック図、第
２図は本考案の原理を示すブロック図、第３図は本考案
の好適な実施例の要部を示すブロック図である。
２６．２６−０〜２６−７：ラッチ回路、３０゜３０−
０〜３０−３：バッファ回路、３４：デコーダ。FIG. 1 is a block diagram of a conventional analog circuit control device, FIG. 2 is a block diagram showing the principle of the present invention, and FIG. 3 is a block diagram showing the main parts of a preferred embodiment of the present invention. 26.26-0 to 26-7: Latch circuit, 30°30-
0 to 30-3: buffer circuit, 34: decoder.
Claims (1)
するアナログ回路制御装置において、上記デジタル回路
は制御デジタル信号、第１選択並列デジタル信号、第２
選択並列デジタル信号及び付勢信号を発生する手段と、
上記制御デジタル信号及び第１選択並列デジタル信号が
供給され上記付勢信号により付勢されるバッファ回路と
、上記第２選択並列デジタル信号が供給され上記付勢信
号により付勢されるデコーダとを有し、上記アナログ回
路は上記バッファ回路からの上記制御デジタル信号及び
上記第１選択並列デジタル信号が夫々データ端子及び選
択端子に供給され、上記デコーダからの出力信号の１つ
が付勢端子に供給される複数個のラッチ回路を有し、該
ラッチ回路からの出力信号により上記アナログ回路を制
御することを特徴とするアナログ回路制御装置。In an analog circuit control device that controls an analog circuit using an output signal from a digital circuit, the digital circuit includes a control digital signal, a first selected parallel digital signal, a second selected parallel digital signal, and a second selected parallel digital signal.
means for generating a selected parallel digital signal and an energizing signal;
a buffer circuit supplied with the control digital signal and the first selected parallel digital signal and energized by the energizing signal; and a decoder supplied with the second selected parallel digital signal and energized by the energizing signal. In the analog circuit, the control digital signal and the first selection parallel digital signal from the buffer circuit are supplied to a data terminal and a selection terminal, respectively, and one of the output signals from the decoder is supplied to an activation terminal. An analog circuit control device comprising a plurality of latch circuits, the analog circuit being controlled by output signals from the latch circuits.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9776082U JPS594008U (en) | 1982-06-29 | 1982-06-29 | Analog circuit control device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9776082U JPS594008U (en) | 1982-06-29 | 1982-06-29 | Analog circuit control device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS594008U true JPS594008U (en) | 1984-01-11 |
Family
ID=30232399
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9776082U Pending JPS594008U (en) | 1982-06-29 | 1982-06-29 | Analog circuit control device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS594008U (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS554638A (en) * | 1978-06-28 | 1980-01-14 | Hitachi Ltd | Input/output device base for sequence controller |
| JPS554636A (en) * | 1978-06-28 | 1980-01-14 | Hitachi Ltd | Output controller |
| JPS56101400A (en) * | 1980-01-14 | 1981-08-13 | Hitachi Ltd | Pulse motor control system |
-
1982
- 1982-06-29 JP JP9776082U patent/JPS594008U/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS554638A (en) * | 1978-06-28 | 1980-01-14 | Hitachi Ltd | Input/output device base for sequence controller |
| JPS554636A (en) * | 1978-06-28 | 1980-01-14 | Hitachi Ltd | Output controller |
| JPS56101400A (en) * | 1980-01-14 | 1981-08-13 | Hitachi Ltd | Pulse motor control system |
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