JPS5935834Y2 - analog electronic clock - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an analog electronic watch with a battery life warning device.

An object of the present invention is to facilitate the formation of a signal for displaying a battery life warning in an analog electronic timepiece.

Conventionally, mechanical display type quartz watches have an oscillation circuit using a crystal oscillator and the output of this oscillation circuit as a second signal.
It consists of a frequency dividing circuit that divides the frequency by , and a drive circuit that shapes the output of this frequency dividing circuit and drives a motor for displaying the hands.

Furthermore, a frequency dividing circuit reset function is usually added to stop the second hand and set the time.

When you pull the crown, which is the external contact of the watch, the frequency dividing circuit is reset and the second hand stops, and when you return the crown to its original position, the hands start moving again one second later.

However, special measures are required to ensure that the second hand is driven one second after the reset is released.

This is because, while the stop position (polarity) of the rotor of the step motor that drives the second hand changes depending on the timing of the reset, the polarity of the step motor drive signal that is first output from the frequency dividing circuit after the reset is released is one-sided. This is because it is stipulated in

Therefore, in order to ensure that the second hand is driven 1 second after the reset is released, it is necessary to configure the final stage of the frequency divider circuit so that only the final stage remains in its pre-reset state without being reset. becomes.

A circuit that controls the second hand so that it is always driven one second after the reset is released regardless of the stop position of the rotor is called a per-second regulation circuit.

Furthermore, in the case of a quartz watch, a device may be installed that warns the wearer of a drop in battery voltage and prompts the wearer to replace the battery.

The present invention provides a means for simplifying the circuit by combining the battery voltage detection circuit and the above-mentioned per-second regulation circuit.

FIG. 1 is an example of a timepiece circuit according to the present invention.

The output of the oscillation circuit O8C using crystal 1 is F1 to F16.
Finally, a 1/2 frequency divider circuit generates a 2Hz signal.

2, 11.17 is a delay type flip-flop,
The input signal is delayed by a half period of the clock pulse.

The reset terminal of FIO"T15 has a reset manual power of 22
A reset signal is applied from the chatter prevention circuit 21 through the chatter prevention circuit 21.

Therefore, the FIO"T15 is always directly reset.

If F"to is directly reset, the state before the reset is not stored, so no reset signal is applied during normal operation.

Also, if T15 is reset, when the output of T15 changes, it may trigger F''to and change the contents, so use flip-flop 2 and an AND gate.
The output of T15 is differentiated to obtain a clock of "16".

Block 9 is a battery voltage detection circuit.

A sampling signal 8 having a pulse width of about 1 m5 ec to 4 m sec with a period of 2 seconds is generated from the master signal 4 of F"ta and the output signal 7 of T7 using a flip-flop 11.

Since the circuit 9 consumes several μA to several tens of μA of current, the circuit 9 performs sampling and does not consume current at other times to reduce the average current consumption.

The output 12 of the voltage detection circuit is normally at the "H" level, and becomes the "L" level when the voltage drops.

The flip-flop 13 serves as a memory that stores the contents of the flip-flop 12 until it is unsynchronized.

Therefore, the signal 14 normally goes to the "L" level when the tt Hu level voltage drops.

The motor drive pulse forming flip-flop 17 forms a pulse width for driving the motor, and has a width of 19.20.
output as a step motor drive waveform for needle drive.

FIG. 2 shows an example of the output waveform of this drive current, where A indicates normal operation and A indicates voltage drop.

Normally T1 is 2 seconds, T2 is 1 second, and T3 is 7.8 to 15.
6? ? Z see, T4 is 62.5 m 5ec
It is approximately N12.5 msec.

In the case of a, the second hand moves regularly at one-second intervals, which is the minimum time display unit, but in the case of a mouth, it moves in two steps, once every two seconds, to warn the wearer of low battery life.

Pulse width T3 is F. is the same as the pulse width of the output of , and is formed by the motor drive pulse forming flip-flop 17.

Conventionally, an independent flip-flop was required to form the pulse interval T4, but in this invention, we focus on the existence of a per-second regulation circuit, and create a certain relationship between the per-second regulation circuit and the battery life warning circuit. Therefore, it can be easily formed using only Game) 15 and 16.

FIG. 3 shows a timing chart in the circuit of FIG. 1, and the pulse width of clock pulse 3 at T16 is T4.
The clock 6 of the flip-flop 2 is used so that it is the same as the clock 6 of the flip-flop 2.

Therefore, the waveform M at T16. As shown by S, signal 1
When 4 is at the "H" level, 18 becomes like A, and when the voltage drops, it becomes like Mou.

The motor drive pulse forming flip-flop 17 outputs a signal delayed by three half cycles of the clock input 26 with respect to the write input 18 .

As a result, the output 19 of the AND gate is a signal with a pulse width of T3, synchronized with the falling edge of the write input 18, and the output 20 is a signal with a pulse width of T3, synchronized with the rising edge of 18. .

As a result, the pulse width of the signal 18 changes from T to T4 when the voltage drops or when the voltage is normal, so the outputs 19 and 20 are supplied to the motor drive coil via the driver, and the voltage is as shown in Figure 2. A motor drive current waveform whose direction changes alternately as shown in Figure 9 is obtained.

Therefore, the master-slave type flip-flop F16
If the waveform of the output 4.5 is made as in this example, the signal of T4 can be easily formed using gates 15 and 16 (the number of elements is 6).

As described above, the present invention can simplify the circuit by making the pulse width of the input clock signal at the final stage of the reset per second regulation circuit and frequency dividing circuit the same as the pulse width of the signal for battery life warning display. .

[Brief explanation of the drawing]

FIG. 1 shows an example of the configuration of a part of the watch circuit according to the present invention. F1 to F16... Frequency dividing circuit, 2,11.17... Delay type flip-flop, motor drive pulse forming flip-flop. 13... Memory 21... Chatter prevention circuit, 9.
...Voltage detection circuit. Figure 2 is an example of the step motor drive waveform for the needle display. A: Normally, Mouth: When the battery voltage drops. Figure 3 shows the operating waveforms of the circuit shown in Figure 1.

Claims (1)

[Scope of utility model registration request] In an analog electronic clock consisting of an oscillation circuit, a frequency dividing circuit, a per-second regulation circuit, a step motor drive pulse forming circuit, and a battery life warning circuit, the input of the final stage of the frequency dividing circuit is connected to the input of the stage preceding the final stage. Input the differential signal of the output signal,
The battery life warning circuit outputs a first detection signal when the battery voltage is normal, and outputs a second detection signal when the battery voltage drops;
The master output and slave output of the final stage frequency divider circuit are input to a gate circuit, and a write input signal having a first pulse width and a second pulse width is formed according to the first and second detection signals. The step motor drive pulse forming circuit forms step motor drive pulses at intervals of the first pulse width based on the write input signal and the first detection signal, and Step motor drive pulses are formed at intervals of the second pulse width according to the signal, the first pulse width is the time width of the minimum time display unit, and the second pulse width is the pulse width of the differential signal. An analog electronic clock characterized by being identical.