JPH0355116Y2 - - Google Patents

Description

[Detailed Description of the Invention] (Industrial Application Field) The present invention relates to a watch with an alarm function that generates a notification sound at a set time.

(Prior Art) Conventionally, the alarm function of a clock has been most often used for waking up. In this type of usage, alarms are often set at the same time every day. In the case of a normal user, when a notification sound is generated every morning and the user knows that the set time has arrived, he or she will stop the notification sound with the alarm silence switch, and then operate the alarm silence switch again that night to set the alarm to sound. Make it possible. The reason for performing such an operation is that in a normal alarm clock, the indicator switch that detects when the set time has arrived is turned on every 12 hours, and the alarm switch stops the notification sound. If you enable the alarm to sound immediately,
This is because the notification sound will be generated two hours later (that is, if the setting is 7 a.m., then 7 p.m.), which is completely unnecessary for the user.

For this reason, the user had enabled the alarm to sound after the 12-hour time had passed.
Sometimes I forget to do this, and I get flustered when my alarm doesn't work in the morning.

In order to solve this problem, a clock using a 24-hour indicator mechanism that turns on every 24 hours has been proposed, as shown in Japanese Patent Application Laid-open No. 184878/1983. With this watch, even if you enable the alarm to sound immediately after the notification sound stops, the notification sound will not be generated at the same time 12 hours later.

(Problems that the invention aims to solve) However, the 24-hour reference mechanism has a problem that the structure is more complicated than the normal 12-hour reference mechanism, and conventional movements that only have a 12-hour reference mechanism have It was not possible to use it.

(Means for Solving the Problems) In order to solve the above-mentioned problems, the present invention provides an external switch for stopping the notification sound, and a time when the target signal is turned on for the first time after the external switch is turned on, that is, the notification sound. A counter that counts the time until it exceeds the unnecessary 12-hour time, a latch circuit that is set by operating an external switch and reset by the output signal of the counter, and a latch circuit that counts the time until it exceeds the unnecessary 12-hour time. The device is characterized by comprising a gate circuit that supplies a notification signal to a sound generation circuit that generates a notification sound only when the mechanism is on.

(Embodiment) FIG. 1 is a circuit diagram of an alarm clock according to an embodiment of the present invention, and FIG. 2 is a timing chart showing its operation.

In the figure, 2 is a reference signal generator, which is composed of an oscillator 4 and a frequency dividing circuit 6. The time display mechanism 8 is driven by the signal from the reference signal generator 2 to visually display the time. For this purpose, the time display mechanism 8 includes a waveform shaping circuit 10 that shapes the waveform of a signal, a drive circuit 12 that amplifies the waveform-shaped signal, a motor 14, and a pointer 18 driven by a wheel train 16. .

Added to the wheel train 16 is a reference mechanism 20 that turns on at a set time and generates this on signal every 12 hours.

On signal (H level) from this guide mechanism 20
is converted into a positive single pulse by the one-shot multivibrator 22, and is inverted and input to the NAND gate 24 constituting the RSFF. As a result, the output of the NAND gate 26 constituting the RSFF becomes L level, and this output becomes the AND gate 26.
8 and input it. The AND gate 28 also receives the ON signal from the reference mechanism 20 which is at H level, the L level output from the NAND gate 30 forming the RSFF, and the audio frequency signal φ ₁ from the frequency dividing circuit 6. ing. Of these, the output from the NAND gate 30 is inverted and input, so the AND gate 28 outputs a signal that is in phase with the audio frequency signal φ ₁ as a notification signal, and the notification signal is transmitted to the resistor 32, transistor 34, and speaker. The signal is input to a sound generation circuit 38 consisting of 36 components.

In this way, the notification sound is generated at the time set by the guide mechanism 20.

In this embodiment, a snooze mechanism is added that temporarily stops the notification sound by operating a switch while the notification sound is being generated, and generates the notification sound again after a certain period of time. A snooze counter 42 for counting downtime is added.

When the snooze switch 40 is operated, a single positive pulse is generated from the one-shot multivibrator 44, and this pulse is inverted and input to the NAND gate 24. If the notification sound is being generated, the output signal of the NAND gate 24 rises from the L level to the H level, the AND gate 28 is closed, the notification signal is no longer supplied to the sound generation circuit 38, and the notification sound is stopped. Also, Nand Gate 24
The output signal is input to the NOR gate 46. Therefore, the output signal of the NOR gate 46 becomes L level,
The signal is input to the reset input R of the snooze counter 42, and the snooze counter 42 is released from reset and counts the signal from the frequency divider circuit 6.

After a certain period of time, for example 256 seconds, a carry signal from the snooze counter 42 is output, and this carry signal is inverted and input to the NAND gate 26. As a result, the output signal of the NAND gate 24 returns to the L level, the AND gate 28 becomes open again, and a notification sound is generated.

This operation is performed every time the snooze switch 40 is operated until the ON signal from the indicator mechanism 20 falls to the L level.

What is unique about this invention is that if you operate the switch to stop the alarm sound, the alarm sound will be generated at the same time 24 hours later, even if you do not operate the alarm alarm again, and 12 hours later in the morning. - The system is configured so that the notification sound is not emitted at the same time, although it is different in the afternoon. To this end, in this embodiment, the carry outputs of the external switch 48 for stopping the alarm and the snooze counter 42 are counted, and the carry signal is output after counting a period longer than the ON signal generation cycle of the reference mechanism 20, that is, 13 hours. It has an output counter 50 and further includes NAND gates 30 and 52 that constitute RSFF.

Therefore, when the external switch 48 is turned on while the notification sound is being generated, a positive single pulse is inverted and input to the NAND gate 30 via the one-shot multivibrator 54. As a result, the output of the NAND gate 30 becomes H level, the AND gate 28 is closed, and the notification sound stops. Further, the output signal of the NOR gate 46 to which the H level signal of the NAND gate 30 is input becomes L level.
The snooze counters 42 and 50 start counting after being reset. Thereafter, a carry signal is supplied from the snooze counter 42 to the NAND gate 26 every 256 seconds, but there is no change due to this.

When 12 hours have passed from now on, that is, when the morning and afternoon are different but the same time, the on signal of the 12-hour period reference mechanism 20 rises to H again. However, since the H level output signal of the NAND gate 30 is inverted and inputted to the AND gate 28, it remains closed and does not generate any notification sound.
Further, the output signal of the NAND gate 24, which has become H level due to the positive single pulse from the one-shot multivibrator 22, returns to the L level due to the carry signal from the snooze counter 42 every 256 seconds.

After 13 hours have passed, the carry signal of the counter 50 becomes H level, and this signal is inverted and input to the NAND gate 52. As a result, the output of NAND gate 30 falls to the L level, and at the same time counters 42 and 50 are reset.

Then, when another 24 hours have passed, that is, at the same time on the next day, the on signal of the reference mechanism 20 becomes H level. As a result, as described above, the AND gate 28 becomes open and a notification sound is generated.

If the snooze switch 40 is operated here, the snooze operation will be started, and if the external switch 48 is operated, the notification sound will not be generated until the same time on the next day.

In this embodiment, an external switch 58 is connected to the NAND gate 52 via a one-shot multivibrator 56.
If 8 is operated during snooze or alarm stop, counters 42 and 50 are reset and the snooze or 24-hour notification sound generation operation is invalidated. The initial reset circuit 60 also resets the NAND gates 26 and 5 in order to temporarily reset the RSFF and counters 42 and 50 at the same time as the power is turned on.
The configuration is such that a negative single pulse is supplied to 2.

In this embodiment, the count time of the counters 42 and 50 is set to 13 hours, but the count time T can be freely set within the range of 12 hours<T<24 hours. Further, in this embodiment, the snooze switch 40 and the external switch 48 for stopping the notification are provided separately, but one external switch, a counter for counting the operating time of this external switch, and a count value of the counter are used. By providing a switching circuit for distributing external switch signals to snooze or notification stop, the two switches 40 and 48 can be used as one switch.

(Effects of the invention) As described above, according to the invention, the user can make the alarm sound at the same time on the next day at the same time as the notification is stopped by simply performing the operation to stop the notification.
Moreover, the alarm sound that occurs after 12 hours can be blocked. Therefore, the user does not need to return the alarm to a soundable state before going to bed, and the operation becomes simple. In addition, the present invention does not require a complicated and special indicator mechanism for the 24-hour system, so it can be easily applied to conventional alarm clock movements, resulting in high versatility and low production costs. .

[Brief explanation of the drawing]

FIG. 1 shows a watch with an alarm function according to an embodiment of the present invention. FIG. 2 is a timing chart showing the operation of FIG. 1. 2... Reference signal generator, 8... Time display mechanism,
20...Standard mechanism, 28...And gate, 3
0, 52...Nand gate, 48...External switch, 50...Counter.

Claims (1)

[Scope of utility model registration request] a reference signal generator; a time display mechanism that is driven by a signal from the reference signal generator to display the time; and the time display mechanism outputs an on signal at a set time, and the on signal is generated at a cycle of 12 hours. In a watch with an alarm function, the watch is comprised of a reference switch that repeats at Count the signals from
a counter that generates an output signal after a period of less than 24 hours but more than 12 hours; a latch circuit that is set by the operation of the external switch and reset by the output signal of the counter; A timepiece with an alarm function, comprising: a gate circuit that supplies an on signal from a switch to the sound generation circuit to generate a sound.