JPS6135991Y2 - - Google Patents

Description

[Detailed explanation of the idea] The present invention relates to an alarm clock.

Conventionally, there are clocks on the market that have a temporary stop function that causes the alarm sound to stop for a few minutes and then start again.

The present invention is an improved version of the watch that has this temporary stop function, and has a timer function and a notification sound by emitting a notification sound at regular intervals when the temporary stop is performed. It is.

An embodiment of the present invention will be described below based on the drawings. In FIG. 1, Q is a crystal oscillator, D is a frequency divider, B is an alarm signal generating circuit, and A is a sounding device that generates alarm and notification sounds. _G1 is a temporary stop time counter, _F1 and _F2 are flip-flop circuits, and _G1 ... _G4 are gate circuits.
V ₁ is an inverter, H ₁ is a differential circuit, S is a temporary stop switch, and r is a resistor.

Next, the operation will be explained. Gate circuit G ₁
The output of an alarm switch (not shown) is supplied to the input terminal a of the circuit, and is normally held at "1", and the flip-flop circuit _F1 is set and the counter _C1 is reset. There is. Therefore, terminal a becomes “0” at the alarm time.
When the signal is reversed, the gate circuit _G2 is opened via the inverter _V1 , and the alarm signal from the alarm signal generating circuit B passes through the gate circuits _G2 and _G4 , and the sounding device A generates an alarm sound.

And to temporarily stop the alarm sound,
When switch S is closed and then reopened, flip-flop circuit _F1 is reset, gate circuit _G2 is closed, and the alarm sound stops. On the other hand, counter C ₁
After being reset, it starts counting the temporary stop time, and an output is generated from its terminal b every minute, and the flip-flop circuit _F2 is set by the differential pulse. Flip-flop circuit F ₂
is caused by a 2Hz pulse from terminal _d1 of frequency divider D.
It will be reset after moving to 1/4. Therefore, from the output Q of the flip-flop circuit _F2 , the width is 1/4 at a period of 1 minute.
A second pulse occurs and gate circuit G ₃ opens. The notification signal from the terminal d ₂ of the frequency divider D or the gate circuit G ₃ ,
The signal passes through _G4 and is supplied to sound generating device A to generate a notification sound.

In this way, a notification sound is generated every minute to notify that the alarm sound is temporarily stopped.

Then, for example, after about 5 minutes,
An output is produced at terminal e of counter C, triggering flip-flop circuit _F1 and inverting its output Q,. Therefore, gate circuit _G2 opens and the alarm sound is generated again.

By the way, since the above-mentioned notification sound is generated every minute, it can be used as a one-minute timer.

Next, an example will be described in which the number of notification sounds is increased as the temporary stop time elapses. In Figure 2, _C2 is a counter that counts the number of notification sounds, and M
is a comparison circuit, _G5 is a gate circuit, _V2 is an inverter, and _H2 is a differentiation circuit.

In the above configuration, similar to the above embodiment,
After one minute has passed after the alarm sound is temporarily stopped by the switch S, the flip-flop circuit _F2 is set by the output of the counter _C1 .
The notification signal from the terminal _d2 is supplied to the sound generating device A via the gate circuits _G3 and _G4 , and a notification sound is generated. At the end of the first notification sound generation, the counter _C2 counts 1 by the output of the inverter _V2 . Since this coincides with the contents of counter _C1 , an output is generated from comparator circuit M, the differential pulse of which resets counter _C2 and flip-flop circuit _F2 . Therefore, one minute after the temporary stop, only one notification sound is generated.

When one more minute passes, the counter _C1 counts two minutes, so when the notification sound is generated twice and the counter _C2 counts 2, an output is generated from the comparator circuit M and the notification sound stops.

In this way, the notification sound is generated three times after three minutes and four times after four minutes after the temporary stop operation.

Note that the interval at which the notification sound is generated is not limited to one minute.

As described above, according to the present invention, the notification sound is generated at regular intervals while the alarm sound is temporarily stopped, so that it is possible to recognize that the alarm sound is temporarily stopped, and it can also be used as a timer.

Furthermore, if the number of notification sounds is increased over time, the elapsed time from the temporary stop operation can be determined based on the number of notification sounds, which is also effective when used as a timer.

[Brief explanation of the drawing]

FIG. 1 is an electrical circuit diagram showing one embodiment of the present invention, and FIG. 2 is an electrical circuit diagram showing another embodiment. _C1 ...Counter, _F1 , _F2 ...Flip-flop circuit, _G1 to _G4 ...Gate circuit, A ...Sound generating device, S...Switch, _C2 ...Counter, M...
Comparison circuit, G ₅ ... gate circuit.

Claims (1)

[Scope of Claim for Utility Model Registration] (1) A control device that temporarily stops the alarm sound by manual operation and then restarts it, and generates at least one pulse at regular intervals while the alarm sound is temporarily stopped. An alarm clock equipped with a pulse generation circuit and a notification device that generates a notification sound using pulses from the pulse generation circuit. (2) The alarm clock according to claim 1, wherein the notification device also serves as an alarm sound generating device. (3) The alarm clock according to claim 1, wherein the pulse generating circuit gradually increases the number of output pulses as the temporary stop time elapses.