JPS58134100U - Clock synchronous motor drive circuit - Google Patents

Clock synchronous motor drive circuit

Info

Publication number
JPS58134100U
JPS58134100U JP3078982U JP3078982U JPS58134100U JP S58134100 U JPS58134100 U JP S58134100U JP 3078982 U JP3078982 U JP 3078982U JP 3078982 U JP3078982 U JP 3078982U JP S58134100 U JPS58134100 U JP S58134100U
Authority
JP
Japan
Prior art keywords
pulse
drive
circuit
drive pulse
watch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3078982U
Other languages
Japanese (ja)
Inventor
秀樹 森島
善登 山口
Original Assignee
リズム時計工業株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by リズム時計工業株式会社 filed Critical リズム時計工業株式会社
Priority to JP3078982U priority Critical patent/JPS58134100U/en
Publication of JPS58134100U publication Critical patent/JPS58134100U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本考案の第1実施例を示す回路図、第2図は
、第1図における波形図、第3図は、本考案の第2実施
例を示す回路図、第4図は、第2図における波形図。 2・・・・・・基準信号発生器、4・・・・・・分周回
路、6゜52・・・・・・パルス形成回路、24・・・
・・・時計用同期モータ、26・・・・・・パルス供給
停止回路、38・・・・・・パルス供給停止スイッチ、
40・・・・・・初期リセット回路、42・・・・・・
切替回路。 A、J’trLローー−−−−− A2rLrじL−−−−−− s、JLJLJL−−−−二 B2化JLrL−−−− −J’L几且j −−−i++11u11し −。 −−一−−ゴし几ゴし几 也亀几几几五且−一也也rLrL
1 is a circuit diagram showing a first embodiment of the present invention, FIG. 2 is a waveform diagram in FIG. 1, FIG. 3 is a circuit diagram showing a second embodiment of the present invention, and FIG. 4 is a circuit diagram showing a second embodiment of the present invention. , the waveform diagram in FIG. 2... Reference signal generator, 4... Frequency dividing circuit, 6゜52... Pulse forming circuit, 24...
... Synchronous motor for clock, 26 ... Pulse supply stop circuit, 38 ... Pulse supply stop switch,
40...Initial reset circuit, 42...
switching circuit. A. −−1−−GoshikagoshiRinyaKameRinRin5Kan-KazuyarLrL

Claims (3)

【実用新案登録請求の範囲】[Scope of utility model registration request] (1)  基準信号発生器と、基準信号発生器からの信
号を所要周波数まで分周する分周回路と、分周回路から
の信号により電流量の大きい駆動パルスと電流量の小さ
い駆動パルスとを形成する駆動パルス形成回路と、電源
電池投入時を検出する初期リセット回路と、時計用モー
タに供給される駆動パルスを停止するパルス供給停止ス
イッチと、電源電池投入時および前記パルス供給停止ス
イッチ操作終了後から一定時間のみ電流量の大きい駆動
パルスを時計用同期モータに供給し、それ以外は電流量
の少さい駆動パルスを時計用同期モータに供給させる切
替回路と、を有する時計用同期モータの駆動回路。
(1) A reference signal generator, a frequency dividing circuit that divides the signal from the reference signal generator to a required frequency, and a drive pulse with a large amount of current and a drive pulse with a small amount of current by the signal from the frequency dividing circuit. an initial reset circuit that detects when the power battery is turned on; a pulse supply stop switch that stops the drive pulses supplied to the watch motor; and a pulse supply stop switch that stops the drive pulses supplied to the watch motor; Driving a synchronous motor for a watch, comprising a switching circuit that later supplies a drive pulse with a large amount of current to the synchronous motor for a watch only for a certain period of time, and then supplies a drive pulse with a small amount of current to the synchronous motor for the watch at other times. circuit.
(2)実用新案登録請求の範囲第1項記載において、駆
動パルス形成回路が、パルス幅の広い駆動パルスとパル
ス幅の狭い駆動パルスとを形成することを特徴とする時
計用同期モータの駆動回路。
(2) Utility Model Registration Scope of the Claims Claim 1, wherein the drive circuit for a synchronous motor for a timepiece is characterized in that the drive pulse forming circuit forms a drive pulse with a wide pulse width and a drive pulse with a narrow pulse width. .
(3)  実用新案登録請求の範囲第1項記載において
、駆動パルス形成回路が、パルス電流値の大きい駆動パ
ルスとパルス電流値の小さい駆動パルスとを形成したこ
とを特徴とする時計用同期モー  □りの駆動回路。
(3) The synchronous mode for a watch as set forth in claim 1 of the utility model registration claim, characterized in that the drive pulse forming circuit forms a drive pulse with a large pulse current value and a drive pulse with a small pulse current value □ drive circuit.
JP3078982U 1982-03-03 1982-03-03 Clock synchronous motor drive circuit Pending JPS58134100U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3078982U JPS58134100U (en) 1982-03-03 1982-03-03 Clock synchronous motor drive circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3078982U JPS58134100U (en) 1982-03-03 1982-03-03 Clock synchronous motor drive circuit

Publications (1)

Publication Number Publication Date
JPS58134100U true JPS58134100U (en) 1983-09-09

Family

ID=30042478

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3078982U Pending JPS58134100U (en) 1982-03-03 1982-03-03 Clock synchronous motor drive circuit

Country Status (1)

Country Link
JP (1) JPS58134100U (en)

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