JPS5934629A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5934629A
JPS5934629A JP14541582A JP14541582A JPS5934629A JP S5934629 A JPS5934629 A JP S5934629A JP 14541582 A JP14541582 A JP 14541582A JP 14541582 A JP14541582 A JP 14541582A JP S5934629 A JPS5934629 A JP S5934629A
Authority
JP
Japan
Prior art keywords
layer
epitaxial
grown
epitaxial growth
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14541582A
Other languages
Japanese (ja)
Inventor
Masanobu Ogino
荻野 正信
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP14541582A priority Critical patent/JPS5934629A/en
Publication of JPS5934629A publication Critical patent/JPS5934629A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Cleaning Or Drying Semiconductors (AREA)

Abstract

PURPOSE:To obtain the semiconductor device, in which an excellent epitaxial growth layer is acquired, by thermally treating a substrate at a specific temperature in an oxidizing atmosphere and removing an oxide film formed to the surface of the substrate. CONSTITUTION:A wafer is divided into halves and one of them is thermally treated in an oxygen atmosphere for 1.5hr at 1,000 deg.C or more such as 1,100 deg.C, the oxide film formed is removed by hydrofluoric acid, the wafer is entered in an epitaxial growth oven, and a silicon epitaxial layer is grown in 5mum. The other is entered in the epitaxial growth oven as it is forcomparison, and an epitaxial layer is grown only by the same film thickness. Both layers are grown in an epitaxial manner through a normal method in which the surface layer of the substrate in 0.5mum is removed in a mixed gas atmosphere of HCl+H2 at 1,200 deg.C and the layer is grown at a growth rate of 1mum/min at 1,200 deg.C by using a mixed gas of SiCl4+ H2. Stacking faults are decreased and defects induced on epitaxial growth can also be reduced in the growth layer forme a in this manner. Defects difficult to be observed or defects, etc. observed as pits of shallow bottoms, shallow pits, can also be reduced remarkably.

Description

【発明の詳細な説明】 〔発明の技術分野〕 この発明は半導体装置の製造方法に係り、特にエピタキ
シャル成長層形成工程を含む半導体装置の製造方法に関
する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a method for manufacturing a semiconductor device, and particularly to a method for manufacturing a semiconductor device including an epitaxial growth layer forming step.

〔発明の技術的背景とその問題点J シリコン基板上にエピタキシャル層を成長させる場合、
この基板表面の清浄度が非常に重要となる。このような
場合に基板表面を′まず塩化水素ガスで軽く触除した後
エピタキシャル成長を行なう方法が一般にとられている
。この方法で現在エピタキシャル成長層の積層欠陥は1
0ケ/d程度に押えられている。しかし中には20ケ/
cfI1以上発生する場合もかなり多く、単にエピタキ
シャル成長開始前に塩化水素ガスで表面層を除去するだ
けでは不十分である事が判明したのである。
[Technical background of the invention and its problems J When growing an epitaxial layer on a silicon substrate,
The cleanliness of this substrate surface is very important. In such cases, a method generally used is to first lightly ablate the substrate surface with hydrogen chloride gas and then perform epitaxial growth. With this method, the stacking fault in the epitaxially grown layer is currently 1.
It is held down to about 0 pieces/d. However, there are 20 pieces/
There are many cases where cfI1 or more occurs, and it has been found that simply removing the surface layer with hydrogen chloride gas before the start of epitaxial growth is insufficient.

〔発明の目的〕[Purpose of the invention]

この発明は、エピタキシャル成長層形成工程を改め、良
質なエピタキシャル成長層を得させる半導体装置の製造
方法を提供するにある。
The object of the present invention is to provide a method for manufacturing a semiconductor device that improves the epitaxial growth layer forming process and allows a high-quality epitaxial growth layer to be obtained.

〔発明の概要〕[Summary of the invention]

即ちこの発明はシリコン基板表面についてエピタキシャ
ル成長層を形成させるにあたり、予じめこの基板を[1
’2化性雰囲気中で1000℃以上で熱処理し、この結
果基板表面に形成された酸化膜を除去する工程を経過さ
せる半導体装1CJの製造方法にある。
That is, in this invention, when forming an epitaxial growth layer on the surface of a silicon substrate, the substrate is preliminarily heated to [1].
A method for manufacturing a semiconductor device 1CJ includes a step of performing heat treatment at 1000° C. or higher in a bicarbonate atmosphere and removing an oxide film formed on the surface of the substrate as a result.

このようなこの発明で熱処理温度は、高温であることが
望ましく、1000℃以上であることが効果を良好にす
る事が判明している。このように熱処理し、酸化膜除去
工程を経過させた後、この而にエピタキシャル成長j菌
を常法により形成した場合、著しくその膜質を改善する
事が出来る。
In this invention, the heat treatment temperature is desirably high, and it has been found that a temperature of 1000° C. or higher improves the effect. After the heat treatment and oxide film removal step, if an epitaxially grown microorganism is then formed by a conventional method, the quality of the film can be significantly improved.

熱処理後に行うエピタキシャル成長は、FICl+H2
の混合ガス雰囲気で基板表面を触除した後8iC4+ 
H2混合ガヌにより成長させる常法によるものでよろし
い。
Epitaxial growth performed after heat treatment is FICl+H2
After touching the substrate surface in a mixed gas atmosphere of 8iC4+
It may be grown by the conventional method of growing with H2 mixed GUN.

〔発明の実施例〕[Embodiments of the invention]

次にこの発明の実施例について述べる。 Next, embodiments of this invention will be described.

この例に用いた半導体蟇板はP型で、比抵抗2〜6Ω1
のシリコン(100)ウェーノーである。このウェーハ
をまず半割する。このう4明に従い壕ず一方を1100
℃で1.5時間酸素雰囲気中で熱処理し、形成された酸
化1jりを弗化水素酸で除去した後、エピタキシャル成
長炉に入れ、シリコンエビタギシャル層を511m成長
させる。他方は比較のためそのままエピタキシャル成長
炉に入れ、同じ膜厚だけエピタキシャル層を成長させる
The semiconductor plate used in this example is P type, with a specific resistance of 2 to 6Ω1.
silicon (100) waeno. This wafer is first cut in half. 1100 on one side according to the fourth light.
C. for 1.5 hours in an oxygen atmosphere, and after removing the formed oxide 1j with hydrofluoric acid, it is placed in an epitaxial growth furnace and a silicon epitaxial layer is grown to a thickness of 511 m. For comparison, the other layer was placed in an epitaxial growth furnace as it was, and an epitaxial layer was grown to the same thickness.

エピタキシャル成長は双方とも、1200℃でH(J−
1−H,の混合ガス雰囲気で0.511m基板表面層を
除去した後、8 i C4+ H2混合ガスを用い12
00℃で1μffi/m I n−の成長速度で成長さ
せる常法によっている。形成された成長層について顕微
鏡により積層欠陥の密度を測定する。さらに又1100
℃、90分、スチーム中で酸化後選択エツチングを施し
、再び欠陥を観察する。
Both epitaxial growths were carried out at 1200°C using H(J-
After removing a 0.511 m substrate surface layer in a mixed gas atmosphere of 1-H, 12
A conventional method of growing at a growth rate of 1 μffi/m I n− at 00° C. is used. The density of stacking faults in the formed growth layer is measured using a microscope. Yet another 1100
After oxidation in steam for 90 minutes at °C, selective etching is performed and defects are observed again.

第1表にエピタキシャル成長後の積層欠陥密度を比較し
、第2表に、さらに1100℃、90分、スチーム酸化
後選択エツチングを施した時現われた積層欠陥、シャロ
ービットの各欠陥密度を比較して示す。これらの表から
明らかなようにこの発明の実施例方法によれば、従来例
方法によるものに比較して画表共欠陥を著しく減少して
いる事が認められる。
Table 1 compares the stacking fault density after epitaxial growth, and Table 2 compares the stacking fault density and shallow bit defect density that appeared when selective etching was performed after steam oxidation at 1100°C for 90 minutes. show. As is clear from these tables, it can be seen that according to the method of the embodiment of the present invention, defects on both the image and the surface are significantly reduced compared to the method according to the conventional example.

第1表 第 2 表 上記実施例においては酸素雰囲気で熱処理を施している
が、他の酸化性雰囲気、(+11えはスチーム、あるい
は酸素と塩化水素との混合4囲気等を用いてよろしい。
Table 1 Table 2 In the above examples, heat treatment was performed in an oxygen atmosphere, but other oxidizing atmospheres such as steam or a mixed atmosphere of oxygen and hydrogen chloride may be used.

又シリコン基板上にシリコンをエピタキシャル成長させ
る場合のほか、例えはシリコン基板上にk1203、C
eO2をエピタキシャル成長させる場合にも同様に効果
を奏する。さらに、バイポーラIC用のエピタキシャル
基板などに用いられる一部拡散領域を含んだシリコン基
板についても、エピタキシャル成長層の欠陥を減少させ
る事が出来る。但しこの場合には、拡散マスクとして使
!4]シた酸化膜及び拡散中に形成された酸化膜を除去
した後、この発明を適用する事が肝要である。
In addition to epitaxial growth of silicon on a silicon substrate, for example, k1203, C
A similar effect is produced when eO2 is grown epitaxially. Furthermore, defects in the epitaxial growth layer can also be reduced for silicon substrates including a partial diffusion region used as epitaxial substrates for bipolar ICs and the like. However, in this case, use it as a diffusion mask! 4] It is important to apply this invention after removing the fallen oxide film and the oxide film formed during diffusion.

〔発明の効果〕〔Effect of the invention〕

このようなとの発明によれは精ハ1欠陥を減少させる事
が出来る他、エピタキシャル成長時に銹起される欠陥を
も減少させる事が出来る。観察困難な欠陥については、
酸化後選択エツチングを行ない見易い大きさにして観察
しているがこの程度の積層欠陥とか、或いは底の浅いい
わゆるシャロービットとして観察される欠陥などをも著
しく減少させる事が出来る。この様な種々の欠陥は放置
されると、エピタキシャル層内のライフタイムを劣化し
あるいはそこに作られるPNジャンクションのリーク電
流を増大するが、この発明の方法によれば、この様な劣
化を防ぎ、エピタキシャル基板を用いる種々の半導体製
品の歩留を上ける事が出来る。
According to the invention as described above, it is possible to reduce not only the number of defects in the fine grain, but also the defects caused during epitaxial growth. For defects that are difficult to observe,
Selective etching is performed after oxidation to make it easier to observe, but stacking faults of this magnitude or defects observed as so-called shallow bits can be significantly reduced. If these various defects are left untreated, they will degrade the lifetime within the epitaxial layer or increase the leakage current of the PN junction created there; however, according to the method of the present invention, such deterioration can be prevented. , it is possible to increase the yield of various semiconductor products using epitaxial substrates.

代理人 弁理士 井 上 −男Agent Patent Attorney Inoue - Male

Claims (1)

【特許請求の範囲】[Claims] シリコン基板表面についてエピタキシャル成長層を形成
するにあたり、予じめこの基板を酸化性雰囲気中100
0℃以上で熱処理し、この結果基板表面に形成された酸
化膜を除去する工程を経過させることを特徴とする半導
体装置の製造方法
Before forming an epitaxial growth layer on the surface of a silicon substrate, the substrate is heated in advance in an oxidizing atmosphere for 100 mL.
A method for manufacturing a semiconductor device, comprising a step of performing heat treatment at 0° C. or higher and removing an oxide film formed on the surface of the substrate as a result.
JP14541582A 1982-08-23 1982-08-23 Manufacture of semiconductor device Pending JPS5934629A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14541582A JPS5934629A (en) 1982-08-23 1982-08-23 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14541582A JPS5934629A (en) 1982-08-23 1982-08-23 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5934629A true JPS5934629A (en) 1984-02-25

Family

ID=15384722

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14541582A Pending JPS5934629A (en) 1982-08-23 1982-08-23 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5934629A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6169669A (en) * 1984-09-11 1986-04-10 Teijin Seiki Co Ltd Method of collapsing projection on crosswind wound yarn member
US6300147B1 (en) 1999-08-04 2001-10-09 Mitsubishi Denki Kabushiki Kaisha Method of inspecting semiconductor substrate

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6169669A (en) * 1984-09-11 1986-04-10 Teijin Seiki Co Ltd Method of collapsing projection on crosswind wound yarn member
JPH0515628B2 (en) * 1984-09-11 1993-03-02 Teijin Seiki Kk
US6300147B1 (en) 1999-08-04 2001-10-09 Mitsubishi Denki Kabushiki Kaisha Method of inspecting semiconductor substrate

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