JP2607853B2 - Silicon semiconductor wafer diffusion method and discrete substrate manufacturing method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming and processing a deep diffusion layer of impurities in the manufacture of a discrete substrate such as a transistor or a diode, and more particularly, to a method for forming both sides of a wafer sliced from a silicon semiconductor ingot. Diffusion for manufacturing discrete (transistor, diode, etc.) substrates (one side is an impurity diffusion layer, the other side is an impurity non-diffusion layer and the surface is usually mirror-finished) by forming a deep impurity diffusion layer The present invention relates to a method for processing and diffusing a wafer before and a method for processing a wafer after diffusion.

[0002]

2. Description of the Related Art Conventionally, a method of manufacturing a substrate for a discrete method is to use a wafer obtained by lapping a wafer sliced from a silicon semiconductor ingot with a polishing agent or further etching the wafer to perform a first-stage diffusion (that is, diffusion). (Deposition), a plurality of material wafers arranged at regular intervals on a boat are stored in a diffusion tube, and a carrier gas containing a source of a target impurity (P or B or the like) in the tube is used. Then, a mixed gas of N ₂ and O ₂ gas is sent and heat treatment is performed at a desired temperature and for a desired time to diffuse the impurities to a shallow and high concentration on both surfaces of the wafer.

[0003] Next, as a second stage of diffusion (push diffusion), the deposited wafers are arranged in close contact with each other on a separate boat via SiO ₂ powder or the like, and are placed in a diffusion tube. In a carrier gas (mixed gas of N ₂ and O ₂ ), high-temperature and long-time heat treatment is performed to diffuse the impurities to a desired depth and achieve a desired impurity surface concentration. The diffusion layer on one side of the wafer is completely removed by grinding, and the surface of the non-diffusion layer of the impurity is usually mirror-finished while leaving a predetermined thickness to manufacture a discrete substrate.

[0004]

According to the conventional method, compounds called "particles" are formed on both surfaces of the wafer in the second diffusion step at a high temperature for a long time. To explain what is called "particles", compositionally,
It is known that it is composed of N, O, Si, impurities (P or B), etc., but it is an extremely perfect crystal that grows in the crystal axis direction of the material wafer. At present, there is no suitable removal means, and it has had various adverse effects such as falling off in subsequent manufacturing processes (machining process, next diffusion process, washing process, etc.). .

[0005] The above "particles" are shown in FIG.
(B) and (c) show SEM photographs at different magnifications. This example of a micrograph shows an example of a “particle” form generated on a wafer surface when a deposited wafer having a plane orientation of (111) manufactured by the FZ method is diffused at a high temperature for a long time under a predetermined condition. In the case of (111), it can be observed that the crystal grows in the crystal direction (120 °) around the nucleus. The electron microscope (SE
M) The photograph was taken by etching the surface of the wafer after diffusion was shallow to sharpen the image of the “particles”.

It is considered that the processing strain formed during the lapping process has an influence on the generation of the particles, and an etching process (a margin of 20 μm) has been performed to remove the processing strain, and an effective countermeasure has been taken. However, it is now used as a discrete substrate. Although the plane orientation of the wafer is mainly (111) and (100), it is effective for the plane orientation (111) wafer, but is insufficient for the plane orientation (100) wafer. [Especially, deep diffusion layers of power MOS FETs using (100) plane orientation wafers (examples 250 to 300)
It is powerless for μ)]. In addition, although effective for a (111) wafer with a plane orientation, the gettering effect inherent to the processing strain is lost by the processing strain removal, which means that the impurity diffusion (penetration) during the second diffusion step is performed. ) Loses the effect of absorbing dislocations generated in the non-diffusion layer, causing dislocations to be distributed extremely unevenly on the surface on the non-diffusion side.

If the discrete transistor is a transistor, the undiffused layer is a layer formed by the next base and emitter, and the uneven distribution of dislocations causes deterioration of characteristics (particularly leakage current) and variations in the device. Bring the cause. [This state is shown in FIG. The wafer has a plane orientation (111), the diffusion layer is 160 μm, the non-diffusion layer is 90 μm, and the surface is mirror-finished. The mirror surface of the wafer was subjected to a Zirtol etch to show dislocations as etch pits (triangles) and photographed by devising so as not to reflect light. In FIG. 3, white portions in a “strip” shape are dense portions of dislocations (etch pits).
Shown in However, if the processing strain is not removed, a large number of particles will be generated. There is a dilemma.

The present invention has been made in view of the above-mentioned problems of the prior art, and has as its object to prevent the generation of particles regardless of the wafer plane orientation (111) or (100). An object of the present invention is to achieve uniform dislocation and low dislocation at the same time.

[0009]

In order to achieve the above-mentioned object, the present invention employs the following means. That is, the means according to claim 1 is a method for polishing a wafer sliced from a silicon single crystal ingot with an abrasive (FO # 1000 or # 1200).
Lapping (both allowances: 60μ) at the same time on both sides to impart uniform processing strain, and use a wafer of plane orientation (111) or (100) with the required thickness according to the processing method after diffusion is completed. a first diffusion step of depositing the wafer both sides in an atmosphere of impurities, the wafer O ₂ gas 0.5%
10 12 of a gas mixture of Ar or He containing (vol)%
It comprises a second diffusion step of diffusing for 20 hours to 450 hours in an atmosphere of 50 ° C. to 1310 ° C. The required thickness is x _j for the impurity diffusion layer thickness, and the undiffused when a discrete substrate is formed. when the layer thickness and x _i, wafer thickness at that time t
_{1, 2x j + x i + 20} ≦ t 1 ≦ 2x j + x i +80
It is.

According to a second aspect of the present invention, a wafer sliced from a silicon single crystal ingot is coated with an abrasive (FO #).
1000 or # 1200), the both sides are simultaneously lapped (60 μm allowance), uniform processing strain (approximately several μ) is imparted, and the plane orientation (111) or (1) of the required thickness is adjusted to the processing method after diffusion.
A first diffusion step of the above deposition on the wafer both sides using wafer 00), the wafer O ₂ gas 0.5
% To 10 (vol) of the mixed gas of% containing Ar or the He 1
A second diffusion step of performing diffusion for 20 hours to 450 hours in an atmosphere of 250 ° C. to 1310 ° C. , and cutting the wafer into two pieces from a central portion of the thickness width by a single wafer type inner peripheral blade cutting device. And a method of manufacturing a discrete substrate comprising a combination of steps of grinding and polishing the cut surface side. The required thickness t ₂ of the wafer according to the processing method after the diffusion is 2 (x _j + x _i ) + t _c + 75 ≦ t, where the blade thickness of the inner peripheral blade cutting device is t _c (μm). ₂ ≤ 2 (x _j +
x _i ) + t _c +300.

[0011]

Before describing the operation according to the first aspect, the mechanism of particle formation concluded at this stage will be described. Regarding the mechanism of this particle formation, the composition analysis of the particles (N,
O, Si compounds) and the root cause of the particle generation from the facts known so far are as follows: “ O ₂ gas and
It is considered that the wafer is exposed to a high-temperature atmosphere in which N ₂ gas coexists for a long time. The higher the proportion of the N ₂ gas that affects, and naturally the higher the temperature and the longer the time, the larger the number of generated particles and the larger their size. " And the root cause, O ₂ gas of 100% or 'O ₂ gas and N ₂ 100% other gases mixed N ₂ gas other than the gas or' any atmosphere of a mixed of N ₂ gas and another gas other than O ₂ gas Even below, this is supported by the absence of particles regardless of other conditions.

The operation according to the first aspect will be described below. The first aspect is a method for producing a discrete substrate having lower dislocations without generation of particles. These methods are briefly described in the following two conditions: 1) material wafer and that has a uniform "processing strain" (1～10Myu) on both sides are lapped by the abrasive (FO # 1200 or # 1000), (2) a second diffusion O ₂ + Ar gas (He gas)
The processing strain uniformly distributed in the condition (1) is generated in the non-diffusion layer of the impurity by the diffusion of the impurity during the second diffusion due to the gettering effect inherent in the condition (1). Since dislocations are absorbed and the reaction is performed under the condition (2), no particles are generated. That is, the conditions (1) and (2) are complementary pair conditions for manufacturing a low dislocation wafer without particle generation. The discrete substrate is composed of a diffusion layer on one side (x _j ) and an undiffusion layer on the opposite side (x _i ).
As a material wafer is required thickness of a minimum 2x _j + x _i, machining allowance is such as not to become excessive and more than 20μ 8
0 μm or less.

Next, the operation according to claim 2 will be described. Claim 2 briefly describes the following three conditions:
(1) The material wafer is an abrasive (FO # 1200 or # 10)
00), and both sides are uniformly wrapped in “working distortion” (1
〜１０10 μ) and having a “special thickness” about twice as large as the normal thickness in consideration of processing after diffusion. (2) The second diffusion is performed in an atmosphere of O ₂ + Ar gas (or He gas). (3) The wafer after the diffusion is cut into two parts from the center of the thickness and finished into a discrete substrate of a required thickness (naturally, two wafers per material wafer). In this case, the processing according to condition (1) and the operation according to condition (2) are considered to be basically the same as those described above. As well as the required thickness (discussed below) which is about twice as large as that of ordinary wafers in terms of dislocations. It has been demonstrated that it can be reduced to a fraction of a second. (For example, the diffusion depth is 160 μm and the non-diffusion layer is 90 μm.
In one example, the wafer manufactured by the FZ method is 1/1.
0, and 1/2 to 1 for CZ wafers
/ 3 can be reduced. This reason is consistent with the phenomenon even if it is considered that the dislocation generation is alleviated by the thickness of the undiffused portion in the central portion of the wafer.
Therefore, the condition (3) is indispensable so that the material wafer of the condition (1) can use a “special thickness” wafer with the aim of further reducing dislocations. Condition (1) as described above
(2) and (3) complement each other, making it possible to provide a very low-dislocation, high-quality discrete substrate free from particle generation.

The required thickness (t ₂ ) of the material wafer is given by the following equation: 2 (x _j + x _i ) + 330 + 75 ≦ t ₂ ≦ 2 (x _j + x
_i) + 330 + 300 is _{{2 (x j + x i} ) +330} necessary minimum thickness considering the machining form of the formula, (75μ~300μ)
× 1/2 is the grinding and polishing allowance on the cut surface side for one discrete substrate, and a minimum of 37.5μ is required.
Except for the case where the characteristics (low dislocations) are emphasized and the thickness is intentionally further increased, the cost of 150 μm or more is impossible in terms of cost. The reason why the O ₂ gas ratio in claims 1 and 2 is 0.5% to 10% is that the O ₂ gas of 0.5% or more forms an SiO ₂ film during high-temperature and long-time diffusion. To prevent the evaporation of Si atoms, and conversely, O ₂ gas of less than 10%
Prevents surface irregularities (avatars, cracks, etc.) due to the O ₂ film formation. The functions according to claims 3 and 4 and the functions according to claims 5 and 6 are all within the practical range to which the present invention is directed.

[0015]

Embodiments of the present invention will be described below.
"Table 1" shows "particles" and "dislocations" between the conventional method and the method of the present invention.
In the comparison table according to the above, the conventional method and the method of the present invention are applied to two kinds of wafers having a plane orientation of (100) having a diameter of 100φ produced by the FZ method and wafers having a plane orientation of (111) having a diameter of 100φ produced by the FZ method. It is the result of having divided and implemented. The diffusion depth is 160 μm, and the non-diffusion layer when a discrete substrate is formed is 90 μm, and the total thickness is 250 μm. Wafer thickness due to standard _{2x j + x i + 45 =} 455μ
The one that is cut into two after diffusion is 2 (x _j + x _i )
+ 330 + 150 = 980 μ. In the conventional method, a wafer sliced from a silicon single crystal ingot is wrapped with a polishing agent (FO # 1200) (with a margin of 60 μ), and further etched (with a margin of 20 μ). ) Deposition in an atmosphere, followed by diffusion of O ₂ gas: N ₂ gas in a 1: 3 atmosphere at a high temperature (1280 ° C.) for a long time (150 hr). After the completion, the diffusion layer on one side is completely removed. The surface is mirror-finished and polished so that the thickness of the non-diffused layer of the impurity in the central portion becomes 90 μm, thereby finishing the mirror surface.

On the other hand, according to the method of the present invention, 455 μm and 980 μm wafers which have also been lapped are generally cleaned and then deposited under a P (phosphorus) atmosphere, followed by Ar gas containing 5% of O ₂ gas. High temperature in the atmosphere of
After diffusion for a long time, the wafer is cut into two parts from the center of the thickness after completion, a 325 μm thick wafer is obtained, and the cut surface side is ground and polished to finish the mirror surface. The number of particles is shown by converting the average number of particles in the visual field into a unit area by observing the center of the wafer several times with an SEM on the surface of the discrete substrate on the side of the HF-treated diffusion layer. Dislocations were indicated by an EPD value (the number of etch pit densities) obtained by subjecting the mirror surface of the non-diffusion layer side of the discrete substrate to a zirtle etching and converting the number of etch pits in the visual field into a unit area by an optical microscope. The numerical values on the right side are values at the center of the wafer, and the numerical values on the left side are average values at four points on the outer periphery of the wafer. However, the plane orientation (100) was not observed as an etch pit (triangle), and what appeared as a small circular pit was counted.

[0017]

[Table 1]

In the conventional method (1), particles are not generated in the plane orientation (111), but a large number is generated in the plane orientation (100). In both the plane orientations (111) and (100), dislocations are remarkably unevenly distributed. [FIG. 2 (A)]. In the conventional method (2), the dislocation nonuniformity disappears (FIG. 2B), but the generation of particles is maximum. This is thought to be due to the influence of processing strain formed on the wafer surface. (1) and (2) of the method of the present invention
In the case of (111) and (100), no particles were formed in the wafer plane orientations, and in the case of the present invention (2), the dislocations were at the level absorbed by the processing strain [the (111) wafer of the conventional method (2)). 2520-2070 / cm ² ], which is closer to the final target by a defect-free diffusion method that does not generate crystal defects in the undiffused layer. In this embodiment, F
Although wafers manufactured by the Z method were used, the results obtained by the CZ method had the same tendency, although the difference in the level of occurrence of dislocations occurred (the results obtained by the CZ method tended to generate dislocations). Does not occur.

The method according to the method (2) of the present invention is overwhelmingly advantageous in quality and cost when the diffusion layer is particularly deep (for example, 200 μm or more). Shallow diffusion layer (20μ ~ 80μ)
And two orientation flats (one of which is generally called CF (cut flat)), which are useful for those in which two-piece cutting is incompatible.

[0020]

As described above, according to the diffusion method of the present invention, when a deep diffusion layer is formed on a silicon semiconductor wafer to manufacture a discrete substrate, the lapping uniform processing according to the present invention is performed. A wafer containing O ₂ gas using a wafer having a thickness capable of being subsequently cut into two pieces having a strain.
Atmosphere of r gas or He gas at 1250 ° C to 1310 ° C
In the diffusion for 20 hours to 450 hours in the inside, after the diffusion, it is cut into two parts from the center of the thickness width, and the cut surface side is ground,
The method of polishing to finish a discrete substrate can produce a very low-dislocation, high-quality product without particle generation, and prevent problems such as particle separation in the subsequent process (adhesion to mirror surface, poor deposition). In addition, the productivity can be improved, and a discrete having excellent characteristics can be manufactured by using an impurity non-diffusion layer of extremely low dislocation close to defect-free diffusion.

[Brief description of the drawings]

FIG. 1 is a micrograph showing a particle structure generated by a conventional method.

FIG. 2 is a photograph showing a crystal structure of a dislocation generated on a mirror surface of a wafer.

FIG. 3 is a partially enlarged photograph of the photograph showing the crystal structure of FIG. 2 (A).

Claims (2)

(57) [Claims] 1. An ingot of a silicon single crystal having a crystal axis of <111> or <100> is sliced to a predetermined thickness, and the obtained wafer is simultaneously lapped on both sides using an abrasive, so that both sides are uniformly processed. Wafer plane orientation (111) or (10) having a thickness (t ₁ ) of the following formula (1) having distortion
0) a first diffusion step of depositing on the wafer surface in an atmosphere of impurities, the wafer after completion of the first diffusion step O ₂
20 hours in an atmosphere of Ar or He mixed gas containing 0.5 to 10 (vol)% of gas at 1250 to 1310 ° C
A second diffusion step of obtaining a wafer having a non-diffused layer of impurities in the center of the wafer and having an impurity diffusion layer formed on both sides by performing treatment for about 450 hours. _{2x j + x i + 20 ≦} t 1 ≦ 2x j + x i + 80 ......... (1) x j: wafer impurity diffusion layer thickness (μm) x _i: discrete wafer impurity undiffused layer thickness when a substrate ([mu] m) 2. A silicon single crystal ingot having a crystal axis of <111> or <100> is sliced to a predetermined thickness, and the obtained wafer is simultaneously wrapped on both sides using an abrasive, so that both sides are uniformly processed. Wafer plane orientation (111) or (10) having a thickness (t ₂ ) of the following formula (2) having distortion
0) a first diffusion step of depositing on the wafer surface in an atmosphere of impurities, the wafer after completion of the first diffusion step O ₂
20 hours in an atmosphere of Ar or He mixed gas containing 0.5 to 10 (vol)% of gas at 1250 to 1310 ° C
A second diffusion step of obtaining a wafer having a non-diffusion layer of impurities in the center of the wafer and having an impurity diffusion layer formed on both sides, and processing the wafer after the second diffusion step to a thickness of not more than 450 hours. A method of manufacturing a discrete substrate, comprising: cutting an impurity non-diffusion layer at a central portion of a width into two by a single-wafer type inner peripheral blade cutting device; grinding and polishing a cut surface of the wafer; _{2 (x j + x i)} + t c + 75 ≦ t 2 ≦ 2 (x j + x i) + t c + 300 ... (2) x j: wafer impurity diffusion layer thickness (μm) x _i: discrete wafer when a substrate Impurity non-diffusion layer thickness (μm) t ₂ : Wafer thickness (μm) t _c : Blade thickness of inner peripheral blade cutting device (μm)