JPS5932215A - デイジタル信号処理回路及び多段積和回路 - Google Patents

デイジタル信号処理回路及び多段積和回路

Info

Publication number
JPS5932215A
JPS5932215A JP14205482A JP14205482A JPS5932215A JP S5932215 A JPS5932215 A JP S5932215A JP 14205482 A JP14205482 A JP 14205482A JP 14205482 A JP14205482 A JP 14205482A JP S5932215 A JPS5932215 A JP S5932215A
Authority
JP
Japan
Prior art keywords
signal
delay
circuit
multiplier
sum
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14205482A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0370410B2 (esLanguage
Inventor
Seiichiro Iwase
岩瀬　清一郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP14205482A priority Critical patent/JPS5932215A/ja
Publication of JPS5932215A publication Critical patent/JPS5932215A/ja
Publication of JPH0370410B2 publication Critical patent/JPH0370410B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H17/00—Networks using digital techniques
    • H03H17/02—Frequency selective networks

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Complex Calculations (AREA)
JP14205482A 1982-08-18 1982-08-18 デイジタル信号処理回路及び多段積和回路 Granted JPS5932215A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14205482A JPS5932215A (ja) 1982-08-18 1982-08-18 デイジタル信号処理回路及び多段積和回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14205482A JPS5932215A (ja) 1982-08-18 1982-08-18 デイジタル信号処理回路及び多段積和回路

Publications (2)

Publication Number Publication Date
JPS5932215A true JPS5932215A (ja) 1984-02-21
JPH0370410B2 JPH0370410B2 (esLanguage) 1991-11-07

Family

ID=15306335

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14205482A Granted JPS5932215A (ja) 1982-08-18 1982-08-18 デイジタル信号処理回路及び多段積和回路

Country Status (1)

Country Link
JP (1) JPS5932215A (esLanguage)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS647001U (esLanguage) * 1987-07-03 1989-01-17
JPH0365813A (ja) * 1989-08-04 1991-03-20 Yamaha Corp 信号処理集積回路

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57141510A (en) * 1981-02-26 1982-09-01 Mazda Motor Corp Display device for car

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57141510A (en) * 1981-02-26 1982-09-01 Mazda Motor Corp Display device for car

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS647001U (esLanguage) * 1987-07-03 1989-01-17
JPH0365813A (ja) * 1989-08-04 1991-03-20 Yamaha Corp 信号処理集積回路

Also Published As

Publication number Publication date
JPH0370410B2 (esLanguage) 1991-11-07

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