JPS5928996B2 - How to install electronic parts - Google Patents

How to install electronic parts

Info

Publication number
JPS5928996B2
JPS5928996B2 JP50075271A JP7527175A JPS5928996B2 JP S5928996 B2 JPS5928996 B2 JP S5928996B2 JP 50075271 A JP50075271 A JP 50075271A JP 7527175 A JP7527175 A JP 7527175A JP S5928996 B2 JPS5928996 B2 JP S5928996B2
Authority
JP
Japan
Prior art keywords
electronic component
thermal expansion
substrate
coefficient
glass
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP50075271A
Other languages
Japanese (ja)
Other versions
JPS51150671A (en
Inventor
幸弘 井上
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP50075271A priority Critical patent/JPS5928996B2/en
Publication of JPS51150671A publication Critical patent/JPS51150671A/en
Publication of JPS5928996B2 publication Critical patent/JPS5928996B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

Description

【発明の詳細な説明】 本発明はLSI素子などのように非常に多くの端子数を
有する電子部品と取付基板との取付方法に関し、特に従
来通ヤ電子部品を基板にボンディング出来て、しかも該
両者に熱膨脹係数の差によるクラックや破損が生ずるこ
とのない様に工夫した新規な取付方法を提供するもので
ある。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for attaching an electronic component having a large number of terminals, such as an LSI element, to a mounting board, and particularly to a method for attaching a mounting board to an electronic component that has conventionally been used. The present invention provides a new mounting method devised to prevent cracks or damage from occurring due to the difference in coefficient of thermal expansion between the two.

一般に、ガラス基板上に電子部品を取付ける場合に、電
子部品の熱膨脹係数と基板の熱膨脹係数とが比較的大き
く異なる時には温度サイクル等によつて基板にクラック
が発生したわ、部品が破損したDすることは知られてい
る。例えば、第1図に示す様にガラス基板1上の端子I
A)IAに電子部品2をハンダ3によつて取付ける場合
に、ガラス基板1の熱膨脹係数(90〜100×10−
7cm/℃)と比較的近い熱膨脹係数を有する電子部品
2、つまヤセラミツク部品(熱膨脹係数78×10−’
!、cm/℃)であればクラックが発生したり)部品が
破損したりすることがない。
Generally, when electronic components are mounted on a glass substrate, if the coefficient of thermal expansion of the electronic component and that of the substrate are relatively large, cracks will occur in the substrate due to temperature cycles, etc., and the component will be damaged. This is known. For example, as shown in FIG.
A) When attaching the electronic component 2 to the IA with the solder 3, the coefficient of thermal expansion of the glass substrate 1 (90 to 100 x 10-
Electronic component 2, which has a coefficient of thermal expansion relatively close to 7cm/°C), and Tsumeya ceramic component (coefficient of thermal expansion 78×10-'
! , cm/°C), no cracks will occur or parts will be damaged.

そして、電子部品2がシリコン部品の様に熱膨脹係数(
30×10−“cm/℃)が基板1と大きく異なるもの
にあつては基板1にクラックが発生したヤ、部品が破損
したヤするものである。この様な問題を解消する方法と
して、従来は導電性の金属板をコ字型などに形成して弾
性をもたせた歪吸収部材を電子部品端子と基板端子の間
に介在させて該両者間を電気的機械的に結合する取付方
法が提案されている。
Then, the electronic component 2 has a coefficient of thermal expansion (
30×10-cm/°C) is significantly different from that of the board 1, cracks may occur in the board 1 or parts may be damaged.As a method to solve such problems, conventional proposed a mounting method in which a strain absorbing member made of a conductive metal plate formed into a U-shape or the like is interposed between an electronic component terminal and a board terminal to electrically and mechanically connect the two. has been done.

然し乍ら、このような従来の取付方法は歪吸収部材を電
子部品端子と基板端子の間の導通用として兼用している
ために、たとえば電子部品がLSI素子のように小型で
しかも多数の端子を有するものでは電子部品と基板の各
端子間を上記導電性の金属板を用いて一つゝ結合してい
かなければならず、取付に非常に多くの手間と時間を要
するという欠点がある。
However, in this conventional mounting method, since the strain absorbing member is also used for conducting between the electronic component terminal and the board terminal, for example, when the electronic component is small like an LSI element and has a large number of terminals, In this case, each terminal of the electronic component and the board must be connected one by one using the conductive metal plate, which has the drawback of requiring a great deal of effort and time for installation.

さらに、電子部品、基板上の各端子間ピッチが非常に狭
いから上記導電性の金属板が隣ジのものに接触し易く信
頼性がない。このように従来の取付方法ではLSI素子
をボンデイングすることが出来ないという致命的な欠点
を有している。
Furthermore, since the pitch between the terminals on the electronic component and the board is very narrow, the conductive metal plate tends to come into contact with the adjacent one, resulting in unreliability. As described above, the conventional mounting method has the fatal drawback of not being able to bond LSI elements.

それゆえ本発明の目的は、LSI素子などのように多く
の端子数を有する電子部品を熱膨脹差によるクラツクや
破損が生ずることのない様に基板にボンデイングし得る
新規な取付方法を提供することにある。
Therefore, an object of the present invention is to provide a new method for bonding electronic components having a large number of terminals, such as LSI devices, to a board without causing cracks or damage due to differences in thermal expansion. be.

以下図にもとづいて本発明方法を詳細に説明する。The method of the present invention will be explained in detail below based on the drawings.

第2図において、ガラス基板1上に導電体をエツチング
或は印刷によつて形成した端子1A11Aにシリコン部
品の如き基板1とは熱膨脹係数の大きく異なる電子部品
2をハンダ3により取付けるのであるが、前記ガラス基
板1上に熱膨脹係数がガラス基板1と電子部品2との間
に位置してガラス基板1の熱膨脹係数に近い物質、即ち
熱膨脹係数75X10−CTrL/℃を有するガラス層
4,4と、前記層4,4の上に積層状態にして熱膨脹係
数が前記と同様に基板1と部品2との間に位置し且つ部
品2の熱膨脹係数に近い物質、即ち熱膨脹係数50×1
0−7Cm/℃を有する今一つのガラス層5,5とを印
刷或は蒸着によジ夫々20μ程度の厚さに形成し、この
ガラス層5,5上に端子1A11Aを設けたものである
In FIG. 2, an electronic component 2 such as a silicon component whose coefficient of thermal expansion is significantly different from that of the substrate 1 is attached to a terminal 1A11A formed by etching or printing a conductor on a glass substrate 1 using solder 3. Glass layers 4, 4 having a thermal expansion coefficient of a material located between the glass substrate 1 and the electronic component 2 and close to that of the glass substrate 1, that is, a thermal expansion coefficient of 75×10-CTrL/° C., on the glass substrate 1; A material is laminated on the layers 4, 4 and has a thermal expansion coefficient that is located between the substrate 1 and the component 2 and is close to that of the component 2, i.e., a thermal expansion coefficient of 50×1.
Another glass layer 5, 5 having a temperature of 0-7 Cm/° C. is formed by printing or vapor deposition to a thickness of about 20 μm each, and a terminal 1A11A is provided on the glass layer 5, 5.

そして、前記端子1A11Aに電子部品2をハンダ3に
より取付けたものである。
Then, an electronic component 2 is attached to the terminal 1A11A with solder 3.

この実施例の取付方法によれば、基板1とガラス層4、
ガラス層4とガラス層5、ガラス層5と電子部品2の各
々の熱膨脹係数の差を小さくすることが出来、これによ
つて基板1と電子部品2との間を実質的に小さな熱膨脹
係数差でもつて接続することが出来る。
According to the mounting method of this embodiment, the substrate 1, the glass layer 4,
It is possible to reduce the difference in coefficient of thermal expansion between the glass layer 4 and the glass layer 5, and between the glass layer 5 and the electronic component 2, thereby creating a substantially small difference in the coefficient of thermal expansion between the substrate 1 and the electronic component 2. But it can be connected.

したがつて、基板1と電子部品2との熱膨脹係数の差に
よる影響、すなわち熱歪は著しく暖和され、これによジ
ガラス基板1へのクラツクの発生及び電子部品2の破損
を防止することが出来る。さらに、この実施例では、歪
吸収部材を絶縁性及び極薄層にしているので、基板表面
との間に段差がほとんどなく、したがつて該層上にエツ
チング又は印刷によう基板の他の配線パターンとともに
微細な端子パターンを形成することが出来る。
Therefore, the influence of the difference in thermal expansion coefficients between the substrate 1 and the electronic component 2, that is, thermal strain, is significantly alleviated, thereby making it possible to prevent cracks from occurring in the glass substrate 1 and damage to the electronic component 2. . Furthermore, in this embodiment, since the strain absorbing member is made of an insulating and extremely thin layer, there is almost no difference in level between it and the substrate surface. A fine terminal pattern can be formed together with the pattern.

このため、この端子パターンに電子部品をボンデイング
することが可能となシ、依つてLSI素子などのように
多数の端子を備えた電子部品を従来通りのボンデイング
手段を用いて熱歪によるクラツクや破損が発生すること
のない様に基板上に取付ることが出来、特に信頼性と量
産性において著しく改善することができる。他方、第3
図は他の実施例を示すものであり1ガラス基板1上の端
子1A11Aにシリコン部品の如き基板1とは熱膨脹係
数の大きく異なる電子部品2をハンダ3により取付ける
のであるが、ガラス基板上に熱膨脹係数がガラス基板1
と電子部品2との間にあつて且つ電子部品2の熱膨脹係
数に近いガラス層6、即ちガラス基板1の熱膨脹係数よ
ジ非常に小さな熱膨脹係数を有するガラス層6,6を形
成し、このガラス層6の形成でガラス基板1の表面に圧
縮応力を加えることにようガラス基板1を強化せしめ、
そして、このガラス層6,6上に設けられた端子1A1
1Aにハンダ3によジ電子部品2を取付けるものである
Therefore, it is possible to bond electronic components to this terminal pattern, and it is possible to bond electronic components such as LSI devices with a large number of terminals using conventional bonding methods to prevent cracks and damage due to thermal distortion. It can be mounted on a board without causing any problems, and it is possible to significantly improve reliability and mass productivity in particular. On the other hand, the third
The figure shows another embodiment in which an electronic component 2 such as a silicon component having a coefficient of thermal expansion significantly different from that of the substrate 1 is attached to a terminal 1A11A on a glass substrate 1 with solder 3. The coefficient is glass substrate 1
A glass layer 6 is formed between the electronic component 2 and the glass layer 6 having a thermal expansion coefficient close to that of the electronic component 2, that is, a glass layer 6 having a thermal expansion coefficient much smaller than that of the glass substrate 1. The formation of the layer 6 strengthens the glass substrate 1 by applying compressive stress to the surface of the glass substrate 1;
Terminals 1A1 provided on the glass layers 6, 6
1A, an electronic component 2 is attached with solder 3.

この第3図の方法はガラス層6によりガラス基板1を強
化ガラスの原理によつて強化し、またその熱膨脹係数を
ガラス基板1と電子部品2との間に設定することで基板
と部品間の熱膨脹係数の差を小さく押え、これによつて
部品2の破損をも防止することができるなど、先の実施
例同様の効果を奏することが出来る。
In the method shown in FIG. 3, the glass substrate 1 is strengthened by the glass layer 6 according to the principle of tempered glass, and the thermal expansion coefficient is set between the glass substrate 1 and the electronic component 2, thereby increasing the gap between the substrate and the component. It is possible to achieve the same effects as in the previous embodiment, such as keeping the difference in thermal expansion coefficients small and thereby preventing damage to the component 2.

以上の様に本発明方法によれば、絶縁性の歪吸収部材に
よる極薄層を基板上に形成し、この極薄層上に端子を形
成して該端子に電子部品を取付るようにしたから、電子
部品、取付基板間の熱膨脹差からこれら部品基板のクラ
ツクや破損を防止することが出来るとともに、上記極薄
層土に印刷等の手法によジ形成した端子パターンに従来
通v電子部品端子をボンデイングすることが出来る。
As described above, according to the method of the present invention, an extremely thin layer of an insulating strain absorbing member is formed on a substrate, a terminal is formed on this extremely thin layer, and an electronic component is attached to the terminal. This makes it possible to prevent cracks and damage to electronic components and the mounting board due to differences in thermal expansion between the electronic components and the mounting board. Terminals can be bonded.

したがつて、本発明方法によればLSI素子のように端
子数の多い電子部品の取付に非常に効果的である。
Therefore, the method of the present invention is very effective for mounting electronic components with a large number of terminals, such as LSI devices.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の電子部品の取付方法を示す説明図、第2
図は本発明の取付方法を示す説明図、第3図は同方法に
よる他の実施例を示す説明図である。 1・・・基板、1A・・・端子、2・・・電子部品、3
・・・ハンダ、4,5,6・・・ガラス層。
Figure 1 is an explanatory diagram showing the conventional method of mounting electronic components, Figure 2
The figure is an explanatory diagram showing the mounting method of the present invention, and FIG. 3 is an explanatory diagram showing another embodiment using the same method. 1... Board, 1A... Terminal, 2... Electronic component, 3
...Solder, 4, 5, 6...Glass layer.

Claims (1)

【特許請求の範囲】 1 ガラス基板の如き取付基板上に電子部品を取付るも
のにおいて、上記基板上に、熱膨張による歪を吸収し得
る絶縁性の部材にて極薄層を形成し、且この極薄層上に
端子を形成し、この端子に上記電子部品を取付るように
したことを特徴とする電子部品の取付方法。 2 上記絶縁性の歪吸収部材による極薄層を、熱膨張係
数が上記取付基板と上記電子部品の熱膨脹係数の間にあ
るガラス層で形成してなることを特徴とする特許請求の
範囲第1項に記載の電子部品の取付方法。 3 上記絶縁性の歪吸収部材による極薄層を2層のガラ
ス層で形成し、上記取付基板側ガラス層の熱膨脹係数を
該取付基板のものに近づけ、上記電子部品側ガラス層の
熱膨脹係数を該電子部品のものに近づけて形成してなる
ことを特徴とする特許請求の範囲第1項に記載の電子部
品の取付方法。
[Claims] 1. In a device in which electronic components are mounted on a mounting substrate such as a glass substrate, an extremely thin layer is formed on the substrate of an insulating member capable of absorbing distortion due to thermal expansion, and A method for attaching an electronic component, characterized in that a terminal is formed on this ultra-thin layer, and the electronic component is attached to the terminal. 2. Claim 1, characterized in that the extremely thin layer of the insulating strain absorbing member is formed of a glass layer whose coefficient of thermal expansion is between that of the mounting substrate and the electronic component. How to install electronic components described in section. 3. The ultra-thin layer of the insulating strain absorbing member is formed of two glass layers, and the coefficient of thermal expansion of the glass layer on the mounting board side is made close to that of the mounting board, and the coefficient of thermal expansion of the glass layer on the electronic component side is made close to that of the mounting board side. The method of attaching an electronic component according to claim 1, wherein the method is formed close to that of the electronic component.
JP50075271A 1975-06-19 1975-06-19 How to install electronic parts Expired JPS5928996B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50075271A JPS5928996B2 (en) 1975-06-19 1975-06-19 How to install electronic parts

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50075271A JPS5928996B2 (en) 1975-06-19 1975-06-19 How to install electronic parts

Publications (2)

Publication Number Publication Date
JPS51150671A JPS51150671A (en) 1976-12-24
JPS5928996B2 true JPS5928996B2 (en) 1984-07-17

Family

ID=13571388

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50075271A Expired JPS5928996B2 (en) 1975-06-19 1975-06-19 How to install electronic parts

Country Status (1)

Country Link
JP (1) JPS5928996B2 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55138897A (en) * 1979-04-17 1980-10-30 Matsushita Electric Ind Co Ltd Device for mounting leadless component to printed circuit board
JPS59117188A (en) * 1982-12-24 1984-07-06 株式会社日立製作所 Method of constructing circuit board
JPH0237735A (en) * 1988-07-27 1990-02-07 Semiconductor Energy Lab Co Ltd Mounting structure of semiconductor chip
WO1997003460A1 (en) * 1995-07-12 1997-01-30 Hoya Corporation Bare chip mounted board, method of manufacturing the board, and method of forming electrode of bare chip

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4857652U (en) * 1971-11-02 1973-07-23

Also Published As

Publication number Publication date
JPS51150671A (en) 1976-12-24

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