JPS5923674U - IC test equipment - Google Patents

IC test equipment

Info

Publication number
JPS5923674U
JPS5923674U JP11820382U JP11820382U JPS5923674U JP S5923674 U JPS5923674 U JP S5923674U JP 11820382 U JP11820382 U JP 11820382U JP 11820382 U JP11820382 U JP 11820382U JP S5923674 U JPS5923674 U JP S5923674U
Authority
JP
Japan
Prior art keywords
test
mode
control section
test equipment
cable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11820382U
Other languages
Japanese (ja)
Other versions
JPS631248Y2 (en
Inventor
好弘 橋本
Original Assignee
株式会社アドバンテスト
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社アドバンテスト filed Critical 株式会社アドバンテスト
Priority to JP11820382U priority Critical patent/JPS5923674U/en
Publication of JPS5923674U publication Critical patent/JPS5923674U/en
Application granted granted Critical
Publication of JPS631248Y2 publication Critical patent/JPS631248Y2/ja
Granted legal-status Critical Current

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  • Testing Of Individual Semiconductor Devices (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図はＩＣの直流特性試験における電流印加電圧測定
モードを説明するための接続図、第２図はＩＣの直流特
性試験における電圧印加電流測定モードを説明するため
の接続図、第３図は従来のＩＣ試験装置を説明するため
のブロック図、第４図はこの考案の一実施例を示すブロ
ック図である。 １０１：被試験ＩＣ，１０５：試験用電源、３０５ａ〜
３０５ｎ：ピン制御部、４０１：ケーブル、４０２．４
０３：電流制限抵抗器。Figure 1 is a connection diagram to explain the current applied voltage measurement mode in IC DC characteristics testing, Figure 2 is a connection diagram to explain voltage applied current measurement mode in IC DC characteristics tests, and Figure 3 is FIG. 4 is a block diagram illustrating a conventional IC testing device. FIG. 4 is a block diagram showing an embodiment of this invention. 101: IC under test, 105: Test power supply, 305a~
305n: Pin control section, 401: Cable, 402.4
03: Current limiting resistor.

Claims (1)

【実用新案登録請求の範囲】 Ａ　電流出力モード及び電圧出力モードに切換ることが
できる試験用電源と、 Ｂ　被試験ＩＣの端子に機能試験モードと直流特性試験
モードの回路を切換接続するビン制御部と、 ′　　Ｃ上記試験用電源とピン制御部を結ぶケーブルと
、 Ｄ　このケーブルの上記ビン制御部側に直列接続した電
流制限用抵抗器と、 から成るＩＣ試験装置。[Scope of Claim for Utility Model Registration] A. A test power supply that can be switched between current output mode and voltage output mode; B. Bin control that switches between functional test mode and DC characteristic test mode circuits connected to the terminals of the IC under test. An IC testing device comprising: a cable connecting the test power source and the pin control section, and D a current limiting resistor connected in series to the pin control section side of the cable.
JP11820382U 1982-08-02 1982-08-02 IC test equipment Granted JPS5923674U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11820382U JPS5923674U (en) 1982-08-02 1982-08-02 IC test equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11820382U JPS5923674U (en) 1982-08-02 1982-08-02 IC test equipment

Publications (2)

Publication Number Publication Date
JPS5923674U true JPS5923674U (en) 1984-02-14
JPS631248Y2 JPS631248Y2 (en) 1988-01-13

Family

ID=30271788

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11820382U Granted JPS5923674U (en) 1982-08-02 1982-08-02 IC test equipment

Country Status (1)

Country Link
JP (1) JPS5923674U (en)

Also Published As

Publication number Publication date
JPS631248Y2 (en) 1988-01-13

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