JPS5923474B2 - semiconductor equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device, and particularly to a semiconductor device that includes a transistor and a Schottky barrier diode (SBD) within the same semiconductor substrate.
The present invention relates to the structure of electrodes of an integrated circuit (abbreviated as IC) in which an integrated circuit (abbreviated as IC) is formed.

Conventionally, for example, in the IC shown in FIG. 1, the SBD shown in region I has an electrode structure made of silicon, as shown in the figure, in order to reduce the forward voltage drop Vf and stabilize the forward characteristics. A two-layer structure in which a titanium Ti layer 3 is formed as a first layer in contact with the surface of the substrate 1 through an opening provided in an insulating film 2 covering the surface of the silicon substrate 1, and an aluminum Al layer 4 is formed on the top layer. It is used.

The above two-layer structure has a small Vf for an SBD and is relatively stable against thermal fluctuations. However, as an emitter electrode of a transistor shown in area The rate is high and it is difficult to say that it is suitable. In the figure, 5 indicates a base region of the transistor, 6 indicates an emitter region, and T indicates a polycrystalline semiconductor silicon layer.

On the other hand, by using an Al layer 8 containing silicon as the electrode of the transistor, as shown in FIG. 2, it is possible to prevent the destruction of the emitter base junction or the occurrence of breakdown voltage failure, but on the other hand, it is possible to prevent the occurrence of SBD failure due to thermal fluctuations. Vf characteristics become unstable.

In order to solve the above problems, an electrode structure using a platinum silicide layer for the first layer, titanium for the second layer, and tungsten for the third layer has been proposed, but the materials are expensive and the process is extremely complicated. become. An object of the present invention is to eliminate the above-mentioned problems, and to provide an electrode structure that has good and stable Vf characteristics for SBDs, does not cause emitter-base breakdown voltage defects for transistors, and can be manufactured by a simple method. An object of the present invention is to provide a semiconductor device having the following features.

A feature of the present invention is that in a semiconductor device in which a transistor and a Schottky barrier diode SBD are formed in the same semiconductor substrate, the electrode is made of one metal selected from titanium (Ti), hafnium (Hf), chromium (Cr), and the upper layer is is made of aluminum containing silicon (Al).

The present invention will be explained below based on examples.

FIG. 3 is a sectional view of a main part showing an embodiment of the present invention.

1 is an N-type silicon substrate, 2 is an insulating film, and 3 is a thickness of 100 [
λ] Ti layer, 5 a transistor pace region, 6 a transistor emitter region, 7 a polycrystalline silicon layer,
Reference numeral 8 denotes an Al layer containing Si, and region 1 represents a shotgun barrier j diode SBDl region a transistor.

As shown in the figure, in this embodiment, in the SBDI product, an insulating layer (SiO2 layer) 2 formed on the surface of a silicon substrate 1 is selectively removed to provide an electrode window that exposes the base-collector junction. In the window, a Ti layer 3 is formed as a first metal layer in contact with the surface of the silicon substrate 1;
An Al layer 8 containing Si is formed on the surface of the i-layer 3 . On the other hand, in the transistor section, the SiO2 layer 2 formed on the surface of the silicon substrate 1 is selectively removed to provide an electrode window on the surface of the emitter region 6, and the polycrystalline silicon layer contacts the surface of the emitter region 6 in the electrode window. A Ti layer 3 is formed on the surface of the polycrystalline silicon layer 7, and a Ti layer 3 is formed on the surface of the polycrystalline silicon layer 7.
An Al layer 8 containing Si is formed on the surface of the layer 3. In this example, the thickness of the Ti layer 3 and the S of the Al layer 8 are
To determine the i content, carefully consider the relationship between the above-mentioned f characteristics of the SBD, its stability, the emitter base voltage failure rate of the transistor, and the temperature conditions of the process after forming the electrodes. There must be.

That is, after the electrodes are formed, the semiconductor element is exposed to high temperatures during the assembly process and hermetic sealing process, but the temperature varies considerably depending on the mold sealing type, ceramic sealing type, etc.

For example, with some mold sealing types, the maximum temperature during the assembly and sealing process may only be around 170 [℃].
For some types of ceramic encapsulation, the temperature of the encapsulation process is 5.
It may reach 00°C. The influence that the temperature treatment conditions of the above-mentioned process have on the semiconductor device will be explained with reference to FIGS. 4, 5, and 6.

Figure 4 shows how the SBDf)Vf characteristics change due to temperature cycling tests.
[°C] The white circle is f after being left at 350 [°C] for 30 minutes each.
1 In Figure b, the black circles indicate the Vf values after being left at 450 [°C], and the open circles indicate the values of Vf after being left at 350 [°C] for 30 minutes.

The contents of samples A to D are shown in Table 1. Note that the crystal plane orientation of the main surface of the silicon substrate is the (100) plane and the (111) plane.
) There is no difference between the two in any case. In Table 1, the Si content is shown in weight ratio.

As is clear from FIG. 4, only sample D has stable SBDf)Vf characteristics when exposed to a sealing temperature of 500 [° C.], and the range of variation increases as the Si content decreases. Furthermore, when there is no Ti layer, the range of fluctuation becomes significantly larger and shows an overall upward trend (arrow). The above phenomenon can be physically understood as follows.

That is, when a semiconductor element is exposed to high temperatures, Si dissolves in Al, and when the temperature drops, it re-precipitates and deposits, growing on the surface of the silicon substrate. This regrown Si layer is P-type silicon containing Al, which has a different conductivity type from that of the substrate, so Vf
deteriorate. However, the presence of the Ti layer prevents the regrowth of Si, thereby preventing the deterioration of f. But T
i reacts with Al to form TiAl, which acts as an abhorrent for introducing Si into Al.
If a large amount of Ti is dissolved in Ti and the Ti is thin, regrowth of Si cannot be completely prevented. Therefore, in advance, S
By containing i, further dissolution of Si in Al can be suppressed. Samples B, C, D2:. The reason why the stability of f increases as the content of Si in Al increases is considered to be due to the above-mentioned difference in the degree to which dissolution of Si in Al is suppressed. Figure 5 shows the four types of samples mentioned above at 400 [℃], 4
The emitter-base breakdown voltage (
This figure shows how the defective rate of VebO) increases.

Figure a shows the case where the plane orientation of the main surface of the semiconductor substrate is the (100) plane, and figure b shows the case where the plane orientation is also the (111) plane. In Figure 5a, there is a significant difference between samples B, C, and D.

This can be considered to be due to the non-uniformity of the reaction between Ti and Al mentioned above. That is, Si dissolves into Al from the portion where the reaction between Ti and Al rapidly progresses, and A' is instead introduced into the substrate. If such a phenomenon occurs in the emitter region, the emitter-base junction is easily destroyed because it is formed shallowly from the surface, and Ve
bO becomes defective. However, in this case as well, Si is added in Al in advance.
If it is contained, it is possible to further suppress the dissolution of Si into Al, so it is understood that the occurrence of EbO defects could be prevented in Sample D, which has a high Si content, under the above conditions. The difference between FIG.
It is larger when using a 0)-plane type, and in the case of a (111)-plane type, if 0.6 [%] of Si is contained in Al, the occurrence of VebO defects can be prevented up to 500 [℃]. . Furthermore, even if about 100 [λ] of Ti is present, the temperature will rise to 400 [℃].
] It has become clear that the occurrence of EbO defects can be prevented in any case at low temperatures below. Figure 6 shows the results of determining the limit of the thickness at which the Ti layer can work effectively.In the case where the second layer, which has the worst conditions, is pure Al, the thickness of the Ti layer is changed and the temperature is increased to 480°C. ] shows the occurrence of EbO defects when exposed for 30 minutes each.

Note that the semiconductor substrate used was one with a (111) crystal plane. As is clear from the figure, the thickness of the Ti layer is 170 mm.
When [A] is exceeded, Vebo defects rapidly increase.

The reason for this is that, as described above, as the Ti layer becomes thicker, the non-uniformity of the reaction between the Ti layer and Al increases rapidly.

On the other hand, when the Ti layer is thin, the nonuniformity of the reaction decreases;
If it is extremely thin, it will be the same as if the Ti layer does not exist, so
Considering the current state of film production technology, about 50 [A] is considered to be the practical limit. As explained above, according to the present invention, by configuring the electrode with a structure using Al containing Ti in the first layer (lower layer) and Si in the second layer (upper layer), it is possible to improve both the SBD and the transistor. A semiconductor device having a very suitable electrode structure can be provided. Furthermore, since the electrode structure of this embodiment can be formed by continuous vapor deposition in the same vapor deposition process, there is an advantage that the manufacturing process can be extremely simplified.

The present invention is not limited to the above-mentioned embodiments, and can be implemented in further modifications.

For example, the first layer metal need not be limited to Ti; the same effect can be obtained by using hafnium Hf or chromium Cr.

Further, the thickness of the first metal layer and the content of Si in Al of the second layer can be appropriately selected in consideration of process conditions and the like as shown in FIGS. 4 to 6.

[Brief explanation of the drawing]

1 and 2 are main part sectional views for explaining the conventional structure, FIG. 3 is a main part sectional view showing an embodiment of the present invention, and FIG.
5 and 6 are characteristic charts for explaining the effects of the above embodiment. 1... Silicon substrate, 2... Insulating film, 3...
...Titanium layer, 4...Aluminum layer, 5...
- Base region, 6... Emitter region, 7... Polycrystalline silicon layer, 8... Silicon-containing aluminum layer,
I... Schottky barrier diode region, I
I...Transistor area.

Claims (1)

[Scope of Claims] 1. In a semiconductor device in which at least a transistor and a Schottky barrier diode are formed on the same semiconductor substrate, the electrodes of the transistor and the Schottky barrier diode have a thickness of 60 to 170 [Å]. A first layer made of one metal selected from titanium, hafnium, and chromium, and a second layer made of aluminum containing 0.6 [wt%] or more of silicon disposed on the first layer. A semiconductor device comprising layers of.