JPS59214235A - Method and apparatus for inspecting semiconductor wafer - Google Patents

Method and apparatus for inspecting semiconductor wafer

Info

Publication number
JPS59214235A
JPS59214235A JP8940083A JP8940083A JPS59214235A JP S59214235 A JPS59214235 A JP S59214235A JP 8940083 A JP8940083 A JP 8940083A JP 8940083 A JP8940083 A JP 8940083A JP S59214235 A JPS59214235 A JP S59214235A
Authority
JP
Japan
Prior art keywords
semiconductor wafer
circuit
circuit board
inspection
jig
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8940083A
Other languages
Japanese (ja)
Inventor
Tatsuo Nakahara
中原 辰夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ibiden Co Ltd
Original Assignee
Ibiden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibiden Co Ltd filed Critical Ibiden Co Ltd
Priority to JP8940083A priority Critical patent/JPS59214235A/en
Publication of JPS59214235A publication Critical patent/JPS59214235A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor

Abstract

PURPOSE:To carry out adjustment-free inspection without giving any damage on the surface of semiconductor wafer connecting pad by supplying the power after pressurizingly placing in contact a pressure sensitive and multi-directional electrical conductive rubber sheets with a connecting pad of semiconductor wafer circuit. CONSTITUTION:A circuit 2 having various functions and a connecting pad 3 are provided on a semiconductor wafer 1. A pressure sensitive and multi-directional electrical conductive rubber sheet 4 is provided at the upper part of wafer 1 and this sheet is pressurized while it is in contact with the connecting pad 3 of semiconductor wafer circuit. Thereby the functions of wafer circuit can be checked quickly and easily without positioning or balance adjustment which normally requires a long period of time.

Description

【発明の詳細な説明】 本発明は、半導体ウェハーの検査方法及びその装置に係
り、さらに詳しくは、被検査体である半導体ウェハー表
面に異方向性導電ゴムシート状物を圧締し、検査用治具
回路板と接触プローブとを接触通電させることにより、
半導体ウェハー回路の有する機能の良・不良状態を検査
する方法及びその装fifr、に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method and apparatus for testing a semiconductor wafer, and more specifically, the present invention relates to a method and apparatus for testing a semiconductor wafer, and more specifically, a non-directional conductive rubber sheet is pressed onto the surface of a semiconductor wafer, which is an object to be tested. By contacting and energizing the jig circuit board and the contact probe,
The present invention relates to a method and equipment for inspecting whether the functions of a semiconductor wafer circuit are good or bad.

従来、半導体ウェハー回路の有する機能の良・不良状態
を検査する方法としては、第1図の断面図に示すような
装置を用いて、半導体ウェハー回路(イ)の接続用パッ
ド(ロ)にタングステンプローバーの針(/Nを接触さ
せ、これに通電し連結する電気制御装置を介して半導体
の機能の良否を検査する方法が実施されていた。
Conventionally, as a method for inspecting whether the functions of a semiconductor wafer circuit are good or bad, a device such as the one shown in the cross-sectional view of Figure 1 is used to inject tungsten into the connection pad (b) of the semiconductor wafer circuit (a). A method has been implemented in which the functionality of the semiconductor is tested by bringing the prober needle (/N) into contact with the prober needle, energizing it, and connecting it to an electrical control device.

しかしながら、上記従来方法によれば、タングステンブ
ローバーク1)は細くて硬い針状のものであるため、こ
れと接触する半導体ウェハーの接続用パッド表面(o)
には傷が付き、ワイヤーホンディングなどの電気的接続
に際して不良を起す原因となっていた。
However, according to the above conventional method, since the tungsten blowbark 1) is thin and hard needle-shaped, the connection pad surface (o) of the semiconductor wafer that comes into contact with the tungsten blowbark 1) is thin and hard.
were scratched, causing defects in electrical connections such as wire bonding.

壕だ、半導体の接続用パッドの位置や形状に応じてタン
グステンプローバーの位置決めをしたり、複雑なバラン
ス調整などをしなければならず、これらの調整は困難で
あり、それゆえにこの検査用装置を組み立てるには長時
間を要する欠点があった。
Unfortunately, the tungsten prober must be positioned according to the position and shape of the semiconductor connection pad, and complicated balance adjustments must be made, making these adjustments difficult. The drawback was that it took a long time to assemble.

そこで本発明は、上記従来法の欠点を除去・改善しタン
グステンプローバーに代えて感圧異方向性導電ゴムシー
ト状物を半導体ウェハー回路の接続用パッドに圧締接触
させ通電することにより、半導体ウェハーの接続用パッ
ド表面に傷を付けることなく、検査用装置の調整が不要
でかつ迅速簡便な半導体ウェハーの検査方法及びその装
置を新規に提案するものである。
Therefore, the present invention eliminates and improves the drawbacks of the above-mentioned conventional method, and instead of using a tungsten prober, a pressure-sensitive anisotropically conductive rubber sheet is pressed into contact with the connection pad of the semiconductor wafer circuit and energized. The present invention proposes a new method and device for testing semiconductor wafers that does not damage the surface of connection pads, does not require adjustment of testing equipment, and is quick and easy.

以下、本発明の実施例について図面に基いて具体的に説
明する。
Embodiments of the present invention will be specifically described below with reference to the drawings.

第2図は、本発明の半導体ウェハーの検査装置の一例を
示す断面図である。
FIG. 2 is a sectional view showing an example of the semiconductor wafer inspection apparatus of the present invention.

この図面において、(1)は半導体ウェハーであり、通
常シリコーンウェハーの表面上に各種の機能を有する回
路が設けられ、またこの回路の周辺に接続用パッドが設
けられる。(2)は各秘の機能を有する回路であり、た
とえばメモリ、CPu等のLSI、通常のIC及びハイ
ブリッドIC又はアナログICなどの機能を有する回路
が形成される。(3)は接続用パッドであり、前記各種
機能を有する回路と連結し、ワイヤーボンディングなど
により外部と電気的に接続される部分である。
In this drawing, (1) is a semiconductor wafer, and circuits having various functions are usually provided on the surface of the silicone wafer, and connection pads are provided around the circuits. (2) is a circuit having various secret functions, and for example, a circuit having functions such as a memory, an LSI such as a CPU, a normal IC, a hybrid IC, or an analog IC is formed. (3) is a connection pad, which is connected to the circuits having the various functions described above and is electrically connected to the outside by wire bonding or the like.

次に、(4)は感圧異方性導電ゴムシート状物であり、
この導電ゴムシート状物を圧締すること罠より導電性が
発現するものである。すなわち、このシート状物中に異
方向性に散在する導電性吻質が圧締されることにより導
電性が発現し、その一部に導電性が帯有される。
Next, (4) is a pressure-sensitive anisotropic conductive rubber sheet,
By compressing this conductive rubber sheet, conductivity is developed. That is, the conductive proboscis that is scattered in different directions in this sheet-like material is compressed to develop conductivity, and a portion of the sheet-like material is electrically conductive.

本発明は、上記導電性ゴムシート状物が半導体ウェハー
回路の接続用パッド(3)と接触した状態で圧締される
ことにより、前記接続用パッドの表面に従来のタングス
テンプローバー?場のように傷を付けることなく、しか
も長時間を要する位置決め又はf’d mffflなタ
ングステンプローバーのバランス調整を全く必要とする
ことなく簡易迅速に半導体ウェハー回路の機能の良否を
検査することができることを特徴とする。これは、上記
導電ゴムシート状物が圧締すれば導電性を帯有するよう
になるという特性に着目し、その特性を利用することを
原理的特徴とすることによるものである。
In the present invention, the conductive rubber sheet material is pressed while being in contact with the connection pad (3) of the semiconductor wafer circuit, so that the surface of the connection pad is coated with a conventional tungsten prober. To easily and quickly inspect the functional quality of a semiconductor wafer circuit without causing any damage as in the field, and without requiring positioning that takes a long time or f'd mfffl balance adjustment of a tungsten prober. It is characterized by This is based on the fact that the conductive rubber sheet becomes conductive when compressed, and the principle feature is to utilize this characteristic.

(5)は検査用治具回路板であり、通常のプリント 一
基板、フレキシブルプリント基板、マルチレイヤープリ
ント基板及びセラミックス基板などが用いられる。
(5) is an inspection jig circuit board, and ordinary printed circuit boards, flexible printed circuit boards, multilayer printed circuit boards, ceramic boards, etc. are used.

この治具回路板は、第3図の平面図に示すように、半導
体ウェハー回路の接続用パッドに相応した検査端(6)
と接触プローブ用のパッド(7)とが取出線(8)によ
り連結され、これらがこの回路板表面に設けられている
As shown in the plan view of FIG. 3, this jig circuit board has test edges (6) corresponding to connection pads of a semiconductor wafer circuit.
and a contact probe pad (7) are connected by a lead wire (8), and these are provided on the surface of this circuit board.

一方第2図における(9)は上記検査用治具回路板を装
着するための取付具であって、金属製又はプラスチック
ス製などの各郡の材料からつくられたものである。(1
0)は接触プローブであって、通常直径が1〜2H位の
金属などの導電材料からつくられ、先端が尖っており、
接触用パッドの穴の中に入り易くなっている。そのため
、加圧用装置により圧締状態にすることにより、前記検
査用治具回路板のパッド(7)と嵌合し通電により電気
的接続される。
On the other hand, (9) in FIG. 2 is a fixture for mounting the circuit board of the test jig, and is made of various materials such as metal or plastic. (1
0) is a contact probe, which is usually made of a conductive material such as metal with a diameter of about 1 to 2H, and has a pointed tip.
It is easy to fit into the contact pad hole. Therefore, by pressing it into a clamped state using a pressurizing device, it fits into the pad (7) of the circuit board of the test jig and is electrically connected by energization.

そして、この接触用プローブは、絶縁板(11)又はこ
れと隣接する平滑板(工2)のいずれか又は双方に装着
される。
This contact probe is attached to either or both of the insulating plate (11) and the adjacent smooth plate (work 2).

オだ、接触プローブは接続用コード(15)を介して電
気制卸装@に接続される。
Yes, the contact probe is connected to the electrical control equipment via the connection cord (15).

一方、これと正対する加圧用装置の支持台側には、絶縁
板(11)たとえばプラスチック製の絶縁板と平滑板(
12)たとえば金属製の平滑板とがあり、さらに絶縁板
表面には接着層(13)を介して弾性体(14)たとえ
ばゴム製又はプラスチック発泡体などのクッション性を
有する平滑板が取し付けられている。これば、加圧用装
置により被検査体である半導体ウェハー回路板(1)を
中心として、導電ゴムシート状物(4)と弾性体(14
)とで挟着し、クッション性のある状態で平滑に精度よ
く均一に圧締するためである。
On the other hand, on the supporting stand side of the pressurizing device directly facing this, an insulating plate (11), for example, a plastic insulating plate and a smooth plate (
12) For example, there is a smooth plate made of metal, and an elastic body (14), such as a smooth plate having cushioning properties such as rubber or plastic foam, is attached to the surface of the insulating plate via an adhesive layer (13). It is being In this case, the conductive rubber sheet-like object (4) and the elastic body (14
) in order to press it smoothly, accurately, and uniformly in a cushioned state.

第3図は、検査用治具回路板の平面図であシ、この図面
において、(6)は検査端であり、通常銅箔又は各種メ
ツ層から成る導電材胴部分である。(7)は接触用プロ
ーブ用のパッドであり、治具回路板に明けられた導通穴
である。(8)は前記検査端と接触用プローブとを電気
的に連結する取出用回路である。通常、プリント基板の
銅箔層がエツチング加工により回路形成された部分であ
る。
FIG. 3 is a plan view of the test jig circuit board. In this drawing, reference numeral (6) is the test end, which is a body portion of a conductive material usually made of copper foil or various metal layers. (7) is a pad for a contact probe, and is a conductive hole drilled in the jig circuit board. (8) is a take-out circuit that electrically connects the test end and the contact probe. Usually, the copper foil layer of the printed circuit board is the part where the circuit is formed by etching.

以上のようにして構成された本発明の半導体ウェハー回
路の検査装置を圧締状態にして通電すれば、接触用プロ
ーブと検査用治具回路板の堺体回路と異方向性導eゴム
シート状物とを介して被検査体の接続用パッドに通電し
、各種半導体のウェハー回路の機能の良否を電気制卸を
通じて簡易迅速に検査することができる。
When the semiconductor wafer circuit inspection apparatus of the present invention configured as described above is pressed and energized, the contact probe and the circuit board of the inspection jig circuit board and the anisotropically conductive e-rubber sheet form. By applying electricity to the connection pads of the object to be inspected via the object, the functional quality of various semiconductor wafer circuits can be easily and quickly inspected through electrical control.

つまり本発明によれば、半導体の接続用パッドなどに傷
を付けることなく、簡易迅速に半導体の機能の良否を検
査することができる。
In other words, according to the present invention, it is possible to simply and quickly test the functionality of a semiconductor without damaging the connection pads or the like of the semiconductor.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の半導体ウェハーの検査装置の断面図、第
2図は本発明の半導体ウェハーの検査装置の断面図、第
3図は検査用治具回路板の平面図である。 (1)・・・・・・・・半導体ウェハー、(2)・・・
・・・・・・各種機能を有する回路、(3)・・・・・
・・・・接続用パッド、(4)・・・・・・・・・感圧
異方向性導電ゴムシート状物、(5)・・・・・・・・
検査用治具回路板、(6)・・・・・・・・・検出端、
(7)・・・・・・・・・取出用回路、(8)・・・・
・・・・接触プローブ用パッド、(9)・・・・・・・
・・取付具、(10)・・・・・・・・・接触プローブ
、(11)・・・・・・・・絶縁板、(12)・・・・
・・・・・平板滑、(13)・・・・・・・・・接着層
、(14)・・・・・・・・・弾性体、(15)・・・
・・・・・・接続用コード。 特許出願人の名称 イビデン株式会社 代表者 多賀潤一部 一第 1 図− 7−(〜−− / 第 3 回 (6)
FIG. 1 is a sectional view of a conventional semiconductor wafer inspection apparatus, FIG. 2 is a sectional view of the semiconductor wafer inspection apparatus of the present invention, and FIG. 3 is a plan view of a circuit board of an inspection jig. (1)... Semiconductor wafer, (2)...
・・・・・・Circuit with various functions, (3)・・・・・・
・・・Connection pad, (4)・・・・・・Pressure-sensitive anisotropic conductive rubber sheet, (5)・・・・・・・・・
Inspection jig circuit board, (6)......Detection end,
(7)・・・・・・Takeout circuit, (8)・・・・・・
... Pad for contact probe, (9) ...
...Mounting tool, (10)...Contact probe, (11)...Insulation plate, (12)...
..... Flat plate slip, (13) ..... Adhesive layer, (14) ..... Elastic body, (15) ...
...Connection code. Name of Patent Applicant IBIDEN Co., Ltd. Representative Jun Taga Part 1 Figure 7-(〜-- / 3rd (6)

Claims (1)

【特許請求の範囲】 1、被検査体の半導体ウェハーと検査用治具回路板とを
正対させ、前記半導体ウェハーと検査用治具回路板との
間に感圧異方向性導電ゴムシート状物を挟着し、これら
一体を加圧し通電し、電気制御装置を介して半導体ウェ
ハー回路の有する機能の良不良を検査することを特徴と
する半導体ウェハーの検査方法。 2、被検査体である半導体ウェハー表面に感圧異方向性
尋’、:i3、ゴムシート状物を圧締し通電する検査用
治具回路板を備え、前記回路治具板の表面には検査端と
これと連結した取出用回路とこれと連結した接触プロー
ブのパッドを備え、前記接触プローブは平滑板又はこれ
と隣接する絶縁板に装着され、前記半導体ウェハー回路
の接続用パッドと治具回路板の検査端とが正対するよう
に配設され、かつこれらと連結する電気制御装置とこれ
ら一体を圧締するための加圧用装置とを備えて成る半導
体ウェハーの検査装置。
[Claims] 1. A semiconductor wafer of an object to be inspected and an inspection jig circuit board are directly faced, and a pressure-sensitive anisotropically conductive rubber sheet is placed between the semiconductor wafer and the inspection jig circuit board. 1. A method for inspecting a semiconductor wafer, which comprises sandwiching an object, pressurizing and energizing the two together, and inspecting the functionality of a semiconductor wafer circuit via an electric control device. 2. A test jig circuit board is provided that presses a rubber sheet-like object and energizes the surface of a semiconductor wafer to be inspected. It is equipped with an inspection end, an extraction circuit connected to the test end, and a contact probe pad connected to the test end, the contact probe is mounted on a smooth plate or an insulating plate adjacent to the same, and the contact probe is attached to a smooth plate or an insulating plate adjacent thereto, and the semiconductor wafer circuit connection pad and jig are provided. A semiconductor wafer inspection device comprising an electric control device disposed so as to directly face the inspection end of a circuit board and connected thereto, and a pressurizing device for clamping these together.
JP8940083A 1983-05-20 1983-05-20 Method and apparatus for inspecting semiconductor wafer Pending JPS59214235A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8940083A JPS59214235A (en) 1983-05-20 1983-05-20 Method and apparatus for inspecting semiconductor wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8940083A JPS59214235A (en) 1983-05-20 1983-05-20 Method and apparatus for inspecting semiconductor wafer

Publications (1)

Publication Number Publication Date
JPS59214235A true JPS59214235A (en) 1984-12-04

Family

ID=13969590

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8940083A Pending JPS59214235A (en) 1983-05-20 1983-05-20 Method and apparatus for inspecting semiconductor wafer

Country Status (1)

Country Link
JP (1) JPS59214235A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61154044A (en) * 1984-12-26 1986-07-12 Toyo Electric Mfg Co Ltd Probe card of prober
JPH01291168A (en) * 1988-05-18 1989-11-22 Canon Inc Probe card and measuring method for parts to be measured using the same card
JPH01291167A (en) * 1988-05-18 1989-11-22 Canon Inc Probe card and measuring method for parts to be measured using the same card
AU658196B2 (en) * 1991-07-12 1995-04-06 Sumitomo Electric Industries, Ltd. Method and device for measuring a semiconductor element with bumps, and method and device for manufacturing a semiconductor device
JPH07240444A (en) * 1994-02-25 1995-09-12 Aging Tesuta Kaihatsu Kyodo Kumiai Semiconductor chip test system
WO2004077904A1 (en) * 2003-01-17 2004-09-10 Jsr Corporation Circuit board checker and circuit board checking method

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5467672A (en) * 1977-11-09 1979-05-31 Hitachi Ltd Jig of inspecting characteristic of electronic parts
JPS54156479A (en) * 1978-05-30 1979-12-10 Mitsubishi Electric Corp Test unit for integrated circuit device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5467672A (en) * 1977-11-09 1979-05-31 Hitachi Ltd Jig of inspecting characteristic of electronic parts
JPS54156479A (en) * 1978-05-30 1979-12-10 Mitsubishi Electric Corp Test unit for integrated circuit device

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61154044A (en) * 1984-12-26 1986-07-12 Toyo Electric Mfg Co Ltd Probe card of prober
JPH0515068B2 (en) * 1984-12-26 1993-02-26 Toyo Electric Mfg Co Ltd
JPH01291168A (en) * 1988-05-18 1989-11-22 Canon Inc Probe card and measuring method for parts to be measured using the same card
JPH01291167A (en) * 1988-05-18 1989-11-22 Canon Inc Probe card and measuring method for parts to be measured using the same card
AU658196B2 (en) * 1991-07-12 1995-04-06 Sumitomo Electric Industries, Ltd. Method and device for measuring a semiconductor element with bumps, and method and device for manufacturing a semiconductor device
JPH07240444A (en) * 1994-02-25 1995-09-12 Aging Tesuta Kaihatsu Kyodo Kumiai Semiconductor chip test system
WO2004077904A1 (en) * 2003-01-17 2004-09-10 Jsr Corporation Circuit board checker and circuit board checking method
KR100721478B1 (en) * 2003-01-17 2007-05-23 제이에스알 가부시끼가이샤 Circuit board checker and circuit board checking method
US7279914B2 (en) 2003-01-17 2007-10-09 Jsr Corporation Circuit board checker and circuit board checking method
US7541823B2 (en) 2003-01-17 2009-06-02 Jsr Corporation Circuit board checker and circuit board checking method

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