JPH07240444A - Semiconductor chip test system - Google Patents

Abstract

PURPOSE:To test individual semiconductor chips in parallel prior to separation by forming a conductor film group and a wiring corresponding to individual bonding pads of a semiconductor chip on a supporting insulator and arranging electric contacts on the surface of the conductor film group. CONSTITUTION:A supporting insulator comprises insulating blocks 20 and a soft wiring board 40. Each block 20 is provided with a group of electric contacts 21,... corresponding, in number, to the pads of one semiconductor chip. The insulating blocks 20 move simultaneously or independently in the direction of the surface of a wafer 10 to support the electric contacts 21,... such that they can be brought into contact with a unit bonding pad group on the surface of the semiconductor chip 10 or separated. The electric contacts 21,... have wirings 22,... to be connected with the connection terminals on the back of each insulating block 20. An insulating block guide 30 is provided with a guide hole at a position corresponding to the insulating block 20. A driving group 50 drives the insulating block 20 in the direction of the wafer 10.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a testing device for testing the characteristics of a semiconductor chip, and more particularly, to a probe for testing a chip before cutting into chips in a wafer state. The present invention relates to a semiconductor chip testing device.

[0002]

2. Description of the Related Art A semiconductor chip testing apparatus for testing chip characteristics in a wafer state and performing a wafer probe test has been proposed and implemented. Much research has been conducted on burn-in tests or accelerated aging tests of semiconductor ICs, and burn-in tests have been already performed on chips that are cut out from a wafer, connected to a lead frame, and molded. The so-called initial failure problem can be solved by the burn-in test. However, waste can be reduced if defective chips can be eliminated at an earlier stage than when defective products are produced. Further, the data obtained by this burn-in test can be immediately used for the analysis of the manufacturing process, and the data for improving the process can be obtained. Therefore, there is a strong demand to perform a burn-in test before cutting out chips in a wafer state. For example, the invention of a wafer-level burn-in test for an integrated circuit (Japanese Patent Laid-Open No. 3-86528) proposes a structure in which a contact pad is provided at a portion separated by a scrub lane. Further, the invention of a method and an apparatus for selecting semiconductor chips (Japanese Patent Laid-Open No. 3-38850) proposes a probe in which a conductive rubber sheet is locally pressed to utilize that portion as a contact.

[0003]

Providing the structure for performing the burn-in test on the wafer side as in the above-mentioned invention may not only reduce the utilization rate of the wafer but also complicate the process. By locally pressing the conductive rubber sheet, a probe using that portion as a contact is extremely excellent, but there are a few problems to be solved. That is, it is problematic in terms of disassembly accuracy to simultaneously form (turn on) the contacts corresponding to all the pads of the chip. Even if it is desired to separate a specific chip from the circuit, it is difficult to selectively operate the probe for each chip. Further, it is not easy to make the contact resistance of the contact portion sufficiently low. It is an object of the present invention to provide a semiconductor chip testing apparatus capable of performing simultaneous parallel testing without providing a special structure for inspection on a wafer and in a state before being separated into individual semiconductor chips. is there. Still another object of the present invention is to provide a semiconductor chip test apparatus capable of selecting a contact operation of a probe corresponding to a chip.

[0004]

In order to achieve the above object, the semiconductor chip testing apparatus according to the present invention is in a state before separating the characteristics of a plurality of semiconductor chips formed on a semiconductor wafer into individual semiconductor chips. An apparatus for testing in parallel at the same time, wherein a conductor film group facing individual bonding pads formed on the surface of a semiconductor chip and wirings connecting them to the outside are formed on a supporting insulator, and the individual bonding is performed. An electric contact is arranged on the surface of the conductor film group facing the pad.

[0005]

The present invention will be described in more detail with reference to the drawings. FIG. 1 is a schematic diagram showing the basic configuration of the entire semiconductor chip test apparatus according to the present invention. FIG. 9 is a partially enlarged view of a semiconductor wafer provided with a large number of semiconductor chips to be tested by the semiconductor chip testing apparatus. A large number of semiconductor chips 1 are mounted on the semiconductor wafer 10.
1, 12, 13, 14, 15, ... Are provided,
1 to 20 pads 16 are provided on the periphery of each chip, and circuits inside the chip are connected to these pads. Usually, a semiconductor IC is constructed by cutting the chips and then connecting the pads and the lead frame and packaging. The semiconductor chip testing apparatus according to the present invention is capable of performing necessary tests including burn-in tests before cutting and separating these chips. As shown in FIG. 1, the semiconductor chip testing apparatus according to the present invention basically comprises a wafer jig A and a probe jig B. The semiconductor jig W is supported by the wafer jig A,
The probe assembly P is supported by the probe jig B. A jig alignment means ALD is provided in association with each of the jigs A and B, whereby the probe jig B and the wafer jig A are aligned and face-to-face joined. The aforementioned semiconductor chips 11 to 1 formed on the semiconductor wafers W and 10.
The characteristics of 5 ... Are simultaneously tested in parallel before being separated into individual semiconductor chips. The probe assembly P
Has electrical contacts formed at positions facing and contacting the individual bonding pads 16 formed on the surface of the semiconductor chip formed on the wafer W. This part will be described later in detail with reference to the embodiment.

The relative positional relationship between the electric contact and the jig positioning means ALD on the probe jig B side is adjusted by the position adjusting means AJD on the probe jig side. The probe jig B and the wafer jig A are semiconductor wafers W.
The material has a linear expansion coefficient close to that of, for example, Invar alloy. As a result, a problem does not occur in the connection between the jig and the semiconductor wafer due to the temperature change of the semiconductor chip tester. That is, as a result, the structure is such that the individual semiconductor chips and the contact groups corresponding to the semiconductor chips are not displaced due to temperature changes. Further, the relative positional relationship between the positions of the bonding pads of the individual semiconductor chips formed on the semiconductor wafer W and the jig alignment means ALD on the wafer jig A side is the relative position adjustment on the wafer jig A side. Adjusted by means AJD. The relative position adjusting means AJD may be provided on both the probe jig side and the wafer jig side as described above, or either one may be used. If the wafer jig A and the probe jig B are arranged on substantially the same plane and aligned using a tool microscope or the like, it is possible to perform position adjustment with extremely high accuracy.

Heating means H for heating the respective jigs is provided on the wafer jig A side and the probe jig B side. The temperature of the wafer W heated by the heating means is detected by the contact sensor S, and the temperature of the heating means is controlled by the detection output. On the probe jig B side, a relay circuit CPD is provided for driving the probe, supplying operating power to the wafer W via the probe, and relaying the information of the chip obtained from the wafer chip to the outside.

FIG. 2 is a front partial sectional view showing a first embodiment of a probe assembly of a semiconductor chip testing apparatus according to the present invention, and FIG. 3 is a plan view showing an insulating block of the first embodiment taken out. It is a front view and a bottom view. The supporting insulator includes the insulating block 20 and the soft wiring board 40. Each of the insulating blocks 20 has the electrical contacts 21, 21 ... Corresponding to the number of pads for one semiconductor chip.
・ 21 are arranged as a group. The respective insulating blocks 20 are simultaneously and independently moved in the surface direction of the wafer 10 so that the electric contact groups 21, 21 ... It is supported. The electric contacts 21, 21, ... 21, The wiring connections 22, 22 to the connecting connection ends 23 ,.
..22 The flexible wiring board 40 is connected to the connecting connection ends 23, ...
22 ... 22 is connected to the outside (CPD in FIG. 1). The insulating block guide 30 is made of a material having a linear expansion coefficient similar to that of the wafer 10. A guide hole is provided in the insulating block guide 30 at a position corresponding to the insulating block 20. The driving member 50 is provided corresponding to the insulating block 20 and drives the insulating block 20 toward the wafer 10.

The electrical contact has a diameter and a thickness of 10 to 2
Although it is as small as about 100 μm, it can be accurately arranged and manufactured as follows. The electrical contacts 21,
21 ... Can be made into electric contacts by spot welding or soldering independent metal balls or metal hemispheres to the ends of the wiring connections 22, 22. It is also possible to form the electric contacts 21, 21, ... 21 in a convex shape by printing or dispenser with independent conductive rubbers, and use the portions as electric contacts. It should be noted that this conductive rubber is different from the conventional structure having anisotropic conductivity. In this case, even if it is made uniform from the back side, only the convex portion conducts and operates as a contact. It is also possible to form a convex shape of metal by electroplating on the surface of the conductor film group to form an electrical contact.

An electromagnetic actuator, an electrostrictive actuator, or a fluid actuator can be used as the driving member 50 for driving the above-mentioned contacts. The driving means 50 for individually driving an area corresponding to each chip area of the film-like structure to bring the contact group into contact with the pad has a stroke of about 10 to 100 μm, which is extremely small. It is possible to use a piezoelectric element actuator that can expand and contract. The driving means 50 for individually driving the area corresponding to each chip area of the film-like structure to bring the contact groups into contact with the pad uses an electromagnetic actuator that is individually movable in the semiconductor wafer surface direction by an electromagnetic force. You can also An air actuator that individually moves in the surface direction of the semiconductor wafer by air pressure can be used as a driving unit that individually drives an area corresponding to each chip area of the film structure to bring the contact group into contact with the pad. An example is shown in FIG.

FIG. 4 is a front partial sectional view showing a second embodiment of the probe assembly of the semiconductor chip test apparatus according to the present invention, and FIG. 5 is the second embodiment of the probe assembly of the semiconductor chip test apparatus according to the present invention. FIG. 3 is a plan view and a front view of the contact bar showing the contact bar taken out. At the upper end of the insulating block, the electric contacts 21, 21 ... 21 are individually combed with an elastic insulating material made of ceramic so that the electric contacts 21.
It is as 24. .. 24 are arranged in the vicinity of the tips of the individual comb teeth 24 ,. Although this embodiment has a structure suitable for a dual in-line package chip, it can be similarly applied to a structure having pads on four sides as shown in FIG.

FIG. 6 is a partial front sectional view showing a third embodiment of the probe assembly of the semiconductor chip test apparatus according to the present invention, and FIG. 7 is an enlarged view of a supporting insulator of the semiconductor chip test apparatus according to the present invention. In the supporting insulator, as shown in FIG.
The structure shown in is also the same. ) Electrical contact 2
1, 21 ... 21 are individually formed on the film structure 70 of the soft material so as to freely follow the irregularities on the surface of the semiconductor chip. The driving means 50 individually drives an area corresponding to each chip area of the film structure 70 to bring the contact groups into contact with the pads of the semiconductor chips of the wafer. Figure 7
In the film-like structure 70 shown in FIG. 2, the electric contacts 21, ..., 21 correspond to the individual semiconductor chips of the supporting insulator so that the electric contacts 21 can freely follow the irregularities on the surface of the semiconductor chip. The structure in which the 21st part is separated from the surroundings by the groove 71 in a peninsular shape. A rubber pad 51 is provided on the upper end of the driving means 50, and a peninsular portion is adhesively fixed to the driving means 50 via the pad 51. Therefore, when the driving means 50 is restricted in position by the main body 60 of the probe jig B, the position of the peninsular portion is restricted to a position facing the semiconductor chip of the wafer as a result. At this time, the linear expansion coefficient between the film-like structure 70 and the semiconductor wafer can be increased by narrowing the width of the bridge portion connecting the peninsula-shaped portions to facilitate expansion and contraction, or by forming the bridge portion in a zigzag shape or a labyrinth shape. Even if they are different, it is possible to avoid applying unreasonable tensile stress of the film to the peninsular part due to expansion and contraction due to temperature change of the film-like structure, so that there is no displacement between the semiconductor chip and the peninsular part.
Further, since the size of each peninsular portion is as small as a few mm square, the dimensional change due to the temperature of the peninsular portion itself can be designed to be sufficiently small with respect to the allowable position error of the probe contact. As the driving means 50, the above-mentioned electromagnetic actuator or electrostrictive actuator can be used.

FIG. 8 is a front sectional view for explaining the operating state of the fourth embodiment of the probe assembly of the semiconductor chip testing apparatus according to the present invention. In this embodiment, the drive means 80
, Which corresponds to the driving means 80A in the figure, is covered with air so that the electric contacts 21, ..., 21 in the film-like structure 70 correspond to the semiconductors on the wafer W. Contact groups 21 and 2 on the chip surface
It is electrically connected to 1 ... 21. Since the portion corresponding to the driving means 80B in the figure is not pushed by air, the electrical contacts 21, ...
It is not electrically contacted with the corresponding pad on the surface of the semiconductor chip.

[0014]

As described in detail above, the semiconductor chip testing apparatus according to the present invention simultaneously tests the characteristics of a plurality of semiconductor chips formed on a semiconductor wafer in parallel before separating them into individual semiconductor chips. A device for
A conductor film group facing the individual bonding pads formed on the surface of the semiconductor chip and wiring for connecting them to the outside are formed on the supporting insulator, and an electric wire is formed on the surface of the conductor film group facing the individual bonding pads. It is configured by arranging contacts. Information on the chip can be retrieved by partially driving the electrical contacts.

[Brief description of drawings]

FIG. 1 is a schematic front sectional view showing a basic configuration of an entire semiconductor chip test apparatus according to the present invention.

FIG. 2 is a partial front sectional view showing a first embodiment of the probe assembly of the semiconductor chip test apparatus according to the present invention.

3A and 3B are a plan view and a front view bottom view of the contact bar showing the contact bar of the first embodiment of the probe assembly of the semiconductor chip test apparatus according to the present invention.

FIG. 4 is a front partial cross-sectional view showing a second embodiment of the probe assembly of the semiconductor chip test apparatus according to the present invention.

5A and 5B are a plan view and a front view of the contact bar showing the contact bar of the second embodiment of the probe assembly of the semiconductor chip testing apparatus according to the present invention.

FIG. 6 is a front partial cross-sectional view showing a third embodiment of the probe assembly of the semiconductor chip test apparatus according to the present invention.

FIG. 7 is a plan view showing a supporting insulator film of the third embodiment of the probe assembly of the semiconductor chip test apparatus according to the present invention.

FIG. 8 is a front sectional view for explaining an operating state of the fourth embodiment of the probe assembly of the semiconductor chip test apparatus according to the present invention.

FIG. 9 is an enlarged schematic view showing the structure of a wafer to be tested by the semiconductor chip test apparatus according to the present invention.

[Explanation of symbols]

A wafer jig B probe jig C chamber H heating means P probe assembly S wafer temperature sensor ALD jig positioning means AJD probe, wafer position adjusting means CPD (probe drive, chip drive, chip information) relay circuit W, 10 wafer 11, 12, 13, 14, 15 Chip 16 Pad 20 Insulation block 21 Electric contact 22 Conductor wiring 23 Communication connection pad 30 Insulation block guide 40 Flexible connection means (soft wiring substrate) 50 Drive block 51 Rubber pad 60 Drive Block guide 70 Insulating film 71 Insulating film cutting groove 80 Air actuator

Claims (11)

[Claims] 1. A device for simultaneously and in parallel testing the characteristics of a plurality of semiconductor chips formed on a semiconductor wafer before separating them into individual semiconductor chips, wherein a support insulator is provided on the surface of the semiconductor chips. A semiconductor formed by forming a conductor film group facing each formed bonding pad and a wiring for connecting them to the outside, and arranging an electrical contact on the surface of the conductor film group facing the individual bonding pad. Chip test equipment. 2. The semiconductor chip testing apparatus according to claim 1, wherein the electric contacts have a structure in which independent metal balls or metal hemispheres are welded or soldered to form electric contacts. 3. The electric contact has a structure in which conductive rubber independent from each other is formed into a convex shape to form an electric contact.
The semiconductor chip test apparatus described. 4. The semiconductor chip test apparatus according to claim 1, wherein the electrical contact has a structure in which a metal is formed into a convex shape by electroplating on the surface of the conductor film group to form an electrical contact. 5. The supporting insulator includes an insulating block and a flexible wiring board, and each of the insulating blocks is provided with a group of the electrical contacts corresponding to one semiconductor chip. And each of the electrical contact groups can be moved by electrically contacting or separating from the unit bonding pad group of the semiconductor chip surface, and having a wiring connection for connecting each of the electrical contacts to the back surface of each insulating block, The semiconductor chip testing device according to claim 1, wherein the soft wiring board has wiring for connecting the wiring connections to the outside. 6. The insulating block has a comb-shaped structure made of an elastic insulating material such as ceramics or glass so that the electric contacts individually follow the irregularities on the surface of the semiconductor chip with an elastic force. 6. The semiconductor chip testing device according to claim 5, wherein the electric contact is provided. 7. The supporting insulator corresponds to a film structure of a soft material so that the electric contacts can freely follow the irregularities on the surface of the semiconductor chip individually, and an area of each chip of the film structure. 2. The semiconductor chip test apparatus according to claim 1, comprising driving means for individually driving the areas to bring the contact groups into contact with the pads. 8. A film structure made of a soft material so that the electric contacts can freely follow the irregularities on the surface of the semiconductor chip, and the electric contact group portion corresponding to each semiconductor chip of the supporting insulator is a peninsular island. The semiconductor chip testing device according to claim 7, which has a structure that is separated from the surroundings in a circular shape. 9. The driving means for individually driving an area corresponding to each chip area of the film-like structure to bring the contact group into contact with a pad is individually expandable and contractable in a semiconductor wafer surface direction by a piezoelectric element. Item 7. A semiconductor chip testing device according to item 7. 10. A structure in which drive means for individually driving an area corresponding to each chip area of the film-like structure to bring the contact group into contact with the pad is individually movable in the semiconductor wafer surface direction by an electromagnetic force. The semiconductor chip test apparatus according to claim 7. 11. A drive means for individually driving an area corresponding to each chip area of the film-like structure to bring the contact group into contact with a pad is configured to be individually movable in the semiconductor wafer surface direction by air pressure. The semiconductor chip testing device according to claim 7.