JPS59211258A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent the characteristic of a semiconductor device from decreasing due to the lateral diffusion of a impurity by using a thin film having an anisotropy for reducing the mask effect in a vertical direction to the surface of a film when forming source and drain by implanting impurity ions having large diffusion coefficient, thereby reducing the reduction in the effective channel length. CONSTITUTION:An N type well 2, a field oxidized film 3, a gate oxidized film 4 and N-channel, P-channel polycrystalline Si gate electrodes 5, 6 are formed on a P type Si substrate 1, and As ions are implanted to a P-channel region. A thin Mo film 13 is formed, and B ions are implanted to an N-channel region. B ions are implanted only to the position isolated at a distance equal to the thickness of a thin Mo film 13 from the end of a gate electrode 6 in the substrate 1. The size of the part, to which no impurity ions are implanted can be controlled by the thickness of the film 13. The film 13 is removed, an interlayer insulating film 12 is formed, heat treated to form N type and P type source and drains 8, 11.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for manufacturing semiconductor devices, particularly MO8LSI.

Conventional configurations and their problems In order to improve the functionality and density of semiconductor devices, especially MO8LSIs, it is necessary to reduce current consumption, and for this reason, 0MO5 is being strongly promoted.

0MO8LSI i n-channel MOS for high density
It is desirable to miniaturize both the dimensions of transistors and p-channel MO3) transistors, but using conventional manufacturing methods, it was difficult to miniaturize transistors to the same level as p-channel MO3) transistors and in-channel MO8) transistors. .

All the problems of the conventional manufacturing method will be explained below. FIG. 1 is a cross-sectional view of a part of the conventional process for manufacturing an 81-game) CMO3LSIi, and 6 and 6 are each n-channel.

N-channel polycrystalline S1 gate electrode, 8°11
are an n-channel, an n-channel source, and a drain, respectively.

1 After forming an n-type well 2 on a solid-type Si substrate 1, a field oxide film 3. After forming the gate oxide film 4 and performing ion implantation to control the threshold voltage (VT), polycrystalline S with n-type impurities added to lower resistance.
N channel by etching the i film.

n-channel gate electrode5. θ is fully formed (Fig. 1a)
. Next, the n-channel region is covered with a photoresist 7, and As ions are implanted to form an n-channel source and drain (FIG. 1b). After removing the photoresist 7,
Cover the n-channel region with gold photoresist 1o and then the n-channel source.

B ions are implanted to completely form the drain (FIG. 1C). After removing the photoresist 10, the CV, which is an interlayer insulating film, is removed.
After forming the D5i02 film 12, heat treatment fK: is performed to sufficiently activate the implanted ions, resulting in n-channel, n-channel
Form the channel source and drain 8.11 (first
Figure d).

As mentioned above, FiB ions are applied to the n-channel region to form teeth and drains, and As is applied to the n-channel region.
Ions are implanted, but after heat treatment, B has a much larger diffusion coefficient than As in the Si substrate, so the n-channel source and drain 11 are vertically larger than the n-channel source and drain 8. It is formed deeply both in the direction (depth direction) and in the lateral direction.

If the lateral diffusion (spreading) of the source and drain is large,
That is, if the effective channel length is short, the withstand voltage between the source and drain decreases, leading to a decrease in characteristics such as a decrease in vT. Such a characteristic deterioration is more remarkable in an n-channel whose source and drain have larger lateral inward extensions.

It improves and stabilizes properties such as capturing defects introduced into Si substrates and alkali ions that penetrate into insulators during the LSI manufacturing process, and making insulating films denser.

Furthermore, high-temperature heat treatment is unavoidable in order to achieve high reliability.

Therefore, in the production of LSIs with fine dimensions, it is necessary to take measures to prevent the impurities introduced into the Si substrate to completely form the north and drain from being diffused in the lateral direction by this high-temperature heat treatment, thereby preventing the deterioration of the characteristics.

Conventionally, as a countermeasure for this, the total size of the n-channel gate electrode was
For example, if the total gate electrode size of an n-channel is 2μ772, the n-channel will be 2μ thicker than that of the channel.
To make the characteristics of both channels the same by setting the thickness to 5 μm or 12 μm, or to completely implant B ions to form the source and drain of an n-channel, a mask material such as 5102 film is formed only on the side surface of the gate electrode. A method is adopted in which B ions are implanted into a region a predetermined distance away from the electrode end.

However, the former not only hinders the miniaturization of the n-channel, but also serves as a countermeasure when the characteristics of both the n-channel and the p-channel deteriorate as the miniaturization progresses. It is difficult to form the entire material to a predetermined thickness with good uniformity.

Purpose of the Invention The present invention provides a method for implanting impurity ions with a large diffusion coefficient into a Si substrate and performing high-temperature heat treatment when forming the entire source and drain, so that even if the impurities diffuse laterally, the effective channel length can be maintained. The goal is to completely form the source and drain using a manufacturing method that reduces the amount of loss.

Structure of the Invention The manufacturing method of the present invention is such that high-energy impurity ions implanted in a direction perpendicular to the film surface on the surface of a semiconductor substrate on which a gate electrode is formed can easily pass through, that is, a masking effect in the direction perpendicular to the film surface can be produced. The anisotropic mask effect, which is smaller than the mask effect in the direction parallel to the film surface, is entirely formed by completely forming a thin film and implanting impurity ions of the opposite conductivity type to the semiconductor substrate in a direction almost perpendicular to the semiconductor substrate surface. All features of the source and drain can be formed by introducing and heat-treating the gold foil inside.

EXAMPLES The method according to the present invention will be explained in detail below. Before implanting impurity ions for which lateral diffusion is a problem, if a thin film of a predetermined thickness with the above-mentioned anisotropic mask effect is formed and all impurity ions are implanted, the impurity ions implanted perpendicularly to the film surface will be removed from the thin film. , and is implanted into the main portions of the source and drain regions within the Si substrate. On the other hand, the impurity ions implanted into the thin film formed on the side surface of the gate electrode are implanted in a direction parallel to the film surface, so the masking effect of this thin film is strong, and the effective masking effect of this thin film is further increased. Because it is too thick, it cannot pass through this thin film. Therefore, impurity ions are not implanted from the end of the gate electrode in the Si 2 substrate to a distance approximately equal to the thickness of the thin film on the side surface of the gate electrode.

After that, if necessary, the thin film is removed, the entire insulating film is formed, and the semiconductor substrate is subjected to heat treatment. The impurity ions implanted into the Si substrate are activated and at the same time are deeply diffused, forming the source and drain. It is formed. At this time, the impurity ions are also diffused laterally, and the source and drain expand laterally, but the region where the impurity ions are implanted in the Si substrate is located a distance equal to the thickness of the thin film from the end of the gate electrode. The sauce was then heat treated.

The drain does not go all the way under the gate electrode, and the effective channel length does not become significantly smaller than that of the gate electrode.

Generally, when an insulating film is formed on the gate electrode, the effective film thickness of the insulating film on the side surface of the gate electrode is large enough to prevent impurity ions from flying in from a direction almost perpendicular to the semiconductor substrate. I can do it. However, the area where impurity ions can be blocked is equal to the thickness of the insulating film on the side surface of the gate electrode, and in order to enlarge the area that can be blocked, it is necessary to increase the thickness of the insulating film. However, if the total thickness of the insulating film is reduced, ions that should form the source and drain will also be blocked, making it impossible to increase the thickness of the insulating film.

However, according to the manufacturing method of the present invention, even if the thin film having an anisotropic mask effect on the gate electrode is not exposed much, the impurity ions forming the source and drain pass through this thin film and reach the Si substrate. be introduced. Therefore, the region in contact with the end of the gate electrode into which impurity ions are not implanted can also be increased at the same time as the thickness of the thin film.

In the manufacturing method of the present invention, the thin film with a small masking effect in the direction perpendicular to the film surface formed on the surface of the semiconductor substrate is '
For example, there are semiconductor or metal thin films made of columnar crystals that grow long in the film thickness direction.

The case where a thin film made of the above-mentioned columnar crystals (hereinafter referred to as a columnar crystal thin film) is used will be explained below with reference to Fig. 2. 6 is a polycrystalline Si gate electrode, 13 is a columnar crystal thin film, 11f
It is an IP type source and drain.

When the columnar crystal thin film 13 is formed on the surface of a semiconductor substrate, long crystals grow in the growth direction of the thin film. Therefore, vertical crystals grow on the upper surface of the source and drain regions and the polycrystalline Si gate electrode 6, while crystals perpendicular to the side surfaces grow on the side surfaces of the polycrystalline Si gate electrode 6. In the columnar crystal thin film 13, high-energy impurity ions implanted in the long axis direction of the crystal, that is, in a direction perpendicular to the film surface, easily pass along the grain boundaries, but impurity ions implanted in the long axis direction of the crystal do not penetrate into the crystal. It is not possible to traverse long distances without running out of energy while colliding. For this purpose, for example, accelerated high-energy B ions are used as a source.

Although the drain region and the columnar crystal thin film formed on the upper surface of the Si gate electrode 6 easily pass through to form the source and drain 11, the polycrystalline Si is implanted into the columnar crystal thin film formed on the side surface of the gate electrode 6. In addition to the above-mentioned reasons, the B ions are blocked in the thin film due to the fact that the effective film thickness in the injection direction is large.

Therefore, B ions are not implanted in K within a distance approximately equal to the thickness of this thin film from the end of the polycrystalline Si gate electrode (region 14 in FIG. 2). Note that the columnar crystal thin film can be obtained by selecting the conditions for forming the metal or semiconductor gold film. For example, an MO thin film formed by sputter deposition is a columnar crystal thin film.

Next, a practical example of using the present invention in manufacturing a Si gate 0MO8LSI will be described with reference to FIG. 3, which is a cross-sectional view of the process.

In FIG. 3, 5 and 6 are n-channel and p-channel polycrystalline Si gate electrodes, respectively, and 8 and 11 are n-channel and p-channel polycrystalline silicon gate electrodes, respectively.
Source and drain of the channel, 12 is an insulating film, 13 is N
o It is a thin film.

All ions in the p channel region KP of the p-type Si substrate 1 are implanted, and an n-type well 2 with a depth of 5 μm is formed by heat treatment 'f near fiL, and a field oxide film 3. After forming a gate oxide film with a thickness of 4Q nm, all B ions were implanted into the channel region for vT control, and then a high concentration of P was added to make a polycrystalline Si film with a sheet resistance f of 40Ω. N-channel, p-channel polycrystalline Si with equal width of 2μ272
Gate electrodes 5 and 6 are formed (FIG. 3a).

Next, cover the p-channel region with a gold photoresist 7 of 4×1015/c to completely form the n-channel source and drain.
? 1 of As ions are fully implanted (Fig. 3b).

After removing the photoresist layer, the thickness of Mo was 0.3 Itm.
A thin film 13 is formed by sputtering method etc. (FIG. 3C)
.

Next, the n-channel region was covered with photoresist 10, and then heated at 60K to form the p-channel source and drain.
B ions of 2×10 /cl accelerated at a voltage of V are fully implanted (FIG. 3d). At this time, the p-channel Si substrate has only B at position 1, which is a distance of 0.37 tnl from the end of the polycrystalline Si gate electrode 6, which is equal to the thickness of the Mo thin film 13.
No ions are implanted.

After removing the photoresist 10 and removing the Mo thin film 13 by immersing the semiconductor substrate in an H2O2 solution, a CVD5i02 film 12 was formed as an interlayer insulating film and heat treated at 1000° C. for 10 minutes (FIG. 3e).

Through this heat treatment, the implanted As ions are activated and diffused into the n-channel to form an n-type source and drain 8 with a depth of 0.267°C, while the implanted B ions are activated and diffused into the p-channel. Activated and diffused to a depth of 0.6μ
The p-type source and drain 11 of m are of type Fy.

Since the n-channel source and drain As are diffused laterally, their tips are at the edge of the gate electrode, 1: Q
It penetrates 0.2 μm. On the other hand, the p-channel source.

B is also diffused in the drain by 0.5μη2 in the lateral direction.

The region into which B ions are implanted extends only 0.3 μz from the edge of the polycrystalline Si gate electrode 6.

The penetration of the source and drain 11 under the polycrystalline Si gate electrode e is suppressed to 0.2/1 m.

, after that, the contact window is fully opened at the predetermined position, and A1
An LSI is manufactured by completely forming the wiring.

Next, a second embodiment in which all n-channel sources and drains of MO8LSI are formed will be described with reference to FIG. 4, which is a cross-sectional view of the process. 81 is the region where ijP ions are implanted, 13 is the region where M
In the O thin film, 82 is a region where As ions are implanted.
are the source and drain of an n-channel.

All P ions are implanted at a dose of 2×10/cJ into the n-channel region of the semiconductor substrate on which the polycrystalline Si gate electrode 5 is formed to form a region 81 in which P ions reach the end of the polycrystalline Si gate electrode 5. .

Next, Mo thin film 1, which is a columnar crystal thin film with a thickness of 0.3 μz
3 is formed, and As ions are fully implanted at a dose of 4×10. The Mo thin film 13 formed on the side surface of the polycrystalline Si gate electrode 6 has a thickness approximately equal to that of the Mo thin film 13 from the end of the polycrystalline Si gate electrode 5 to the Si substrate in order to sufficiently block the passage of implanted As ions. High-concentration As ions are implanted only in region 82, which is separated by a distance equal to
Figure b).

After removing the Mo thin film 13, the interlayer insulating film C1VDS is removed.
After forming the i02 film 10 gold, heat treatment at 900'C for 60 minutes resulted in P ions and As implanted into the 81 substrate.
The ions are activated to form sources and drains 8. This polycrystalline Si gate electrode 5 of the source and drain 8
Since the P impurity concentration in the portion 81 in contact with the lower channel region is relatively low, even if a voltage is applied between the source and the drain, the electric field strength near the drain does not increase, and few hot electrons are generated. On the other hand, the polycrystalline Si of the source and drain, and the portions away from the 5th edge of the gate electrode are highly concentrated with As.
Impurities are added to lower the electrical resistance of the source and drain.

Forming the source and drain 8 consisting of a low concentration portion 81 and a high concentration portion as in this embodiment is an effective means for improving the withstand voltage of a fine MO8Tr with a short channel length and preventing reliability deterioration due to pot electrons. However, the present invention is advantageous in that such sources and drains can be easily formed with good reproducibility.

In the second practical example, after the entire Mo thin film 13 is formed and high-concentration As ions are implanted, heat treatment may be performed at high temperature without removing the Mo thin film 13, and the Mo thin film 13 may be removed after the heat treatment. In this case, at least the surface of the polycrystalline Si gate electrode 5 reacts with the Mo thin film 13 to form molybdenum silicide, thereby reducing the resistance.

Effects of the Invention The present invention is achieved by forming a mask gold for impurity ion implantation on the side surface of the gate electrode in a self-aligned manner without using any photolithography method. Furthermore, the thickness of the portion in contact with the end of the gate electrode into which impurity ions are not implanted can be tilted to the side with high accuracy depending on the thickness of the thin film, and the uniformity is equivalent to the uniformity of the thickness of the thin film. Therefore, the present invention can greatly contribute to manufacturing fine-sized LSIs with a straight yield while preventing the aforementioned deterioration of characteristics. Note that the thin film
C is not limited to Mo thin films, but the same effect can be obtained with columnar crystal thin films of other metals or semiconductors.

[Brief explanation of the drawing]

Figures 1 a to d are process cross-sectional views of the conventional 0MO8LSI manufacturing method, Figure 2 is a partial cross-sectional view of the LSI in the middle of the process of the present invention, Figures 3 a - e and Figures 4 a to Ou are respectively in accordance with the present invention. FIG. 3 is a cross-sectional view of the manufacturing process of the MO3LSI of the example. 6.6...n, p-channel source, drain; 8.11...n, p-channel source, drain. 12...CVD 5i02 film, 13...
・A thin film that has a small masking effect in the direction perpendicular to the film surface for ion implantation. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 2 Figure 3 Figure 3

Claims (3)

[Claims] (1) forming a thin film on the main surface of the semiconductor substrate on which the gate electrode is formed, having anisotropy that has a small masking effect in the direction perpendicular to the film surface against accelerated impurity ions;
The method includes a step of implanting impurity ions accelerated through the thin film into the semiconductor substrate, and a step of performing heat treatment to activate the impurity ions implanted into the semiconductor substrate to completely form a drain and a drain. A method for manufacturing a semiconductor device, characterized in that: (2) The method for manufacturing a semiconductor device according to claim 1, wherein the thin film is a thin film made of columnar crystals. (3) forming an anisotropic completely blind thin film that has a small masking effect in the direction perpendicular to the film surface against accelerated impurity ions on the main surface of the semiconductor substrate on which the gate electrode is formed;
a step of implanting impurity ions accelerated through the thin film into the semiconductor substrate; and a step of removing the thin film;
The step of forming an insulating film and heat treatment are performed to activate impurity ions implanted into the semiconductor substrate, thereby forming sources and drains. 1. A method of manufacturing a semiconductor device, comprising the step of forming a semiconductor device.