JPS59208717A - Infrared annealing apparatus - Google Patents
Infrared annealing apparatusInfo
- Publication number
- JPS59208717A JPS59208717A JP8301783A JP8301783A JPS59208717A JP S59208717 A JPS59208717 A JP S59208717A JP 8301783 A JP8301783 A JP 8301783A JP 8301783 A JP8301783 A JP 8301783A JP S59208717 A JPS59208717 A JP S59208717A
- Authority
- JP
- Japan
- Prior art keywords
- parallel
- infrared
- reflected
- heated
- quartz glass
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000137 annealing Methods 0.000 title claims description 16
- 239000000463 material Substances 0.000 claims description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 2
- 210000000988 bone and bone Anatomy 0.000 claims 1
- 239000004065 semiconductor Substances 0.000 abstract description 41
- 235000012431 wafers Nutrition 0.000 abstract description 35
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 19
- 238000010438 heat treatment Methods 0.000 abstract description 4
- 239000000126 substance Substances 0.000 abstract 3
- 230000001678 irradiating effect Effects 0.000 abstract 1
- 241000257465 Echinoidea Species 0.000 description 6
- 230000000694 effects Effects 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Recrystallisation Techniques (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、赤外線アニール装置、特に半導体工業で利用
されるＳｔ（シリコン）ウェハのアニール装置に関する
ものである。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an infrared annealing apparatus, particularly an apparatus for annealing St (silicon) wafers used in the semiconductor industry.
従来例の構成とその問題点
一殻に、アニール装置は熱炉で行なうなどいろいろな８
２類があるが、赤外線アニール装置は、急速加熱、急速
冷却ができるという利点があるため。In addition to the conventional configuration and its problems, the annealing device uses various 8 types, such as a thermal furnace.
There are two types, but infrared annealing equipment has the advantage of rapid heating and rapid cooling.
枡来、盛んに使用されるものと予想される。It is expected that it will be widely used.
従来の赤外線アニール装置は、第１図にその具体構成を
示すように、数本の赤外線ラング１を水平面に対して平
行に配置し、そのランプは１反射鏡２によって反射光が
平行光線３となるように配ｔ６され、半導体ウェハ４ば
、その反射平行光線３’を最も効率よく受けるために１
反射平行光線３に対して垂直に、すなわち水平面に対し
て平行に配置しである。外だ、半導体ウェハ４は、ガス
の供給１：１５及び４ノ＋気口６をもつ石英ガラス角管
７の中（・こ八っている。As shown in FIG. 1, a conventional infrared annealing device has several infrared rungs 1 arranged parallel to a horizontal plane, and the lamps are arranged so that the reflected light is converted into parallel light rays 3 by a reflector 2. In order to most efficiently receive the reflected parallel light rays 3', the semiconductor wafer 4 is
It is arranged perpendicularly to the reflected parallel rays 3, ie parallel to the horizontal plane. Outside, the semiconductor wafer 4 is placed inside a square quartz glass tube 7 with a gas supply of 1:15 and 4 air ports 6.
しかしながら上記のような構成では、半導体ウニかが水
平面に対して平行（（配置されているので、処理枚数か
多くとれないという欠点かめった。この従来装置の問題
点を解決する手段としては、例えば次のような構成が考
えられる。第２図にその具体（（１へ成を示すように、
数本の赤外線ランプ８を、水平面に対して水平となるよ
うに配置し、反射鏡９に」：って、赤外線ランプ８０反
射光が水５（′−面ぐこ対して垂直な平行光線１０とな
る。また、カスの供給Ｄ１１と排気口１２を備えた外気
と遮断するための石英ガラス角管１３の」二面と下面に
、相互に反射平行光線１０が当たるように赤外線ランプ
８は配置されていて、紙面に対して垂直に並んでいる。However, in the above configuration, the semiconductor urchins are arranged parallel to the horizontal plane, so it is difficult to process a large number of wafers. The following configuration can be considered. Figure 2 shows its details ((as shown in section 1)
Several infrared lamps 8 are arranged horizontally with respect to a horizontal plane, and the reflected light from the infrared lamps 8 is reflected by a parallel ray 10 perpendicular to the surface of the water 5 ('). In addition, the infrared lamp 8 is arranged so that the reflected parallel light rays 10 mutually strike the two surfaces and the bottom surface of the quartz glass square tube 13, which is provided with the waste supply D11 and the exhaust port 12 and is isolated from the outside air. and are lined up perpendicular to the plane of the paper.
寸だ、半導体ウェハ１４は、水平ｍ■に対して垂直、す
なわち平行光線に対して、平１１となるように石英ガラ
ス台１５によって配置されている。The semiconductor wafer 14 is placed on the quartz glass stand 15 so as to be perpendicular to the horizontal plane m, that is, to form a plane 11 with respect to parallel light.
しかしなから上記のような構成では、半導体の処理枚数
は増やすことができるが、赤外線ランプ８の平行反射光
１０に対して、半導体ウェハ１４の面が平行となってい
ることから、強い照射強朋がイ４ｉられないという欠点
がある。However, with the above configuration, although the number of semiconductors processed can be increased, since the surface of the semiconductor wafer 14 is parallel to the parallel reflected light 10 of the infrared lamp 8, a strong irradiation intensity is required. The drawback is that you can't enjoy your friends.
発明の目的
本発明の目的は、赤外線アニール装置を用いて処理枚数
を増やす装置を提供することにある・発明の構成
本発明は、反射光が平行となるように反射鏡を有した数
本の赤外線ランプを用い、その平行反射光シこ対して、
重ならないように斜め方向に半導体ウェハを配置するこ
とと、半導体ウェハを水平面に対して垂直に立て、その
半導体ウェハの面に斜入射の平行光線が照射されるよう
に、赤外線ランプを破っている反射鏡を配置するという
装置から構成されており、半導体ウェハの処理枚数を増
やすといつ特有の効果を有する。Purpose of the Invention The purpose of the present invention is to provide an apparatus that increases the number of sheets processed by using an infrared annealing device.Structure of the Invention The present invention provides an apparatus for increasing the number of sheets processed by using an infrared annealing device. Using an infrared lamp, its parallel reflected light is
The semiconductor wafers are arranged diagonally so that they do not overlap, and the semiconductor wafers are stood perpendicular to the horizontal plane, and an infrared lamp is used so that obliquely incident parallel light is irradiated onto the semiconductor wafer surface. It consists of a device in which reflective mirrors are arranged, and it has a unique effect when increasing the number of semiconductor wafers processed.
実施例の説明
以下本発明の一実施例を図により説明する。第３図は本
発明の第１の実施例における赤外線アニール装置を説明
するものである。第３図において、１６−赤外線ランプ
、１７は反射鏡、１８は半導体ウニ・・、１９は半導体
ウニ・・全支える石英ガラス台、２ｏに１水平に配置し
た透明な石英ガラス角′百である。石英ガラス角管２０
は、ガスの供給口２１と損気口２２を有し外気を逗断す
るものである。その石英ガラス角管２０の上面と下面に
互い（／（二゛１／行（・こ赤外１１′！！！シンプ１
６を配置し、そのランプ１６の反射光が垂直面に対して
平行光線２３となる」−うにノブ射鏡１７を配置しであ
る。そして寸だ中直面に対しである一定の傾きをもって
多１めに、かつ反射平行）１を線２３に対して重ならな
いように〜疋の間隔で半導体ウエノヘ１８を配置する石
英ガラス台１９を一１石英ガラス角管２０の端から出し
入ノ１できるように構成されている。第４図は石英ガラ
ス台１９に１枚の半導体ウニ／１１８を配置し乙〕場合
の飼ネ范図である。DESCRIPTION OF EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 3 illustrates an infrared annealing apparatus according to a first embodiment of the present invention. In Fig. 3, 16 - infrared lamp, 17 a reflector, 18 - semiconductor sea urchin, 19 - semiconductor sea urchin... A quartz glass stand that supports the entire structure, and a transparent quartz glass corner placed horizontally in 2o. . Quartz glass square tube 20
This has a gas supply port 21 and an air loss port 22 to shut off outside air. The upper and lower surfaces of the quartz glass square tube 20 are mutually connected (/(2゛1/row(・This infrared 11'!!!Simp 1
6, and the reflected light from the lamp 16 becomes parallel light rays 23 with respect to the vertical plane. Then, the quartz glass table 19 on which the semiconductor wafer 18 is placed is placed at a certain inclination with respect to the middle plane, and parallel to the reflection line 1, so that it does not overlap with the line 23. 1. The quartz glass square tube 20 is constructed so that it can be put in and taken out from the end thereof. FIG. 4 is a diagram of a cage in which one semiconductor sea urchin 118 is placed on a quartz glass table 19.
以上のｊ、９＆こ本実施例によれば、半導体ウエノ・１
８を斜めシこ配置したことから、赤外線ランプ１６の１
〈さが５インナ、１′に半導体ウエノ・１８の直径が４
インチである場合、赤外線ランプ１６を数本並べた５イ
ンチ×５インチの領域では、以前の方法であれば１枚の
半導体ウニ・・４しか処理できないのが１本実施例では
、一度に数枚の半導体ウェハ１９の処ｊＭ（ができ１寸
だ一様に加熱することができた。According to the above embodiment, the semiconductor ueno・1
8 is arranged diagonally, the infrared lamp 16
<The diameter of the inner diameter is 5, and the diameter of the semiconductor wafer 18 is 4 at 1'.
In the case of a 5-inch x 5-inch area where several infrared lamps 16 are lined up, the previous method could process only one semiconductor sea urchin, but in this embodiment, several semiconductor sea urchins could be processed at once. It was possible to uniformly heat one inch of the semiconductor wafer 19.
以下本発明の第２の実施例について図面を参照しながら
説明する。第５図は本発明の第２の実施例を示す赤外線
アニール装置の図である。同図において、赤外線ランプ
２４．ガスの供給口２５と排気口２６を有する石英ガラ
ス角管２７は第３図の構成と同様なものである。第３図
の構成と異なるのは、赤外線ランプ２４の回−りにあっ
て、その赤外線ランプ２４から出た光を垂直面に対して
一定の角１↓Ｅの反射平行光線２８を受けるために反射
鏡２９を水平面に対して傾けである。また、半導体ウェ
ハ３０は、石英ガラス台３１によって一定間陥で水平面
に対して垂直に配置されている。１）こその半導体ウェ
ハ３０の間隔は、反射鏡２９の＃Ｉきと相関関係を有し
、半導体ウェー・３００片側全１ｍＶＣ反射平行Ｍ、線
２８が照射されるようになっている。A second embodiment of the present invention will be described below with reference to the drawings. FIG. 5 is a diagram of an infrared annealing apparatus showing a second embodiment of the present invention. In the figure, an infrared lamp 24. A quartz glass rectangular tube 27 having a gas supply port 25 and a gas exhaust port 26 has the same structure as that shown in FIG. The difference from the configuration shown in FIG. 3 lies in the rotation of the infrared lamp 24, in which the light emitted from the infrared lamp 24 is received by reflected parallel rays 28 at a constant angle 1↓E with respect to the vertical plane. The reflecting mirror 29 is tilted with respect to the horizontal plane. Furthermore, the semiconductor wafer 30 is placed perpendicularly to the horizontal plane with a predetermined recess by the quartz glass stand 31 . 1) The distance between the semiconductor wafers 30 has a correlation with the #I angle of the reflecting mirror 29, so that the semiconductor wafer 300 is irradiated with a 1 m VC reflection parallel M line 28 on one side.
以上の第２の実施例によれば、赤外線ランプ２４の反射
子１１線２８が一定の斜め方向となるように反射鏡２９
を配置することにより、第１の実施例と同様の効果をイ
４４ることかできる。According to the second embodiment described above, the reflector 29 is arranged so that the reflector 11 line 28 of the infrared lamp 24 is in a constant oblique direction.
By arranging , it is possible to obtain the same effect as in the first embodiment.
なお、筆１の実施例においては、半導体ウェハ１８を水
平面に対して何度傾けるかは、反射平行光線２３の性質
より問題としないが、特に反射平行線２３に対して半導
体ウェハ１８が重ならないＪ：うにしなければならない
。In the embodiment of the brush 1, it does not matter how many times the semiconductor wafer 18 is tilted with respect to the horizontal plane due to the nature of the reflected parallel rays 23, but in particular, the semiconductor wafer 18 does not overlap the reflected parallel rays 23. J: I have to do it.
娃だ、第２の実施例では、半導体ウェハ３Ｑの間隔と赤
外線反射鏡２９の角度については、反射Δド行光線２８
を利用していることから、赤外線ランプ２４の反射平行
光線２８が他の半導体ウェハ３Ｑに遮られることなく半
導体ウェハ３０の片側全面に照射できるように設計しな
ければならない。However, in the second embodiment, the distance between the semiconductor wafers 3Q and the angle of the infrared reflecting mirror 29 are set to
, the design must be such that the reflected parallel light rays 28 of the infrared lamps 24 can be irradiated onto the entire surface of one side of the semiconductor wafer 30 without being blocked by other semiconductor wafers 3Q.
址／こ、第１．第２の実施節において、容器２０゜２７
ｉｌ−ｊ：石英角管を使用しだが、容器２０，２７は石
英ガラス丸管を使用してもよい。1. In the second implementation clause, the container 20°27
il-j: A square quartz tube is used, but the containers 20 and 27 may be round quartz glass tubes.
まだ、第１．第２の実施例において、破加熱物は半導体
ウェハ１８，３０としたが、薄板状の物質であれば半導
体ウェハ１ａ、５ｏｖｃｒ恨られたものではないことは
言う壕でもない。Still, the first one. In the second embodiment, the semiconductor wafers 18 and 30 were used as the ruptured objects, but it is no secret that the semiconductor wafers 1a and 5ovcr are acceptable as long as they are thin plate-like materials.
発明の効果
以上のように本発明は、半導体ウェハを赤外線ランプの
反射平行光線に対して、重ならないように斜めに配置す
ること。また半導体ウェハを水平面に対して垂直に立て
、赤外線ランプの反射平行光線が一定の方向に向くよう
に反射鏡を配置する。Effects of the Invention As described above, the present invention is to arrange the semiconductor wafer obliquely with respect to the reflected parallel light beam of the infrared lamp so as not to overlap. Further, the semiconductor wafer is stood perpendicular to the horizontal plane, and a reflecting mirror is arranged so that the reflected parallel light rays of the infrared lamp are directed in a fixed direction.
そしてその反射平行光線が、他の半導体ウェハに遮られ
ることなく半導体ウェハの片側全面を照射することがで
きるように半導体ウェハを、一定間隔づつ離して配置す
ることによシ、半導体ウェハは薄板（０，２インチ）で
あることがら、加熱効率を損なわずに処理枚数を増やす
ことができる。By arranging the semiconductor wafers at regular intervals so that the reflected parallel rays can irradiate the entire surface of one side of the semiconductor wafer without being blocked by other semiconductor wafers, the semiconductor wafer can be made into a thin plate ( 0.2 inch), the number of sheets to be processed can be increased without sacrificing heating efficiency.
第１図は従来の赤外線アニール装置の断面図、第２図は
半導体ウェハを水平面に対して垂直に配置した同赤外線
アニール装置の断面図、第３図は本発明の第１の実施例
における赤外線アニール装置の断面図、第４図は半導体
ウェハを支える石英ガラス台の斜視図、第５図は本発明
の第２の実施例における赤外線アニール装置の断面図で
ある。
１６ 、２４・・・・・・赤外線ランプ、１７．２９・
・・・・・反射鏡、２３．２８・・・・・・反射平行光
線、１８．３０・・・・・半導体ウェハ、１９ 、３１
・・・・・・半導体ウエノ・を支える石英ガラス台、２
０，２γ・・・・・・石英ガラス角管、２１．２５・・
・・・ガスの供給口、２２．２６・・・・・・ガスの排
気口。
代理人の氏名 弁理士 中 尾 敏 男 ほか１名第１
図
＠２図
第３図
第５図FIG. 1 is a cross-sectional view of a conventional infrared annealing device, FIG. 2 is a cross-sectional view of the same infrared annealing device in which a semiconductor wafer is arranged perpendicular to a horizontal plane, and FIG. 3 is a cross-sectional view of the infrared annealing device according to the first embodiment of the present invention. FIG. 4 is a perspective view of a quartz glass stand supporting a semiconductor wafer, and FIG. 5 is a cross-sectional view of an infrared annealing device according to a second embodiment of the present invention. 16, 24... Infrared lamp, 17.29.
...Reflecting mirror, 23.28...Reflected parallel rays, 18.30...Semiconductor wafer, 19, 31
・・・・・・Quartz glass stand supporting semiconductor ueno・2
0.2γ・・・Quartz glass square tube, 21.25・・
...Gas supply port, 22.26...Gas exhaust port. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure @ Figure 2 Figure 3 Figure 5
Claims (3)
外部ＶＣ設けられ゛、前記容器の内部を照射する赤外線
ランプヒーターと、この赤外線ランプから出た光線を平
行光線として反射する反射面をもった反射鏡と、前記容
器内に設けられ、前記反射平行、腺に対して、この反射
平行光線を相互に遮ぎることのない位置関係で複数枚の
薄板状の被加熱物を配ｔｉ１． シ、かつその反射平行
光線が斜めに前記被加熱物をｌｉｄ射するように、前記
被加熱物を配置することができる支持台とから構成され
た赤外線アニール装置。(1) A container made of a material that allows light to pass through, an infrared lamp heater that irradiates the inside of the container, and a reflector that reflects the light rays emitted from the infrared lamp as parallel rays. A reflecting mirror having a surface, and a plurality of thin plate-like objects to be heated, which are provided in the container and arranged in a positional relationship with respect to the reflecting parallel beams and the reflecting parallel beams, so as not to mutually block the reflected parallel rays. ti1. and a support base on which the object to be heated can be placed so that its reflected parallel light rays obliquely illuminate the object to be heated.
垂直に反射し、前記支持台は前記被加熱物を水’Ｆ−（
ｊ１骨こえＪして傾斜配置させた構成からなる特許、１
１″、求の爾囲第１ｆｆ４記載の赤外線アニール装置。(2) The reflecting mirror reflects the reflected parallel rays perpendicularly to the horizontal plane, and the support base moves the object to be heated into water 'F-(
j1 Patent consisting of a configuration in which the bones are placed at an angle, 1
1'', the infrared annealing apparatus described in No. 1ff4 of the request.
して斜めに反射し、前記支持台は前記被加熱物を水平面
に対して垂直に配置させた構成からなる特許請求の範囲
第１項記載の赤外線アニール装置。(3) The reflecting mirror reflects the reflected parallel light obliquely with respect to a horizontal surface, and the support base has a configuration in which the object to be heated is disposed perpendicularly to the horizontal surface. infrared annealing equipment.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58083017A JPH0612774B2 (en) | 1983-05-12 | 1983-05-12 | Infrared annealing equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58083017A JPH0612774B2 (en) | 1983-05-12 | 1983-05-12 | Infrared annealing equipment |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59208717A true JPS59208717A (en) | 1984-11-27 |
| JPH0612774B2 JPH0612774B2 (en) | 1994-02-16 |
Family
ID=13790469
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58083017A Expired - Lifetime JPH0612774B2 (en) | 1983-05-12 | 1983-05-12 | Infrared annealing equipment |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0612774B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02281619A (en) * | 1989-04-21 | 1990-11-19 | Seikosha Co Ltd | Manufacture of insulated gate type transistor |
| KR20160051893A (en) * | 2013-09-06 | 2016-05-11 | 어플라이드 머티어리얼스, 인코포레이티드 | Circular lamp arrays |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5067555A (en) * | 1973-10-15 | 1975-06-06 | ||
| JPS52131454A (en) * | 1976-04-28 | 1977-11-04 | Hitachi Ltd | Thermal treating method of wafer |
-
1983
- 1983-05-12 JP JP58083017A patent/JPH0612774B2/en not_active Expired - Lifetime
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5067555A (en) * | 1973-10-15 | 1975-06-06 | ||
| JPS52131454A (en) * | 1976-04-28 | 1977-11-04 | Hitachi Ltd | Thermal treating method of wafer |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02281619A (en) * | 1989-04-21 | 1990-11-19 | Seikosha Co Ltd | Manufacture of insulated gate type transistor |
| KR20160051893A (en) * | 2013-09-06 | 2016-05-11 | 어플라이드 머티어리얼스, 인코포레이티드 | Circular lamp arrays |
| KR20210030489A (en) * | 2013-09-06 | 2021-03-17 | 어플라이드 머티어리얼스, 인코포레이티드 | Circular lamp arrays |
| US11337277B2 (en) | 2013-09-06 | 2022-05-17 | Applied Materials, Inc. | Circular lamp arrays |
| KR20220120708A (en) * | 2013-09-06 | 2022-08-30 | 어플라이드 머티어리얼스, 인코포레이티드 | Circular lamp arrays |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0612774B2 (en) | 1994-02-16 |
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