JPS59208652A - Digital control device - Google Patents

Abstract

PURPOSE:To prevent abnormality generated due to the backup operation of a CPU by forming a cicuit making a waiting system CPU track to a process value when the control output value of a main system CPU is different from that of the waiting system CPU. CONSTITUTION:A control output comparing program formed in addition to ordinary software checks the existence of a difference between an operation output from the main system CPU3 or 4 and an operation output arithmetic value operated at the waiting system CPU4 or 3. When the difference exists, the waiting system CPU4 or 3 outputs an alarm to the external, makes the self-memory contents track to a process value inputted from a process I/O unit 5 and bypasses the receiving data entry processing of a computer coupling device 9. When there is a difference between the outputs of the main and waiting CPUs, the abnormality generated due to the backup of the CPU can be prevented by making the waiting system CPU track to the process value.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a digital control device having a main system and a standby system that are switchably operated in parallel.

Conventionally, there has been a device of this type as shown in FIG.

In the figure, 1 is a control device, and 2 is a process controlled by this control device 1.

The control device 1 interconnects central processing units (hereinafter referred to as CPUs) 31 and 4, process input/output unit (hereinafter referred to as PIO) 5, and two CPUs 3.4 and PIO 5, each functioning as a main system or a standby system. Input/output (I
lo) It is composed of a bus 6 and a dual system switching circuit 7.

The dual system switching circuit 7 inputs the emergency relay outputs A and B from the CPU 3.4, and also receives the CPU switching command P.
Supplied to IO5.

Although the CPU 3.4 functions as a main system or a standby system, it is composed of the same hardware, that is, an arithmetic processing unit 8, a computer coupling device 9, and a bus driver 10.

The computer coupling device 9 (hereinafter referred to as CLA 5) is connected to the CLA 9 of the other CPU 3, and the bus driver 10 is
10 bus 6.

The PIO 5 is composed of a path receiver 11 and a process input/output device 12. The path receiver 11 is connected to the I10 bus 6, and the process input/output device 12 is connected to the processes 2 and 2.
Connected to heavy system switching circuit I.

The CPU 3.4 performs predetermined process control calculations based on the process input/output values inputted from the PIO 5 and the output state of the dual system switching circuit 7, and outputs the results to the PIO 5.

I10/(bus 6 simultaneously supports two or more bus drivers 10,
Since the CPtJ3.4 has multi-port capability to connect the path receiver 11, any CPtJ3.4 can freely access the PIO5 for input/output.

The dual system switching circuit 7 inputs the emergency relay outputs A and B of the CPUs 3 and 4, and outputs a control command for operating as a main system and a standby command for operating as a standby system to PIO 5. It has a configuration that The CPUs 3 and 4 can read the output signals of these dual system switching circuits 7 via the PIO 5.

CPU 3.4 has the same software configuration, the flowchart of which is shown in FIG. This software includes an operating system 20, a control program 21 and a CLA
It consists of a receiving task 22.

The control task 21 is an operating system (hereinafter referred to as O
8) 20 at regular intervals at predetermined control cycles, and performs PIO input processing and control calculation processing. Furthermore, when the dual system switching circuit I is outputting a control command to the CPU 3 or 4 of its own system, that is, when it is being controlled as the main system, PIO output processing and control data CL
Perform A transmission processing. On the other hand, CPU3 of the own system is used as a standby system.
Or when a standby command is output for 4, PIO
Output processing and control data transmission processing are bypassed, and only CLA reception data acquisition processing is performed.

The CLA reception task 22 is activated by a CLA input interrupt that occurs when control data is transmitted from the CPU 3 or 4 of another system.

Next, the dual system switching circuit 7 issues a control command to the CPU 3.
The operation when a standby command is output to the CPU 4 will be explained. At this time, in the CPU 3, the control-in-progress 7 lag shown in FIG.
The standby flag is 'YES'. Therefore, the CPU
3, PIO input processing, control calculation processing, PIO output processing, and control data CLA transmission processing are executed. That is, C
The PU 3 controls the process 2 and transfers and outputs all control calculation data (PIO input value, logical intermediate value, analog intermediate value, and PIO output value) to the CPU 4 via the CLA 9.

On the other hand, in the CPU 4, as the CPU 3 executes the control data CLA transmission process, a CLA input interrupt is generated, a CLA reception task is activated, and the control calculation data from the CPU 3 is stored in the CLA reception data buffer area. The control task of the CPU 4 also executes PIO input processing and control calculation processing, but after execution, CLA reception data acquisition processing is performed. CLA reception data import processing is done by CL.
This is a process of importing the contents of the A reception data buffer area into the control calculation data area, and by executing this process, the control calculation data held by the CPU 4 becomes the same as that of the CPU 3. Therefore, even if the CPU 3 goes down, the CPU 4 can back up control without bumping as long as there is no difference in data between the two.

The emergency relay outputs A and B of each CPU 3 and 4 are energized when an error is detected by the self-diagnosis function, such as occurrence of a memory parity error, illegal instruction, or watchdog timer overflow. The dual system switching circuit 7
The necessity of outputting a control command and a standby command to the CPU 3.4 is determined from the states of the emergency relay outputs A and H of U3.4, and their correspondence is shown in the following table.

Since the conventional control device is configured as described above,
Due to some abnormality occurring in one or both of the two CPUs, the standby CPU uses the calculation results of the main CPU and the calculation value data from the main CPU.
Even if there is a difference between the calculation results of U, if there is a CPU switching command, the CPU will be switched unconditionally, which has the disadvantage of having an undesirable effect on the process.

This invention was made in order to eliminate the drawbacks of the conventional ones as described above, and it is possible to combine the control output value that the main CPU outputs to the standby CPU and the control calculation result obtained by its own calculation. If there is a difference between the two, an alarm is issued to the outside, the operation of tracking the calculation data sent from the main CPU is interrupted, and the internal calculation data is input from the PIO. The purpose of the present invention is to provide a digital control device that can prevent undesirable shocks from being caused to the controlled process in terms of process control due to the above-mentioned differences when switching CPUs by having a function of tracking values. It is said that

Hereinafter, one embodiment of the present invention will be described with reference to the drawings. The hardware configuration of the device of this invention is the same as the conventional one shown in FIG. The software configuration of this invention device is shown in the flowchart of FIG.

In FIG. 3, compared to the conventional one shown in FIG. 2, a control output comparison program has been added.

The control output comparison program compares the operation output such as the valve opening setting value output from the main system CPU 3 or 4 and the main system CPU.
Based on the control data transferred from CPU 3 or 4 and the process input value, the presence or absence of a difference between the operation output calculation value calculated by standby CPU 4 or 3 is checked. If this exists, the standby CPU 4 or 3 outputs an alarm to the outside, tracks its own memory contents to the process value input from the PIO 5, and bypasses the CLA reception data acquisition process.

Hardware operations such as the dual system switching circuit 7 and PIO 5 are the same as before. Also, regarding the software configuration, OS
20, control task 21, and CLA input Kataka task 22 The configurations are the same as those of the prior art, but the operation of the software will be explained below using an example of the invention.

The main CPU 3 or 4 executes PIO input processing, control calculation processing, PIO output processing, and control data CLA transmission processing. In other words, main CPU 3 or 4 is process 2.
It also transfers and outputs control data to the standby CPU 4 or 3 via the CLi2.

On the other hand, in the standby system CPU 4 or 3, a CLA reception task is started and the control calculation data from the main system CPU 3 or 4 is sent to the CLA reception task.
Store in LA reception buffer area.

PIO is also performed by the control task in standby CPU 4 or 3.
Input processing and control calculation processing are executed, and although PIO output is not actually performed, control output values such as valve operation signals are calculated. Since the standby system CPU 4 or 30 control calculation is performed based on the PIO input value and the control calculation data from the main system CPU 4 or 3, the standby system CPU 4 or 3 no.
As long as the hardware and software are normal, the calculated control output value will be approximately the same as the value of the main CPU 4 or 3. Also, the CPU ensures that these values are always the same.
This is a necessary condition for seamlessly switching from 4 to 3 or vice versa.

The control output comparison program is executed only on the standby system CPt14 or 3, and compares the PIO output value from the main system CPU3 or 4 read through the I10 node 6 with the standby system CP
The presence or absence of a difference between the control output calculation value in U4 or 3 is checked, and if there is, the memory contents of the standby CPU 4 or 3 are tracked to the input process value, and the CLA reception data is also tracked to the input process value. Command the import processing (Innox).

In the tracking operation for process 2, internal memory data is tracked to the backward calculation value for quantities that can be calculated backwards, and data that cannot be calculated backwards is tracked to turn data given in advance.

As described above, according to the present invention, it is checked whether there is a difference between the control output value from the main CPU and the control output calculation value of the standby CPU, and if there is a difference, the standby CPU is Since it is equipped with a circuit that tracks process values, the CPU
This has the effect of preventing abnormalities that occur with backup operations and providing highly reliable control.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of the digital control device, Fig. 2 is a flowchart showing the operation of the device shown in Fig. 1, Fig. 3 is a diagram showing input/output signals of the dual system switching circuit, and Fig. 4 is a diagram showing the operation of the device shown in Fig. 1. 3 is a flowchart showing the operation of an apparatus according to an embodiment of the invention. 2.--Process, 3.4--Central processing unit (C
PU), 5-・PIO16...-I10 bus, 7...
Dual system switching circuit, 8... Arithmetic processing unit, 9... Computer coupling device (CLA), 10... Bus driver, 11
...pass receiver. Note that the same reference numerals in the figures indicate the same or equivalent parts. Rate l Figure 3 Figure-307

Claims (1)

[Claims] The first system has the same process control function and is operated in parallel to control the process as the main system and standby system, respectively, and is switched from the main system to the standby system or vice versa in response to receiving a switching command. and a second central processing unit, and when an abnormality detection signal is received from the first or second central processing unit, the first and second central processing units are switched from the main system to the standby system or vice versa. In the digital control device, the first and second central processing units are connected to the main system related to the process control function from the main system when the first and second central processing units are in the standby system. It is characterized by having a function of receiving data, comparing this main system data with standby system data corresponding to this main system data, and tracking the process value of the above process when a difference is detected between the two. digital control device.