JPS59202632A - フオトマスク - Google Patents

フオトマスク

Info

Publication number
JPS59202632A
JPS59202632A JP58076772A JP7677283A JPS59202632A JP S59202632 A JPS59202632 A JP S59202632A JP 58076772 A JP58076772 A JP 58076772A JP 7677283 A JP7677283 A JP 7677283A JP S59202632 A JPS59202632 A JP S59202632A
Authority
JP
Japan
Prior art keywords
pattern
photomask
mark
alignment
shape
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58076772A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6320013B2 (cs
Inventor
Takayuki Konuma
小沼　孝行
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Corporate Research and Development Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Corporate Research and Development Ltd filed Critical Fuji Electric Corporate Research and Development Ltd
Priority to JP58076772A priority Critical patent/JPS59202632A/ja
Publication of JPS59202632A publication Critical patent/JPS59202632A/ja
Publication of JPS6320013B2 publication Critical patent/JPS6320013B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
JP58076772A 1983-04-30 1983-04-30 フオトマスク Granted JPS59202632A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58076772A JPS59202632A (ja) 1983-04-30 1983-04-30 フオトマスク

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58076772A JPS59202632A (ja) 1983-04-30 1983-04-30 フオトマスク

Publications (2)

Publication Number Publication Date
JPS59202632A true JPS59202632A (ja) 1984-11-16
JPS6320013B2 JPS6320013B2 (cs) 1988-04-26

Family

ID=13614872

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58076772A Granted JPS59202632A (ja) 1983-04-30 1983-04-30 フオトマスク

Country Status (1)

Country Link
JP (1) JPS59202632A (cs)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4902899A (en) * 1987-06-01 1990-02-20 International Business Machines Corporation Lithographic process having improved image quality
JPH04330710A (ja) * 1990-03-12 1992-11-18 Fujitsu Ltd レーザトリミング用位置合わせマーク、半導体装置、及び半導体装置の製造方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4902899A (en) * 1987-06-01 1990-02-20 International Business Machines Corporation Lithographic process having improved image quality
JPH04330710A (ja) * 1990-03-12 1992-11-18 Fujitsu Ltd レーザトリミング用位置合わせマーク、半導体装置、及び半導体装置の製造方法

Also Published As

Publication number Publication date
JPS6320013B2 (cs) 1988-04-26

Similar Documents

Publication Publication Date Title
US6300018B1 (en) Photolithography mask having a subresolution alignment mark window
JPS5968928A (ja) 半導体装置の製造方法
JPS59202632A (ja) フオトマスク
CN101231459A (zh) 光刻工艺监测标记用光掩模图案及其应用
JPS6223862B2 (cs)
JPH0473651A (ja) 位相シフトマスクの形成方法
CN110865520B (zh) 光刻方法
JPS588132B2 (ja) 集積回路製造方法
JPS6324617A (ja) ウエハの両面露光法
JPS63275115A (ja) 半導体装置のパタ−ン形成方法
US6258490B1 (en) Transmission control mask utilized to reduce foreshortening effects
KR0119920B1 (ko) 노광기 해상도 측정용 포토마스크
KR100685597B1 (ko) 반도체소자의 측정마크 및 그 형성방법
KR20000006852A (ko) 쉐도우 마스크를 이용한 웨이퍼상에 금속 패턴을 형성하는방법
KR20020091990A (ko) 리소그래피 공정에서의 근접효과 제거 방법
JPH0766113A (ja) レチクル及び位置合わせ用バーニアの形成方法
JPS6215854B2 (cs)
JPS6244740A (ja) パタ−ン形成方法
JPS60194457A (ja) ホトマスク
KR20040006323A (ko) 레티클 제작 방법
JPS62193249A (ja) 半導体装置の製造方法
JPH05165195A (ja) ガラスマスク並びに該ガラスマスクを使用した半導体装置の製造方法
JPS61117832A (ja) 半導体装置の製造方法
JPH06148864A (ja) 位相シフトマスクおよびその製造方法
JPS5932893B2 (ja) 特殊基準マ−クを用いたマスクのアライメント方法