JPS59189461A - 記憶装置制御方式 - Google Patents

記憶装置制御方式

Info

Publication number
JPS59189461A
JPS59189461A JP6473283A JP6473283A JPS59189461A JP S59189461 A JPS59189461 A JP S59189461A JP 6473283 A JP6473283 A JP 6473283A JP 6473283 A JP6473283 A JP 6473283A JP S59189461 A JPS59189461 A JP S59189461A
Authority
JP
Japan
Prior art keywords
memory
storage
divided
storage device
selection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6473283A
Other languages
English (en)
Japanese (ja)
Other versions
JPH036536B2 (enExample
Inventor
Shuji Ito
修二 伊藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP6473283A priority Critical patent/JPS59189461A/ja
Publication of JPS59189461A publication Critical patent/JPS59189461A/ja
Publication of JPH036536B2 publication Critical patent/JPH036536B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
JP6473283A 1983-04-13 1983-04-13 記憶装置制御方式 Granted JPS59189461A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6473283A JPS59189461A (ja) 1983-04-13 1983-04-13 記憶装置制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6473283A JPS59189461A (ja) 1983-04-13 1983-04-13 記憶装置制御方式

Publications (2)

Publication Number Publication Date
JPS59189461A true JPS59189461A (ja) 1984-10-27
JPH036536B2 JPH036536B2 (enExample) 1991-01-30

Family

ID=13266613

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6473283A Granted JPS59189461A (ja) 1983-04-13 1983-04-13 記憶装置制御方式

Country Status (1)

Country Link
JP (1) JPS59189461A (enExample)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS501853A (enExample) * 1973-05-11 1975-01-09
JPS53136930A (en) * 1977-05-06 1978-11-29 Fujitsu Ltd System structure connection control system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS501853A (enExample) * 1973-05-11 1975-01-09
JPS53136930A (en) * 1977-05-06 1978-11-29 Fujitsu Ltd System structure connection control system

Also Published As

Publication number Publication date
JPH036536B2 (enExample) 1991-01-30

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