JPS59186898U - Electronic sound generation circuit - Google Patents
Electronic sound generation circuitInfo
- Publication number
- JPS59186898U JPS59186898U JP8148483U JP8148483U JPS59186898U JP S59186898 U JPS59186898 U JP S59186898U JP 8148483 U JP8148483 U JP 8148483U JP 8148483 U JP8148483 U JP 8148483U JP S59186898 U JPS59186898 U JP S59186898U
- Authority
- JP
- Japan
- Prior art keywords
- converter
- melody
- rom
- data
- generation circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Electromechanical Clocks (AREA)
- Analogue/Digital Conversion (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来のエンベローズ付加方式による装置の一例
を示す図、第２図は第１図に示すエンベロープ発生回路
の従来例を示す図、第３図は本考案の一実施例を電子時
計の時打音に応用した図、第４図は第３図に示す電圧ラ
ダーと電流ラダーとを組合わせたときの等価回路、第５
図は第３図に示す抵抗セレクク回路と電流ラダーとを組
合わせたときの等価回路である。 −
１４・・・メロディ波形ＲＯＭ、１６・・・メロディア
ドレスカウンタ、１８・・・メロディ音量ＲＯＭ１２０
・・・エンベロープアドレスカウンタ、２２・・・ゲー
ト回路、２４・・・電圧分圧ラダー抵抗型ＤＡコンバー
タ、２６・・・分圧抵抗選択型ＤＡコンバータ、３０・
・・スイッチ、３２・・・電流加算ラダー抵抗型ＤＡコ
ンバータ。FIG. 1 is a diagram showing an example of a device using a conventional envelope addition method, FIG. 2 is a diagram showing a conventional example of the envelope generating circuit shown in FIG. 1, and FIG. Fig. 4 is an equivalent circuit when the voltage ladder and current ladder shown in Fig. 3 are combined, and Fig. 5 is a diagram applied to the striking sound.
The figure shows an equivalent circuit when the resistor selector circuit shown in FIG. 3 and the current ladder are combined. - 14... Melody waveform ROM, 16... Melody address counter, 18... Melody volume ROM 120
Envelope address counter, 22... Gate circuit, 24... Voltage division ladder resistance type DA converter, 26... Voltage division resistance selection type DA converter, 30.
...Switch, 32...Current addition ladder resistance type DA converter.
Claims (1)
ロディ波形ＲＯＭと、 メロディの音量データがディジタル信号で記憶されたメ
ロディ音量ＲＯＭと、 両ＲＯＭからデータを読み出すためのアドレスカウンタ
と、 メロディ音量ＲＯＭからのデータをアナログ信号に変換
する第１のＤＡコンバータと、第１のＤＡコンバータか
らの信号を基準入力として、メロディ波形ＲＯＭからの
データをアナログ信号に変換する第２のＤＡコンバータ
と、第２のＤＡコンバータの出力により音を発生する発
音回路と、 を有する電子音発生回路において： 第１のＤＡコンバータは、出力抵抗の一定な電圧分圧ラ
ダー抵抗型ＤＡコンバータと、縦列接続された複数個の
電圧分圧用抵抗を有しそのうち少なくとも１つの抵抗を
選択する分圧抵抗選択型ＤＡコンバータと、前記メロデ
ィ音量ＲＯＭからの出力によって両ｐＡコンバータの出
力のいずれか１つを選択するゲート回路とから構成され
、第２のＤＡコンバー′夕は入力抵構の一定な電流加算
ラダー抵誉型ＤＡコンバータで構成されたことを特徴と
する電子音発生回路。[Scope of claim for utility model registration] □A melody waveform ROM in which melody waveform data is stored as a digital signal, a melody volume ROM in which melody volume data is stored in a digital signal, and an address counter for reading data from both ROMs. a first DA converter that converts data from the melody volume ROM into an analog signal; and a second DA converter that converts data from the melody waveform ROM into an analog signal using the signal from the first DA converter as a reference input. In an electronic sound generation circuit comprising: a converter; and a sound generation circuit that generates sound by the output of a second DA converter: The first DA converter is connected in series with a voltage division ladder resistance type DA converter having a constant output resistance. A voltage dividing resistor selection type DA converter having a plurality of connected voltage dividing resistors and selecting at least one of the resistors, and selecting one of the outputs of both pA converters based on the output from the melody volume ROM. 1. An electronic sound generating circuit characterized in that the second DA converter is composed of a current addition ladder function type DA converter with a constant input resistance.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8148483U JPS59186898U (en) | 1983-05-30 | 1983-05-30 | Electronic sound generation circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8148483U JPS59186898U (en) | 1983-05-30 | 1983-05-30 | Electronic sound generation circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59186898U true JPS59186898U (en) | 1984-12-11 |
| JPH0443920Y2 JPH0443920Y2 (en) | 1992-10-16 |
Family
ID=30211450
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8148483U Granted JPS59186898U (en) | 1983-05-30 | 1983-05-30 | Electronic sound generation circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59186898U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01238226A (en) * | 1988-01-21 | 1989-09-22 | Advanced Micro Devicds Inc | Digital-analog converter network |
-
1983
- 1983-05-30 JP JP8148483U patent/JPS59186898U/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01238226A (en) * | 1988-01-21 | 1989-09-22 | Advanced Micro Devicds Inc | Digital-analog converter network |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0443920Y2 (en) | 1992-10-16 |
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