JPS5978758U

JPS5978758U - Multiple frequency switching device

Info

Publication number: JPS5978758U
Application number: JP17533482U
Authority: JP
Inventors: 山口　敬二
Original assignee: 株式会社富士通ゼネラル
Priority date: 1982-11-19
Filing date: 1982-11-19
Publication date: 1984-05-28

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of drawings]

第１図は従来の方法による切換接続点の波形図、第２図
は本考案による装置の一実施例を示すブロック図、第３
図ａは切換データの波形図、第３図すは本考案の装置に
よる出力波形図である。１・・・発振器、２・・・プログラマブルカウンタ、３
ｏ、３□、３゜、３３・・・分周データ入力ポート、４
・・・データ入力端子、５・・・バイナリカウンタ、６
・・・リセット得御入力端子、７・・・リセット回路、
８゜９・・・デコーダ、１０・・・インバータ、１１□
〜ｌｌｎ・・・重み抵抗、１２・・・出力端子、１３・
・・分圧抵抗、１４・・・Ｄ／Ａ変換回路。FIG. 1 is a waveform diagram of a switching connection point according to the conventional method, FIG. 2 is a block diagram showing an embodiment of the device according to the present invention, and FIG.
Figure a is a waveform diagram of switching data, and Figure 3 is an output waveform diagram of the device of the present invention. 1... Oscillator, 2... Programmable counter, 3
o, 3□, 3°, 33... Frequency division data input port, 4
...Data input terminal, 5...Binary counter, 6
... Reset control input terminal, 7... Reset circuit,
8゜9...Decoder, 10...Inverter, 11□
~lln... Weight resistance, 12... Output terminal, 13.
...Voltage dividing resistor, 14...D/A conversion circuit.

Claims

[Scope of utility model registration request]

(1) An oscillator that oscillates at a common multiple of multiple frequencies to be determined, a programmable counter that divides the oscillation frequency of the oscillator according to input frequency division ratio data, and converts the digital output of the programmable counter into an analog value. A multi-frequency switching device comprising a digital/analog conversion circuit that outputs a digital signal.

(2) Utility Model Registration Scope of Claim 1 The programmable counter is a multi-frequency switching device in which the frequency division ratio is switched between mark data "1" and space data "0".

(3) Scope of Utility Model Registration Claim 1, the digital/analog conversion circuit converts the output of the programmable counter into a binary number with a binary counter, converts it into a decimal number with a decoder, and further converts the output of the programmable counter into a binary number with a decoder. A multi-frequency switching device that converts the waveform into a stepped analog waveform using a weighted resistor coupled to the waveform.

(4) In the statement in paragraph 1 of the claims for utility model registration,
, - A switching device for multiple frequencies, in which a start signal of frequency-divided data is applied as a reset signal to a binary counter.