JPS6189897U - - Google Patents
Info
- Publication number
- JPS6189897U JPS6189897U JP17479984U JP17479984U JPS6189897U JP S6189897 U JPS6189897 U JP S6189897U JP 17479984 U JP17479984 U JP 17479984U JP 17479984 U JP17479984 U JP 17479984U JP S6189897 U JPS6189897 U JP S6189897U
- Authority
- JP
- Japan
- Prior art keywords
- digital data
- power
- envelope
- generation circuit
- supplied
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
- 238000005070 sampling Methods 0.000 description 1
Description
第１図は本考案の一実施例のブロツク系統図、
第２炊は従来回路の一例のブロツク系統図、第３
図は第１図、第２図夫々に示す回路の出力するエ
ンベロープ波形の一実施例を示す図である。
１…ＣＰＵ、３…マルチプレクサ、４ａ〜４ｎ
…サンプリングホールド回路、５ａ〜５ｎ，１３
…端子、１０…二乗回路、１１，１２…Ｄ／Ａ変
換器。
FIG. 1 is a block system diagram of an embodiment of the present invention.
The second section is a block system diagram of an example of a conventional circuit, and the third section is a block system diagram of an example of a conventional circuit.
This figure shows an example of envelope waveforms output from the circuits shown in FIGS. 1 and 2, respectively. 1...CPU, 3...Multiplexer, 4a to 4n
...Sampling hold circuit, 5a to 5n, 13
...terminal, 10...square circuit, 11, 12...D/A converter.
Claims (1)
アナログ値に変換してエンベロープ波形を生成す
るエンベロープ発生回路において、該デイジタル
データ又は該アナログ値を累乗する累乗回路を設
けてなり、該供給されるデイジタルデータの累乗
値に比例したレベルのエンベロープ波形を生成す
るエンベロープ発生回路。 An envelope generation circuit that sequentially converts digital data supplied in time series into analog values to generate an envelope waveform, is provided with a power circuit that raises the digital data or the analog value to a power, and converts the supplied digital data into analog values. An envelope generation circuit that generates an envelope waveform with a level proportional to the power of .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17479984U JPS6189897U (en) | 1984-11-17 | 1984-11-17 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17479984U JPS6189897U (en) | 1984-11-17 | 1984-11-17 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6189897U true JPS6189897U (en) | 1986-06-11 |
Family
ID=30732410
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17479984U Pending JPS6189897U (en) | 1984-11-17 | 1984-11-17 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6189897U (en) |
-
1984
- 1984-11-17 JP JP17479984U patent/JPS6189897U/ja active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS6189897U (en) | ||
| JPS6130868U (en) | Wave height measuring device | |
| JPS6356826U (en) | ||
| JPS639644U (en) | ||
| JPS5999541U (en) | A/D conversion device | |
| JPH0263127U (en) | ||
| JPS63122268U (en) | ||
| JPS61107236U (en) | ||
| JPS60167441U (en) | Digital-analog conversion circuit | |
| JPS63106230U (en) | ||
| JPS6454428U (en) | ||
| JPS6150336U (en) | ||
| JPH0213331U (en) | ||
| JPS6344165U (en) | ||
| JPH0163224U (en) | ||
| JPS58119241U (en) | A/D conversion circuit | |
| JPS60148657U (en) | Analog multiplier for satellite installation | |
| JPS6384574U (en) | ||
| JPS6331625U (en) | ||
| JPS62150640U (en) | ||
| JPS63173295U (en) | ||
| JPS6293830U (en) | ||
| JPH0174637U (en) | ||
| JPS60132016U (en) | digital sine wave generator | |
| JPH0434009U (en) |