JPS59181025A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS59181025A JPS59181025A JP58053525A JP5352583A JPS59181025A JP S59181025 A JPS59181025 A JP S59181025A JP 58053525 A JP58053525 A JP 58053525A JP 5352583 A JP5352583 A JP 5352583A JP S59181025 A JPS59181025 A JP S59181025A
- Authority
- JP
- Japan
- Prior art keywords
- pellet
- semiconductor
- island
- lead
- lead frame
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49503—Lead-frames or other flat leads characterised by the die pad
- H01L23/49506—Lead-frames or other flat leads characterised by the die pad an insulative substrate being used as a diepad, e.g. ceramic, plastic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
- H01L2224/9222—Sequential connecting processes
- H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Ceramic Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Die Bonding (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の技術分野〕
この発明は半導体ペレットとリードフレームとの固定手
段の改善された半導体装置に関する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a semiconductor device with improved means for fixing a semiconductor pellet and a lead frame.
従来よシ各種の半導体装置において最も一般的な組み立
て工程は次のような手順によシ行なｊ われる。す
なわち第１図に示すように、金属板等を打ち抜き形成し
た素子基台となるアイランド１ａを有するリードフレー
ムＪを用意し、このリードフレームＬのアイランド１ａ
上に、例えば導電性のエポキ・ン樹脂やポリイミド樹脂
或いは金シリサイド等の硬質ろう材或いは半田等の軟質
ろう材等の導電性マウント剤２を用いて半導体４レツト
３を固定（マウント）する。続いて、第２図に示すよう
にポンディングワイヤ４を用いてペレットとリードフレ
ームムのインナーリード部１ｂとを接続する。ここで、
上記ベレット３は通常２００〜４００μｍ程度であり、
さらに、マウント剤２の厚さが１０〜３０μｍ程度あシ
、ペレット３上面がインナーリード部１ｂの上面よりも
かなシ高く彦るため、プンディングワイヤ４が半導体ベ
レット３やベレット３の基台のアイランド１ａに触れや
すい。従って、通常ワイヤボンディング工程の前（通常
リードフレームの形成する際）にアイランド１８部分の
みを押し下げるいわゆるアイランドダウン工程が行なわ
れる。Conventionally, the most common assembly process for various semiconductor devices is performed according to the following procedure. That is, as shown in FIG. 1, a lead frame J having an island 1a which is formed by punching out a metal plate or the like and serves as an element base is prepared, and the island 1a of this lead frame L is
A semiconductor 4let 3 is fixed (mounted) thereon using a conductive mounting agent 2 such as a conductive epoxy resin, polyimide resin, a hard brazing material such as gold silicide, or a soft brazing material such as solder. Subsequently, as shown in FIG. 2, the pellet and the inner lead portion 1b of the lead frame are connected using a bonding wire 4. here,
The above-mentioned pellet 3 is usually about 200 to 400 μm,
Furthermore, since the mounting agent 2 has a thickness of about 10 to 30 μm and the upper surface of the pellet 3 is slightly higher than the upper surface of the inner lead part 1b, the pushing wire 4 is attached to the semiconductor pellet 3 or the base of the pellet 3. Easy to touch island 1a. Therefore, before the wire bonding process (usually when forming a lead frame), a so-called island down process is performed to push down only the island 18 portion.
次いで、例えば一般的な樹脂封止型の装置ではモールド
樹脂５で封止することにょシ、半導体ペレット３および
そのボンディング部を外囲器内に収納する。Next, for example, in a typical resin-sealed device, the semiconductor pellet 3 and its bonding portion are sealed with a molding resin 5 and housed in an envelope.
上記のようなマウント剤２によりアイランド部１ａに半
導体ペレット３をマウントする装置においては次のよう
な欠点があった。The apparatus for mounting the semiconductor pellet 3 on the island portion 1a using the mounting agent 2 as described above had the following drawbacks.
■ アイランド部１＆にマウント剤２で半導体ペレット
３をマウントする際に、マウント剤２がベレット３の裏
面に均一に塗布されていないと、特に大型のベレットで
は外囲器の歪や温度変化等の影響によシイレット３ヘク
ラツクが入シやすくなり信頼性が低いものである。実際
には、ベレット３を接着する際にマウント剤２中に？イ
ド（気泡）が入ることが多く均一な接着を行なうことは
難しい。■ When mounting the semiconductor pellet 3 on the island part 1 with mounting agent 2, if the mounting agent 2 is not evenly applied to the back surface of the pellet 3, distortion of the envelope and temperature changes may occur, especially with large pellets. Due to the influence, the sealet 3 is likely to crack, resulting in low reliability. Actually, when gluing Beret 3, do you use mounting agent 2? It is difficult to achieve uniform adhesion because air bubbles often enter.
■ アイランド部１ａ（通常厚さは２５０μｍ程度）お
よびマウント剤２の厚みがかなり厚く、ノソツケージの
小型化を阻害する。(2) The thickness of the island portion 1a (usually about 250 μm) and the mounting agent 2 are quite thick, which hinders miniaturization of the cage.
■ さらに前述したようにベレット３を含むアイランド
部１ａの厚みが厚いため、ワイヤはンディング工程にお
いてアイランドダウン工程を必要とし、工程が煩雑であ
る。(2) Furthermore, as mentioned above, since the thickness of the island portion 1a including the pellet 3 is thick, the wire requires an island down process in the winding process, which makes the process complicated.
■ アイランド部１ａとシリコンから外る半導体ペレッ
ト３との間の線膨張係数差に起因したクラックがベレッ
ト３に入シやすい。(2) Cracks are likely to enter the pellet 3 due to the difference in coefficient of linear expansion between the island portion 1a and the semiconductor pellet 3 that comes off from the silicon.
■ ベレット３の裏面は、アイランド部１ａに接着され
てしまうため、本質的に一電極としてしか利用できず例
えば能動素子領域などとして利用することができない。(2) Since the back surface of the pellet 3 is bonded to the island portion 1a, it can essentially only be used as one electrode and cannot be used as, for example, an active element region.
■ 従来の素子におけるワイヤデンディング工程では、
ベレット３をアイランド部１１Ｌに接着した後、接着強
度が一定以上に達するまではワイヤボンディング工程を
行なうことができず、非能率的である〇
〔発明の目的〕
この発明は上記のよう力点に鑑みなされたもので、ノ千
ツケージの小型化、マクント工程および？ンディング工
程等の組立工程の簡素化、信頼性の向上を実現でき、ベ
レットの裏面も能動素子などを形成して利用可能な半導
体装置を提供することを目的とする。■ In the wire ending process for conventional devices,
After bonding the pellet 3 to the island portion 11L, the wire bonding process cannot be performed until the bonding strength reaches a certain level, which is inefficient. What has been done, the miniaturization of the cage, the Makunto process and what? The present invention aims to provide a semiconductor device that can simplify the assembly process such as the bonding process and improve reliability, and can also be used by forming active elements on the back side of the pellet.
すなわちこの発明に係る半導体装置では、アイランド部
の設けられていないリードフレームを用意し、半導体（
レットの周囲の離間した位置にインナーリード部の先端
がくるように配置した状態で、上記半導体ペレットの側
面と、インナーリード部の先端側面とが接着固定される
ように例えば樹脂材などの接着剤を用いて支持体を形成
した後、？ンディングワイヤなどによりリードフレーム
の所定のものと半導体にレットとの電気的接続を行ない
さらに例えば樹脂モールド工程などの外囲器の形成を行
なうようにするもので、リードフレームのアイランド部
を用いずに半導体ペレットを固定するため、素子の小型
化、製造工程の簡素化、波レットクラックの抑制などを
実現できるものである。That is, in the semiconductor device according to the present invention, a lead frame without an island portion is prepared, and a semiconductor (
With the tips of the inner lead parts placed at separate positions around the semiconductor pellet, an adhesive such as a resin material is applied so that the side surface of the semiconductor pellet and the side surface of the tip of the inner lead part are adhesively fixed. After forming the support using ? This method is used to electrically connect a predetermined part of the lead frame to a semiconductor let using a binding wire, and then to form an envelope using a resin molding process, without using the island part of the lead frame. Since the semiconductor pellet is fixed, it is possible to reduce the size of the device, simplify the manufacturing process, and suppress wavelet cracks.
以下図面を参照してこの発明の一実施例につき説明する
。An embodiment of the present invention will be described below with reference to the drawings.
まず第３図に示すように、がンデインダステージ１０（
がンディング工程用の基台）の穴部１１上に半導体ペレ
ット３を位置決めして載せ、穴部１１側を陰圧に設定し
半導体ペレット３を固定（いわゆるバキュームチャック
）する。First, as shown in FIG.
The semiconductor pellet 3 is positioned and placed on the hole 11 of a base for the bonding process, and the hole 11 side is set to negative pressure to fix the semiconductor pellet 3 (so-called vacuum chuck).
次いでアイランド部の存在しない他は全〈従来と同様の
リードフレームＪを搬送して位置決メジ、上記デンディ
ングステージ１０上に載置する。 −
続いて、予め、リードフレーム１のインナーリード１ｂ
の先端部側面１ｃと半導体ベレット３の側面３ａとの間
にはまるように枠状に型成された熱硬化性樹脂片を、イ
ンナーリード１ｂとペレット３との間にはめ込む。Next, the entire lead frame J, which is the same as the conventional lead frame J except for the absence of the island portion, is transported, positioned, and placed on the above-mentioned leading stage 10. - Next, in advance, the inner lead 1b of the lead frame 1
A frame-shaped piece of thermosetting resin is fitted between the inner lead 1b and the pellet 3 so as to fit between the side surface 1c of the tip end thereof and the side surface 3a of the semiconductor pellet 3.
しかる後（ＣＭンデインダステージｌｏ下に設けられた
ヒータを発熱状態にして、上記熱硬化性樹脂片を２００
℃〜２５０１？：、数秒間の加熱により硬化させ、支持
体６を形成する。この加熱硬化時にポンディングワイヤ
４のデンディング工程を行なう。After that (the heater installed under the CM index stage LO is turned on to generate heat), the thermosetting resin piece is
℃~2501? : The support 6 is formed by curing by heating for several seconds. During this heat curing, the bonding wire 4 is subjected to a dending process.
以上のようにして、リードフレーム１にペレット３が固
定されワイヤデンディングが終了したものを適当な外囲
器に組み込む。第４図には例えばモールド樹脂５を用い
て封止した樹脂封止型）４ツケージのものを示す。As described above, the pellet 3 is fixed to the lead frame 1 and the wire ending is completed, and the pellet is assembled into a suitable envelope. FIG. 4 shows, for example, a resin-sealed type (4-cage) sealed using a molding resin 5.
なお、上記工程において、デンディングステージ１０上
で樹脂片６を加熱硬化させたが、一般にビンディング工
程においては２００’Ｃ〜２５０℃程度に加熱した状態
で行なうものであシ、通常のデンディング工程と、樹脂
片６の硬化工程とは全く同時に行なうことができる。ま
た、上記デンディングステージは樹脂と離型しやすくす
るために硬質クロムメッキしておくと良いＯ
また、上記支持体６を形成する工程は、枠状の樹脂片を
リードフレーム１と４レツト３との間にはめ込むほかに
、液状樹脂を上記リードフレームＪとペレット３との間
隙に充填し、硬化させ、しかる後にデンディング工程を
行なってもよい。In addition, in the above process, the resin piece 6 was heated and hardened on the denting stage 10, but the binding process is generally carried out in a state heated to about 200'C to 250C, and is not the same as the normal dending process. This and the curing process of the resin piece 6 can be performed at the same time. In addition, it is recommended that the dending stage is plated with hard chrome to make it easier to release from the resin.Also, in the step of forming the support 6, frame-shaped resin pieces are attached to the lead frames 1 and 4. In addition to being fitted between the lead frame J and the pellet 3, a liquid resin may be filled into the gap between the lead frame J and the pellet 3, hardened, and then a denting process may be performed.
以上述べたように支持体によシペレット側面をリードフ
レームに固定する半導体装置では次のような効果が掲げ
られる。すなわち従来必要としていたリードフレームの
アイランド部に半導体ペレットを取着するものでないた
め、アイランド部とマウント剤との厚さ分だけノ千ツケ
ージの厚さを薄くして小型化することが可能であシ、マ
ウント剤の硬化に時間を要するペレットのマウント工程
およびアイランドダウン工程が不要でワイヤポンディン
グ工程と半導体ベレットのリードフレームへの固定を同
時に行なうことも可能である。さらに上記マウント工程
におけるマウント剤の塗布むらによるペレットへのクラ
ックの発生のおそれやアイランド部とペレットとの線膨
張係数差に起因するペレットへのクラックの発生のおそ
れがない。さらに、リードフレームへペレットを取シ付
はワイヤデンディングしたものを樹脂モールドによシ封
止する場合等は、従来気泡をまき込み易かったペレット
とリードフレームとの先端との間が予め支持体で充填さ
れているため、気泡をまき込みにくく、装置の信頼性向
上に寄与できる。また、リードフレームのアイランド部
が不要なためリードフレーム材を節約することができ、
さらにペレットの裏面に能動素子を形成することも可能
である。As described above, the semiconductor device in which the side surface of the pellet is fixed to the lead frame by the support has the following effects. In other words, since the semiconductor pellet is not attached to the island part of the lead frame, which was required in the past, it is possible to reduce the thickness of the cage by the thickness of the island part and the mounting agent, thereby making it more compact. Furthermore, the pellet mounting process and the island down process, which require time for the curing of the mounting agent, are not necessary, and the wire bonding process and the fixing of the semiconductor pellet to the lead frame can be performed at the same time. Furthermore, there is no risk of cracks occurring in the pellet due to uneven application of the mounting agent in the mounting process, or cracks occurring in the pellet due to the difference in coefficient of linear expansion between the island portion and the pellet. Furthermore, when attaching a pellet to a lead frame and sealing it with a resin mold after wire-dending it, it is necessary to use a support between the pellet and the tip of the lead frame, where air bubbles can easily be trapped. Since it is filled with gas, it is difficult to introduce air bubbles, which contributes to improving the reliability of the device. In addition, lead frame materials can be saved because the island part of the lead frame is not required.
Furthermore, it is also possible to form active elements on the back side of the pellet.
以上のようにこの発明によれば、ノクツケージの小型化
、マウント工程および？ンデイング工程等の組立工程の
簡素化、被レットクラックの低減による信頼性の向上を
実現でき、ペレットの裏面も一電極としてだけでなく例
えば能動素子領域として利用することのできる半導体装
置を提供することができる。As described above, according to the present invention, the size of the cage can be reduced, the mounting process, and the like. To provide a semiconductor device in which reliability can be improved by simplifying an assembly process such as a bonding process and reducing cracks caused by pellets, and in which the back surface of a pellet can be used not only as an electrode but also as an active element region, for example. Can be done.
第１図および第２図は従来の半導体装置を製造過程順に
示す断面図、第３図および第４図はこの発明の一実施例
に係る半導体装置を製造過程順に示す断面図である。
Ｊ・・・リードフレーム、１ｂ・・・インナーリード部
、３・・・半導体ベレット、４・・・ポンディングワイ
ヤ、５・・・モールド樹脂、６・・・支持体。
出願人代理人 弁理士 鈴 江 武 彦第１図
第２図
第３図
第４図FIGS. 1 and 2 are sectional views showing a conventional semiconductor device in the order of the manufacturing process, and FIGS. 3 and 4 are sectional views showing the semiconductor device according to an embodiment of the present invention in the order of the manufacturing process. J...Lead frame, 1b...Inner lead portion, 3...Semiconductor pellet, 4...Ponding wire, 5...Mold resin, 6...Support body. Applicant's Representative Patent Attorney Takehiko Suzue Figure 1 Figure 2 Figure 3 Figure 4
Claims (3)
一平面上の離間した位置にインナーリード部が配置され
たリードと、上記半導体ペレットの側面と上記リードと
に接着され上記半導体ペレットをリードによシ支持する
支持体と、上記半導体ペレットと所定の上記リードとを
電気的接続する接続手段と、上記半導体装レットおよび
インナーリード部およびこれらの接続部を億護する外囲
器とを具備したことを特徴とする半導体装置。(1) A semiconductor pellet, a lead having an inner lead portion arranged at a spaced position on the same plane as the semiconductor pellet, and a lead that is bonded to the side surface of the semiconductor pellet and the lead, and supports the semiconductor pellet by the lead. a support for electrically connecting the semiconductor pellet and the predetermined lead, and an envelope that protects the semiconductor pellet, the inner lead portion, and the connecting portion thereof. semiconductor device.
脂材からなることを特徴とする特許請求の範囲第１項記
載の半導体装置。(2) The semiconductor device according to claim 1, wherein the support is made of a resin material such as epoxy or polyimide.
ーリード部およびこれらの接続部を一体封止するモール
ド樹脂であることを特徴とする特許請求の範囲第１項ま
たは第２項記載の半導体装置。(3) The semiconductor device according to claim 1 or 2, wherein the envelope is a molded resin that integrally seals the semiconductor pellet, the inner lead portion, and the connecting portion thereof. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58053525A JPS59181025A (en) | 1983-03-31 | 1983-03-31 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58053525A JPS59181025A (en) | 1983-03-31 | 1983-03-31 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59181025A true JPS59181025A (en) | 1984-10-15 |
Family
ID=12945228
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58053525A Pending JPS59181025A (en) | 1983-03-31 | 1983-03-31 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59181025A (en) |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01179351A (en) * | 1987-12-30 | 1989-07-17 | Fujitsu Ltd | Plastic-molded semiconductor device and its manufacture |
| JPH02130865A (en) * | 1988-10-24 | 1990-05-18 | Motorola Inc | Flag-less semiconductor package |
| JPH02197151A (en) * | 1989-01-26 | 1990-08-03 | Oki Electric Ind Co Ltd | Resin-sealed semiconductor device and manufacture thereof |
| JPH03129871A (en) * | 1989-10-16 | 1991-06-03 | Oki Electric Ind Co Ltd | Resin sealed type semiconductor device |
| JPH0855952A (en) * | 1994-08-16 | 1996-02-27 | Nec Kyushu Ltd | Semiconductor device and manufacture thereof |
| US5605863A (en) * | 1990-08-31 | 1997-02-25 | Texas Instruments Incorporated | Device packaging using heat spreaders and assisted deposition of wire bonds |
| JP2006108409A (en) * | 2004-10-06 | 2006-04-20 | Fujitsu Ltd | Semiconductor device and manufacturing method therefor |
| JP4837092B2 (en) * | 2006-05-18 | 2011-12-14 | グラフィック パッケージング インターナショナル インコーポレイテッド | Carton with liquid tight receptacle |
| US10737824B2 (en) | 2016-11-14 | 2020-08-11 | Graphic Packaging International, Llc | Reconfigurable carton and package |
-
1983
- 1983-03-31 JP JP58053525A patent/JPS59181025A/en active Pending
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01179351A (en) * | 1987-12-30 | 1989-07-17 | Fujitsu Ltd | Plastic-molded semiconductor device and its manufacture |
| JPH02130865A (en) * | 1988-10-24 | 1990-05-18 | Motorola Inc | Flag-less semiconductor package |
| JPH02197151A (en) * | 1989-01-26 | 1990-08-03 | Oki Electric Ind Co Ltd | Resin-sealed semiconductor device and manufacture thereof |
| JPH03129871A (en) * | 1989-10-16 | 1991-06-03 | Oki Electric Ind Co Ltd | Resin sealed type semiconductor device |
| US5605863A (en) * | 1990-08-31 | 1997-02-25 | Texas Instruments Incorporated | Device packaging using heat spreaders and assisted deposition of wire bonds |
| JPH0855952A (en) * | 1994-08-16 | 1996-02-27 | Nec Kyushu Ltd | Semiconductor device and manufacture thereof |
| JP2006108409A (en) * | 2004-10-06 | 2006-04-20 | Fujitsu Ltd | Semiconductor device and manufacturing method therefor |
| JP4837092B2 (en) * | 2006-05-18 | 2011-12-14 | グラフィック パッケージング インターナショナル インコーポレイテッド | Carton with liquid tight receptacle |
| US10737824B2 (en) | 2016-11-14 | 2020-08-11 | Graphic Packaging International, Llc | Reconfigurable carton and package |
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