JPH01205454A - Lead frame - Google Patents

Lead frame

Info

Publication number
JPH01205454A
JPH01205454A JP2924688A JP2924688A JPH01205454A JP H01205454 A JPH01205454 A JP H01205454A JP 2924688 A JP2924688 A JP 2924688A JP 2924688 A JP2924688 A JP 2924688A JP H01205454 A JPH01205454 A JP H01205454A
Authority
JP
Japan
Prior art keywords
die pad
frame
lead frame
resin
semiconductor chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2924688A
Other languages
Japanese (ja)
Inventor
Koji Nose
幸之 野世
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP2924688A priority Critical patent/JPH01205454A/en
Publication of JPH01205454A publication Critical patent/JPH01205454A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To prevent the generation of cracks of a package due to thermal shock, by fixing a frame composed of organic material like polyimide along the terminal periphery of a die pad of the lead frame, by using polymer adhesive agent which is heat resisting and low hygroscopic. CONSTITUTION:In a lead frame, a frame 4 is fixed on the end-portion of a die pad 3 of the lead frame 1 made of iron-nickel alloy or copper alloy, by using organic adhesive agent 5 like polyimide. The frame 4 is composed of polyimide system resin which is heat resisting, low hygroscopic, and of low elasticity. In the lead frame 1, gold or silver plating 8 is formed on the die pad 3 and the surface side of the tip parts of inner leads 7. On the die pad 3 of the lead frame 1, a semiconductor chip 9 is stuck by using silver paste 10 wherein silver powder is mixed in epoxy system resin or polyimide system resin. The silver paste 10 is hardened at 100-260 deg.C for 4-5 hours to fix the semiconductor chip 9 on the die pad 3. Then the the semiconductor chip 9 and the plating part 8 of the inner lead 7 are connected with thin wires 12 of gold or copper, and resin molding is performed by resin seal metal mold.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、半導体チップを載置するダイパラI・の端部
の周囲に有機材からなる枠を取り付けたリードフレーム
に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a lead frame in which a frame made of an organic material is attached around the end of a die plate I on which a semiconductor chip is mounted.

従来の技術 従来のリードフレームは鉄−ニッケル合金や銅合金の薄
板をプレスで打ち抜いて形成されていた。そして、この
り−l〜フレームを用いて半導体素子をパッケージに樹
脂封止していた。この方法を以下に説明する。
BACKGROUND OF THE INVENTION Conventional lead frames have been formed by punching thin sheets of iron-nickel alloy or copper alloy using a press. Then, the semiconductor element was resin-sealed into the package using the frame. This method will be explained below.

まず、シリコン等の半導体基板にトランジスタや抵抗等
の半導体素子が集積された半導体チップをリードフレー
ムのダイパッドに固着する。この半導体チップのダイパ
ッドへの固着は、鉄−ニッケル合金や銅合金で形成され
たリードフレームのダイパッドに銀ペースト等により貼
り付ける。すなわち、ダイパッドの半導体チップ貼り付
は面に、予め厚さカ月、5〜3μm程度の金め、つきも
しくは銀めっきを施しておき、銀ペーストで半導体チッ
プを貼り付けた後、】OO〜250 ’Cの温度て銀ペ
ーストを硬化させて半導体チップを固着させる。
First, a semiconductor chip in which semiconductor elements such as transistors and resistors are integrated on a semiconductor substrate made of silicon or the like is fixed to a die pad of a lead frame. This semiconductor chip is fixed to the die pad by pasting it onto the die pad of a lead frame made of iron-nickel alloy or copper alloy using silver paste or the like. That is, to attach the semiconductor chip to the die pad, the surface is plated with gold or silver to a thickness of about 5 to 3 μm in advance, and after the semiconductor chip is attached with silver paste, the surface of the die pad is plated with gold, plating, or silver plating to a thickness of 5 to 3 μm, and then the semiconductor chip is attached with silver paste. The silver paste is cured at a temperature of C to fix the semiconductor chip.

次に金や銅の細線で半導体チップのボンティングバット
と、リーI・フレームのインナーリートの先端部のめっ
き膜上とを、熱圧着ワイヤーボンティング法により接続
する。
Next, the bonding butt of the semiconductor chip and the top of the plating film at the tip of the inner lead of the Lee I frame are connected with a thin wire of gold or copper using a thermocompression wire bonding method.

これを、160〜190 ’Cの温度に加熱された樹脂
成形用金型に装着し、金型のゲート部より溶融樹脂を注
入してキャヒティー内に満たず。溶融樹脂を充填後、3
0〜90秒間そのまま樹脂成形金型中で保持しておき、
樹脂を大体硬化させる。
This was installed in a resin molding mold heated to a temperature of 160 to 190'C, and molten resin was injected from the gate of the mold to fill the cavity. After filling with molten resin, 3
Hold it in the resin mold for 0 to 90 seconds,
Harden the resin.

そして、成形後、樹脂成形金型から取り出し、160〜
180 ’Cの温度て5〜6時間、炉内で本格的に硬化
させ、リードフレームを用いた崖導体チップの樹脂中へ
の封止を終了させる。
After molding, take it out from the resin mold and
The resin is fully cured in a furnace at a temperature of 180'C for 5 to 6 hours to complete the sealing of the cliff conductor chip in the resin using the lead frame.

これにア「クターリーI・のめつき、リーI・ヘント、
マーキング加工等を施して半導体装置の組立を完する。
To this, A'Cterley I. Nometsuki, Lee I.
Marking processing, etc. is performed to complete the assembly of the semiconductor device.

発明か解決しようとする課題 樹脂封止型パッケージの薄型、小型化か進むなかで、搭
載する半導体チップの素子数の大集積化も進み、その面
積が非常に大形化してきている。
Problems to be Solved by the Invention As resin-sealed packages become thinner and smaller, the number of integrated semiconductor chips mounted on them is also increasing, and their area is becoming extremely large.

その為に、樹脂封止型パッケ゛−シをプリント基板に実
装する際、半田槽中へのパッケージの浸漬て、樹脂にク
ラックか生じやすい。このクラックは、パッケージ内に
封し込んだり一部フレームと封止樹脂の線膨張係数が異
なり、急激な温度変化により特に、ダイパッドのエッヂ
やコーナーの樹脂部分に大きな歪が生しることにより発
生する。
Therefore, when a resin-sealed package is mounted on a printed circuit board, cracks are likely to occur in the resin when the package is immersed in a solder bath. These cracks occur because the linear expansion coefficient of the sealing resin differs from that of the frame when it is sealed inside the package, and rapid temperature changes cause large distortions, especially in the resin parts at the edges and corners of the die pad. do.

しかも、クラックは、パッケージが吸湿しておれば、−
層重大な影響をもたらすという問題があった。
Moreover, cracks can occur if the package absorbs moisture.
The problem was that it had serious consequences.

課題を解決するだめの手段 本発明のリードフレームは、リードフレームのダイパラ
I・の端部周囲に沿って耐熱性、低吸湿性および低弾性
率のポリイミド等の有機材料からなる枠を耐熱性で、か
つ、低吸湿性の高分子接着剤で取り付けた構造のもので
ある。なお、有機材料からなる枠を、断面をコの字形状
にしてダイパッドの端部に挟み込んで取り(’1(jる
。あるいは、有機材料からなる枠をダイパッドの裏面の
端部に沿ってリング状に取り付けるとともに、枠の外周
の端部かダイパッドの端部より外部に延圧した形状にす
る。
Means for Solving the Problems The lead frame of the present invention has a heat-resistant frame made of a heat-resistant, low-hygroscopic, and low-modulus organic material such as polyimide along the edge of the lead frame. , and is attached with a low hygroscopic polymer adhesive. In addition, take a frame made of an organic material with a U-shaped cross section and insert it between the ends of the die pad ('1 (j).Alternatively, take a frame made of an organic material and place it in a ring along the edge of the back side of the die pad. At the same time, it is rolled outward from the edge of the outer periphery of the frame or the edge of the die pad.

作用 本発明のり一部フレームによれば、樹脂封止型パッケー
ジに熱衝撃(例えば半田槽への浸漬等)を加えた際、ダ
イパッドの裏面のエッヂやコーナーから発生しやすいパ
ッケージ内の樹脂部のクラックをポリイミド等の低弾性
率の有機材からなる枠て阻止することができる。
Effect: According to the adhesive frame of the present invention, when a thermal shock is applied to a resin-sealed package (for example, by immersion in a solder bath), damage to the resin part inside the package, which tends to occur from the edges and corners of the back surface of the die pad, can occur. Cracks can be prevented by using a frame made of an organic material with a low elastic modulus such as polyimide.

実施例 以下に本発明のり一部フレームの実施例を第1図に示し
たリードフレームの平面図と第2図および第3図に示し
た樹脂新庄型パッケージの断面図を参照して説明する。
EXAMPLE An example of a glue frame according to the present invention will be described below with reference to a plan view of a lead frame shown in FIG. 1 and a sectional view of a resin Shinjo type package shown in FIGS. 2 and 3.

本発明のり一1〜フレームは鉄−ニッケル合金や銅合金
で作られたリードフレーム1のダイパッド3の端部に耐
熱性、低吸湿性および低弾性率のポリイミド系樹脂から
なる枠4をポリイミド等の有機接着剤5て取り付けた形
状である。枠4の形状は第2図に示すように、ダイパッ
ド3の端部のエッヂやコーナーに挟まるように断面がコ
の字形状とする。枠4の形状の他の実施例を第3図に示
す。この形状は、ダイパッド3の裏面の端部に取り付け
られたリング形状で、枠4の外周の端部がダイパッド3
の端部より200〜500μm外に付き出し、枠4の内
周の端部がダイパッド3の端部より600〜800μm
内側に存在する形状で、厚さを100〜400μmとし
た。
The glue 1~frame of the present invention is a lead frame 1 made of iron-nickel alloy or copper alloy, and a frame 4 made of polyimide resin with heat resistance, low moisture absorption, and low elastic modulus is attached to the end of the die pad 3 of the lead frame 1 made of polyimide, etc. The shape is attached using organic adhesive 5. As shown in FIG. 2, the frame 4 has a U-shaped cross section so as to be sandwiched between the edges and corners of the die pad 3. Another example of the shape of the frame 4 is shown in FIG. This shape is a ring shape attached to the edge of the back side of the die pad 3, and the edge of the outer periphery of the frame 4 is attached to the edge of the back surface of the die pad 3.
The edge of the frame 4 extends 200 to 500 μm outward from the edge of the die pad 3, and the edge of the inner circumference of the frame 4 extends 600 to 800 μm from the edge of the die pad 3.
It has a shape that exists on the inside and has a thickness of 100 to 400 μm.

次に、このような形状の本発明のリードフレームを用い
て半導体装置を製造する方法を示す。
Next, a method for manufacturing a semiconductor device using the lead frame of the present invention having such a shape will be described.

まず、本発明のリードフレーム1に、ダイパッド3とイ
ンナーリード7の先端部の表側に、金や銀のめっき8を
1.5〜3μmの厚さて施しておく。このリードフレー
ムのダイパッド3の上に半導体チップ9を、エポギシ系
樹脂やポリイミド系樹脂に銀の粉末を混ぜた銀ペースl
−10で貼り付ける。その後、100〜250℃の温度
で4〜5時間、銀ペースト10を硬化させてダイパッド
3の」−に半導体チップ9を固着させる。
First, in the lead frame 1 of the present invention, gold or silver plating 8 is applied to a thickness of 1.5 to 3 μm on the front side of the die pad 3 and the tip portions of the inner leads 7. A semiconductor chip 9 is placed on the die pad 3 of this lead frame, and a silver paste l made of epoxy resin or polyimide resin mixed with silver powder is placed on the die pad 3 of the lead frame.
Paste at -10. Thereafter, the silver paste 10 is cured at a temperature of 100 to 250° C. for 4 to 5 hours, and the semiconductor chip 9 is fixed to the die pad 3.

−〇 − 次に、この半導体チップ9の」−のボンディングパラI
・とインナーリート7のめっき8の部分を、金や銅の細
線12て熱圧着や超音波併用熱圧着のワイヤーボンディ
ング法を用いて接続する。そして、樹脂封止金型で樹脂
成形して、樹脂封止型パッケージ2のり−1・加工前の
ものを作る。
−〇 − Next, bonding para I of “− of this semiconductor chip 9
- and the plating 8 part of the inner REIT 7 are connected using a thin gold or copper wire 12 using a wire bonding method such as thermocompression bonding or ultrasonic thermocompression bonding. Then, it is resin-molded using a resin-sealing mold to produce a resin-sealed package 2 (glue-1) before processing.

これを、アラターリ−1・13に半田めっきと、リート
ヘント加工を施し、パッケージの表面に品番等のマーキ
ングを行って、樹脂打止型パッケージ2は完成する。こ
のようにして、組み立てられた半導体装置を熱衝撃試験
を行っても、有機材料で形成された枠によりダイパッド
の裏面のエッヂやコーーノー−からクラックが発生しな
くなる。
This is then subjected to solder plating and Liethent processing to the interlayers 1 and 13, and the product number and the like are marked on the surface of the package, thereby completing the resin molded package 2. In this manner, even if the assembled semiconductor device is subjected to a thermal shock test, cracks will not occur from the edges or corners of the back surface of the die pad due to the frame formed of the organic material.

発明の効果 本発明のり一1〜フレームを樹脂封止型パッケージに使
用することによって、熱衝撃によりパッケージにクラッ
クが発生するのを防止することができるおともに、大面
積の半導体チップを樹脂封止型パッケージに搭載するこ
とがてきる等の効果か得られる。
Effects of the Invention By using the adhesive frame of the present invention in a resin-sealed package, it is possible to prevent cracks from occurring in the package due to thermal shock, and it is also possible to seal large-area semiconductor chips with resin. Effects such as being able to be mounted on a mold package can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明り一部フレームの平面図、第2図は本発
明のリードフレームを用いて組み立てた樹脂封止型パッ
ケージの断面図、第3図は本発明のり一部フレームの他
の実施例を示す樹脂封止型パッケージの断面図である。 ■・・・・・リードフレーム、2・・・・・樹脂封止型
パッケージ、3・・・・・・ダイパッド、4・・・・・
枠、5・・・・・有機接着剤、7・・・・・・インナー
リート、8・・・・・・めっき、9・・・・・・半導体
チップ、10・・・・・・銀ペースト、11・・・・ボ
ンディングパット、12・・・・・・細線、13・・・
・・・アウターリート。
FIG. 1 is a plan view of a partial frame according to the present invention, FIG. 2 is a sectional view of a resin-sealed package assembled using the lead frame of the present invention, and FIG. 3 is a plan view of a partial frame according to the present invention. FIG. 2 is a cross-sectional view of a resin-sealed package showing an example. ■...Lead frame, 2...Resin-sealed package, 3...Die pad, 4...
Frame, 5...Organic adhesive, 7...Inner lead, 8...Plating, 9...Semiconductor chip, 10...Silver paste , 11... Bonding pad, 12... Thin line, 13...
...Outer Reed.

Claims (4)

【特許請求の範囲】[Claims] (1)半導体素子を載置するダイパッドの端部に耐熱性
、低吸湿性および低弾性率の有機材からなる枠が取り付
けられているリードフレーム。
(1) A lead frame in which a frame made of a heat-resistant, low-hygroscopic, and low-modulus organic material is attached to the end of a die pad on which a semiconductor element is placed.
(2)有機材からなる枠の断面が、ダイパッドの端部を
挟み込むためにコの字形状をした請求項1記載のリード
フレーム。
(2) The lead frame according to claim 1, wherein the frame made of organic material has a U-shaped cross section to sandwich the end of the die pad.
(3)有機材からなる枠が、ダイパッドの裏面の端部に
沿ってリング状に取り付けられているとともに、前記枠
の外周の端部が前記ダイパッドの端部より外部に延圧し
ている請求項1記載のリードフレーム。
(3) A frame made of an organic material is attached in a ring shape along the edge of the back surface of the die pad, and an edge of the outer periphery of the frame extends outward from the edge of the die pad. The lead frame described in 1.
(4)有機材からなる枠が、耐熱性で、かつ、低吸湿性
の高分子接着剤で固着されている請求項1記載のリード
フレーム。
(4) The lead frame according to claim 1, wherein the frame made of an organic material is fixed with a heat-resistant and low-hygroscopic polymer adhesive.
JP2924688A 1988-02-10 1988-02-10 Lead frame Pending JPH01205454A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2924688A JPH01205454A (en) 1988-02-10 1988-02-10 Lead frame

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2924688A JPH01205454A (en) 1988-02-10 1988-02-10 Lead frame

Publications (1)

Publication Number Publication Date
JPH01205454A true JPH01205454A (en) 1989-08-17

Family

ID=12270898

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2924688A Pending JPH01205454A (en) 1988-02-10 1988-02-10 Lead frame

Country Status (1)

Country Link
JP (1) JPH01205454A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5536970A (en) * 1992-09-29 1996-07-16 Kabushiki Kaisha Toshiba Resin-encapsulated semiconductor device
US6501158B1 (en) * 2000-06-22 2002-12-31 Skyworks Solutions, Inc. Structure and method for securing a molding compound to a leadframe paddle

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6295993A (en) * 1985-10-22 1987-05-02 Fuji Electric Co Ltd Control system of output voltage from inverter
JPH0449884A (en) * 1990-06-18 1992-02-19 Toshiba Corp Controller for induction motor

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6295993A (en) * 1985-10-22 1987-05-02 Fuji Electric Co Ltd Control system of output voltage from inverter
JPH0449884A (en) * 1990-06-18 1992-02-19 Toshiba Corp Controller for induction motor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5536970A (en) * 1992-09-29 1996-07-16 Kabushiki Kaisha Toshiba Resin-encapsulated semiconductor device
US6501158B1 (en) * 2000-06-22 2002-12-31 Skyworks Solutions, Inc. Structure and method for securing a molding compound to a leadframe paddle

Similar Documents

Publication Publication Date Title
US6387732B1 (en) Methods of attaching a semiconductor chip to a leadframe with a footprint of about the same size as the chip and packages formed thereby
US6403387B1 (en) Method and apparatus for transfer molding encapsulation of a semiconductor die with attached heat sink
KR100674548B1 (en) Semiconductor device
US6657288B2 (en) Compression layer on the lead frame to reduce stress defects
KR100366111B1 (en) Structure of Resin Sealed Semiconductor Device
US6576491B1 (en) Methods for producing high reliability lead frame and packaging semiconductor die using such lead frame
JPH05267555A (en) Semiconductor device and its manufacture, and lead frame used for it and its manufacture
US6707167B2 (en) Semiconductor package with crack-preventing member
JPH098186A (en) Semiconductor integrated circuit device and its manufacture
JPH01205454A (en) Lead frame
JP2004015015A (en) Semiconductor device and its manufacturing method
JPH0745960Y2 (en) Resin-sealed semiconductor device
KR100308899B1 (en) semiconductor package and method for fabricating the same
JPH1084055A (en) Semiconductor device and its manufacturing method
JPH0637221A (en) Resin sealing type semiconductor device
JP2543525B2 (en) Resin-sealed semiconductor device
JPH02292850A (en) Lead frame
JPH03265161A (en) Resin-sealed semiconductor device
JPH0722559A (en) Lead frame
JPH06334106A (en) Resin-sealed semiconductor device
JPS63232452A (en) Semiconductor device
JPH0870089A (en) Semiconductor device and its manufacture
JPS6235655A (en) Semiconductor integrated circuit device
JPS61269339A (en) Semiconductor device
JPS6114672B2 (en)