JPS59178039A - デ−タ伝送方式 - Google Patents

デ−タ伝送方式

Info

Publication number
JPS59178039A
JPS59178039A JP58052969A JP5296983A JPS59178039A JP S59178039 A JPS59178039 A JP S59178039A JP 58052969 A JP58052969 A JP 58052969A JP 5296983 A JP5296983 A JP 5296983A JP S59178039 A JPS59178039 A JP S59178039A
Authority
JP
Japan
Prior art keywords
synchronization
data
synchronization code
code
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58052969A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0220024B2 (enrdf_load_stackoverflow
Inventor
Junichi Sato
純一 佐藤
Takao Sakata
坂田 隆男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58052969A priority Critical patent/JPS59178039A/ja
Publication of JPS59178039A publication Critical patent/JPS59178039A/ja
Publication of JPH0220024B2 publication Critical patent/JPH0220024B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/24Time-division multiplex systems in which the allocation is indicated by an address the different channels being transmitted sequentially
    • H04J3/242Time-division multiplex systems in which the allocation is indicated by an address the different channels being transmitted sequentially the frames being of variable length

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Communication Control (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP58052969A 1983-03-29 1983-03-29 デ−タ伝送方式 Granted JPS59178039A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58052969A JPS59178039A (ja) 1983-03-29 1983-03-29 デ−タ伝送方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58052969A JPS59178039A (ja) 1983-03-29 1983-03-29 デ−タ伝送方式

Publications (2)

Publication Number Publication Date
JPS59178039A true JPS59178039A (ja) 1984-10-09
JPH0220024B2 JPH0220024B2 (enrdf_load_stackoverflow) 1990-05-07

Family

ID=12929713

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58052969A Granted JPS59178039A (ja) 1983-03-29 1983-03-29 デ−タ伝送方式

Country Status (1)

Country Link
JP (1) JPS59178039A (enrdf_load_stackoverflow)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5668042A (en) * 1979-11-07 1981-06-08 Toshiba Corp Data transmission system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5668042A (en) * 1979-11-07 1981-06-08 Toshiba Corp Data transmission system

Also Published As

Publication number Publication date
JPH0220024B2 (enrdf_load_stackoverflow) 1990-05-07

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