JPS59175164A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS59175164A JPS59175164A JP4915983A JP4915983A JPS59175164A JP S59175164 A JPS59175164 A JP S59175164A JP 4915983 A JP4915983 A JP 4915983A JP 4915983 A JP4915983 A JP 4915983A JP S59175164 A JPS59175164 A JP S59175164A
- Authority
- JP
- Japan
- Prior art keywords
- polycrystalline silicon
- protection circuit
- polycrystalline
- input
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 25
- 239000010408 film Substances 0.000 claims abstract description 18
- 239000010409 thin film Substances 0.000 claims abstract description 7
- 239000000758 substrate Substances 0.000 claims abstract description 6
- 239000010453 quartz Substances 0.000 claims abstract description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 5
- 239000012535 impurity Substances 0.000 claims description 2
- 240000001548 Camellia japonica Species 0.000 claims 1
- 235000018597 common camellia Nutrition 0.000 claims 1
- 238000000605 extraction Methods 0.000 claims 1
- 230000006378 damage Effects 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/866—Zener diodes
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は多結晶シリコン膜を用いた薄膜集積回路の保護
回路構造に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a protection circuit structure for a thin film integrated circuit using a polycrystalline silicon film.
従来、多結晶シリコン膜を用いた薄膜集積回路の保護回
路構造は多結晶シリコン嘆を用いた薄膜集積回路が実用
化されていない経過の下で、検討されていないのが実状
であった。Conventionally, the protection circuit structure of a thin film integrated circuit using a polycrystalline silicon film has not been studied since thin film integrated circuits using a polycrystalline silicon film have not yet been put into practical use.
上記従来技術の実状に対し、次の如き検討を行々い、次
のような結果を得た。すなわち、多結晶シリコン膜によ
る薄膜ＭＯ８ＦＥＴ を作成したところ、ゲート酸化
膜の耐圧は単結晶シリコン基板によるＭＯＳ ＦＥＴ
のゲート酸化膜の耐圧に比し％程度と著るしく劣る
事。および、保護回路として第１図に示す如き、ＭＯＳ
ＦＦ１Ｔ のドレインとゲートとを直結した回路
で、第３図に示す如き、石英基板１上の多結晶シリコン
膜２にゲート酸化膜３、ゲート電極４Ｖｃより構成され
念保護回路装宜を動作させたところ、過大電圧の入力に
対し、アバランシェ・ブレークダウン時のホ・ノド・エ
レクトロンによるゲート酸化膜の損傷により多結晶シリ
コンＩＩＩＶＣよる該構造の保護回路装置はきわめて破
壊され易い欠点があること等がわかった。Regarding the actual state of the above-mentioned prior art, the following studies were conducted and the following results were obtained. In other words, when we created a thin film MO8FET using a polycrystalline silicon film, the withstand voltage of the gate oxide film was higher than that of a MOS FET using a single crystal silicon substrate.
%, which is significantly inferior to the breakdown voltage of the gate oxide film. And as a protection circuit, a MOS as shown in Figure 1 is used.
This circuit directly connects the drain and gate of FF1T, as shown in Fig. 3, and is made up of a polycrystalline silicon film 2 on a quartz substrate 1, a gate oxide film 3, and a gate electrode 4Vc, and operates a protective circuit device. However, it has been found that the protection circuit device of this structure made of polycrystalline silicon IIIVC is extremely susceptible to destruction due to damage to the gate oxide film caused by honoelectrons during avalanche breakdown in response to excessive voltage input. Ta.
上記、実験結果の欠点より、本発明は多結晶シリコン膜
による象積回路の保護回路として、破壊され難く、且つ
確実に動作する保護回路を提供することを目的とする。In view of the drawbacks of the above experimental results, an object of the present invention is to provide a protection circuit for a quadrant circuit made of a polycrystalline silicon film that is difficult to destroy and operates reliably.
上記目的を達成するための本発明の基本的な構成は、半
導体装置において、石英基板上に形成された多結晶シリ
コン膜よりなる薄膜集積回路の入力あるいけ出力信号増
り出し電極にはアース電極配線との間に高濃度不純物を
導入したＰ＋多結晶シリコンとＮ＋多結晶シリコンとの
接合からなるいわゆる多結晶シリコンによるツェナー・
ダイオードが過大雪、圧の入力に対する保護回路として
形成されて成ることを特徴とする。The basic configuration of the present invention for achieving the above object is that, in a semiconductor device, an input or output signal increasing electrode of a thin film integrated circuit made of a polycrystalline silicon film formed on a quartz substrate has a ground electrode. A zener made of so-called polycrystalline silicon, which consists of a junction between P+ polycrystalline silicon and N+ polycrystalline silicon into which high concentration impurities are introduced between the wiring and the wiring.
It is characterized in that the diode is formed as a protection circuit against excessive snow and pressure input.
以下、実施例により本発明を詳述する。Hereinafter, the present invention will be explained in detail with reference to Examples.
第２図は本発明によるツェナー−ダイオードによる保護
回路の構成の一例を示す回路図である。FIG. 2 is a circuit diagram showing an example of the configuration of a protection circuit using a Zener diode according to the present invention.
第４図は、本発明の一実施例を示す多結晶シリコン膜に
よるツェナー−ダイオードの断面構造を示し、石英基板
１１上に形成された多結晶シリコン膜１２ｖｃＰ−Ｎ
のタイオード接合を形成１７たものである。FIG. 4 shows a cross-sectional structure of a Zener diode made of a polycrystalline silicon film according to an embodiment of the present invention.
A diode junction is formed 17.
上記の如く、多結晶シリコンにＰ −Ｎ 接合を形
成することにより、ツェナー・ダイオードトシての特性
を得ることができ、該ツェナー−ダイオードを保護回路
として用いることにより保護回路の破壊もなく、且つト
ンネル効果による動作のため高速で保護回路が動作する
という効果がある。As mentioned above, by forming a P-N junction in polycrystalline silicon, it is possible to obtain the characteristics of a Zener diode, and by using the Zener diode as a protection circuit, there is no destruction of the protection circuit. Because the operation is based on the tunnel effect, the protection circuit operates at high speed.
尚、多結晶シリコンによるツェナー−ダイオードはやや
リーク電流が多いため、ツェナｍ−ダイオードを直列に
結線して設けることにより、保護回路へのリーク雷、流
を減少させることもでき、且つ、保護回路の耐圧を任意
の高さに設定することができる。In addition, Zener diodes made of polycrystalline silicon have a rather large leakage current, so by connecting Zener diodes in series, it is possible to reduce the leakage current to the protection circuit. The withstand pressure can be set to any desired height.
更に、ツェナー・ダイオードは逆方向にのみ結線する必
要はなく、順方向に直列に結線しても良い。Furthermore, the Zener diodes need not be connected only in the reverse direction, but may be connected in series in the forward direction.
第１図及び第２図は保護回路の回路図、第３図太び第４
図は多結晶シリコン膜による保護回路装置の断面図であ
る、
１．１１・・・用石英基板
２．１２・・・・・・多結晶シリコン膜１３・・・・・
・ゲート酸化嘆
４・・・・・・ゲート電憧
以 上
出題人 株式会社 諏訪精工舎
５−Figures 1 and 2 are circuit diagrams of the protection circuit, Figure 3
The figure is a cross-sectional view of a protection circuit device using a polycrystalline silicon film. 1.11...Quartz substrate 2.12...Polycrystalline silicon film 13...
・Gate Oxidation 4...Gate Denso and above Questioner: Suwa Seikosha Co., Ltd. 5-
Claims (2)
りなる薄膜集積回路の入力あるいは出力信号取り出し１
椿にはアース電極配線との間に高濃度不純物を導入した
Ｐ＋多結晶シリコンとＮ＋多結晶シリコン°との接合か
らなるいわゆる多結晶シリコンによるツェナー・〃゛イ
オード過大電圧の入力に対する保護回路として形成され
て成ることを特徴とする半導体装置。(1) Input or output signal extraction from a thin film integrated circuit made of a polycrystalline silicon film formed on a quartz substrate 1
The camellia has a Zener diode made of so-called polycrystalline silicon consisting of a junction of P+ polycrystalline silicon with high concentration impurities introduced into it and N+ polycrystalline silicon between it and the ground electrode wiring.It is formed as a protection circuit against input of excessive voltage. A semiconductor device characterized by comprising:
が２個以上直列に結合されて保護回路を形成することを
特徴とする特許請求範囲第１項紀載の半導体装置。(2) A semiconductor device according to claim 1, characterized in that two or more Zener diodes made of polycrystalline silicon are connected in series to form a protection circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4915983A JPS59175164A (en) | 1983-03-24 | 1983-03-24 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4915983A JPS59175164A (en) | 1983-03-24 | 1983-03-24 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59175164A true JPS59175164A (en) | 1984-10-03 |
Family
ID=12823309
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4915983A Pending JPS59175164A (en) | 1983-03-24 | 1983-03-24 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59175164A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6423577A (en) * | 1987-07-20 | 1989-01-26 | Matsushita Electronics Corp | Diode for prevention of electrostatic breakdown |
| JP2014053596A (en) * | 2012-08-06 | 2014-03-20 | Denso Corp | Diode |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57211782A (en) * | 1981-06-24 | 1982-12-25 | Hitachi Ltd | Semiconductor device |
-
1983
- 1983-03-24 JP JP4915983A patent/JPS59175164A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57211782A (en) * | 1981-06-24 | 1982-12-25 | Hitachi Ltd | Semiconductor device |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6423577A (en) * | 1987-07-20 | 1989-01-26 | Matsushita Electronics Corp | Diode for prevention of electrostatic breakdown |
| JP2014053596A (en) * | 2012-08-06 | 2014-03-20 | Denso Corp | Diode |
| US9478672B2 (en) | 2012-08-06 | 2016-10-25 | Denso Corporation | Diode |
| US9853168B2 (en) | 2012-08-06 | 2017-12-26 | Denso Corporation | Diode |
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