JPS59161930A - Reducing device of impulsive noise - Google Patents

Abstract

PURPOSE:To reduce impulsive noise with no acoustic unnaturalness by complementing a signal dropped out during a period of impulsive noises. CONSTITUTION:The output signal S3 of a signal compensating circuit 5 is sent to an output terminal 8 as well as to an LPF9 and an HPF10. The output signal S3b sent from the HPF10, that is, a high band component S3b of the signal S3 of the circuit 5 is supplied to a nonlinear circuit 11. While the output signal S3a supplied from the LPF9 is applied to an adder circuit 12 as an input at one side of the circuit 12. The output signal S3c of the circuit 11 is used as the other input of the circuit 12. A white noise component N applied to the circuit 11 corresponds to a flat region C of the nonlinear characteristics A of the circuit 11 and never emerges in the signal S3 of the circuit 11. Thus the noise component N is deleted. A delay circuit 2 is provided together with a control signal generating circuit CSG and a sampling/holding circuit 7.

Description

Detailed Description of the Invention (Field of Industrial Application) The present invention is directed to the reduction of pulse noise introduced from the outside into the audio signal system of audio equipment, radio receivers, television receivers, video disc players, etc. The present invention relates to a device for reducing pulse noise that can be performed in an audible manner.

(Prior art) Pulse noise, for example, ignition noise of a car or pulse noise generated by other electrical equipment, is generated in the audio signal system of various equipment such as electrical equipment or electronic equipment that has an audio signal system. It is well known that the quality of the audio signal deteriorates if the mixture is mixed.

Conventionally, as a means to reduce the deterioration in audio signal quality caused by the above-mentioned pulsed noise, there are two methods: (a) reducing the gain of the signal transmission system during the period in which pulsed noise occurs; A method that attempts to reduce pulse noise by cutting off the transmission system (reducing the gain to zero, employing a squelch circuit), and (2) the signal level of the signal during the period of pulse noise. The most common method of noise reduction has been to try to reduce pulse noise by holding the signal at the signal level just before the pulse noise period, but these methods ( The methods described in (a) and (1) have the disadvantage that the signal is lost during the period of pulse noise, and the application of the above-mentioned methods (a) and (1) does not sufficiently reduce the noise. The problem was that it wasn't available.

By the way, in order to interpolate the signal loss that occurs during the noise period, after converting the analog signal to a digital signal, a correction signal corresponding to the signal loss portion is created by applying the linear prediction method, and the correction (No. 1 I Although interpolation of signals during periods of noise has been adopted in some digital devices, implementing this method requires the use of complex and expensive circuits. Therefore, such solutions have not been applied to general audio equipment.

Now, as mentioned above, if you reduce the (rusty noise) (mixed in the signal), (pulse noise The problem is that a good quality audio signal cannot be obtained even if the signal is reduced, and the use of complex and expensive circuitry is required to interpolate the missing portions of the signal to solve the above-mentioned problems. The problem is that it is difficult to apply it to general audio equipment.

In order to solve the above-mentioned conventional problems, the present applicant's company first uses a differentiating circuit, a sample hold circuit, and a signal having slope information of the desired signal during the period in which pulse noise occurs in the input audio signal. signal correction configured to be able to remove pulse noise in an input audio signal and linearly interpolate a desired signal during a period in which pulse noise occurs by being supplied with a control signal and a control signal; An analog circuit with a simple circuit configuration consisting of circuits, etc. is used to create a correction signal that can interpolate the missing part of the signal during the period when pulse noise occurs, thereby making it possible to obtain a high-quality audio signal. A pulse noise reduction device was proposed.

FIG. 1 is a block diagram of the previously proposed pulse noise reduction device.

1 is an input terminal for an input audio signal S1 mixed with pulse noise, 2 is a delay circuit, and C8G is a control signal generation circuit constituted by a pulse noise detection circuit 3 and a pulse shaping circuit 4.

The control signal generating circuit C8G generates a control signal S2 having a pulse width corresponding to the period in which the pulse noise mixed in the input audio signal S1 exists.

As the pulse noise detection circuit 3 and the pulse shaping circuit 4 in the control signal generation circuit C3G, appropriate circuits may be selected from well-known configurations.

By the way, the control signal S2 generated from the control signal generation circuit C8G is required to correspond correctly to the position on the time axis of the pulse noise mixed in the input audio signal. In the signal generating circuit C8G, pulse noise mixed in the input audio signal is detected, and a control signal S2 having a pulse width corresponding to the period in which the pulse noise exists is generated accordingly. Since there is a predetermined time delay determined depending on the operating characteristics of the pulse noise detection circuit 3 used, the pulse noise mixed in the input audio signal and the pulse noise correspond to each other. The input audio signal supplied to the input terminal 1 is delayed by the delay circuit 2 having a delay time substantially equal to the time difference between the input audio signal and the control signal generated by the control signal S2. To ensure that signal processing is performed correctly at positions where pulsed noise exists in an input audio signal.

The input audio signal S1 shown by a in FIG. 2 is an information input audio signal S1 given a necessary time delay by the delay circuit 2, and is mixed into the input audio signal S1 shown by a in FIG. The position of the pulse noise shown in FIG. 2 correctly matches the position on the time axis of the control signal S2 shown by b in FIG.

In FIG. 2, pulse noises Nl, N2, . It is exemplified as containing N3.

In FIG. 1, an input audio signal output from a delay circuit 2 is supplied to an input terminal 5a of a signal correction circuit 5. A specific example of the configuration of the signal correction circuit 5 is the third one.
The control signal S2 is as shown by the circuit in block 5 in the figure, and is generated by the control signal generation circuit C8G.

A signal 82 (e in FIG. 2) having slope information of the desired signal is applied to the control signal input terminal 5c and is applied to the terminal 5d.
As a result, the output terminal 5b receives a signal S3 as shown in C in FIG. An output signal S3 in which the desired signal at is linearly interpolated is sent out. Details of the signal correction circuit 5 described above will be described later with reference to FIG.

The output signal S3 from the signal correction circuit 5 described above is output to the output terminal 8 of the device and is also supplied to the differentiating circuit 6. The differentiation circuit 6 outputs a differentiation signal S4 as shown in C of FIG.

The differential signal S4 described above has a phase difference of 90 degrees with respect to the original signal (desired signal), the output signal 83 from the signal correction circuit 5, etc., and is a signal linearly interpolated in the signal S3 described above. It is assumed that a signal section exhibiting a constant signal level occurs in correspondence with a signal portion exhibiting a constant slope in the interval (period rIrJ in which pulse noise was present in the original signal).

Then, the signal level of the signal section showing the above-mentioned constant No. 43 level in the differential signal S4 becomes a positive signal level or a negative signal level depending on the direction of the slope in the original signal. The polarity differs depending on the direction of the slope of the original signal, and the signal level and zero level of the signal section showing a constant signal level in the differential signal S4 are changed depending on the degree of slope in the original signal (i1). The size of the gap between the two countries is changing.

The differential output signal s4 output from the differential circuit 6 is as follows.

The sample and hold circuit 7 receives a signal S5 as shown at 8 in FIG. 2 from the sample and hold circuit 7. This signal s5 is the same as the signal s4 described above when the device is operating in steady state.

The sample and hold circuit 7 is essential for the operation of the apparatus until it enters steady state operation. The signal S2 generated by the control signal generation circuit C8G is used as the sampling pulse for the sample and hold circuit 7 described above.

Signal S5 output from the sample hold circuit 7
is provided with a signal section showing a constant signal level corresponding to a signal section showing a constant signal level in the differential signal S4 described above, and as described above, a constant signal section in the differential signal S4 described above is provided. Since the signal section indicating the level indicates the slope information of the original signal (desired signal), the output signal S5 from the sample-hold circuit 7 also corresponds to the desired signal by the signal section indicating the constant signal level. This includes slope information.

When the signal S5 output from the sample and hold circuit 7, that is, the signal S5 having slope information of the desired signal, is supplied to the terminal 5d of the correction circuit 5, the signal correction circuit 5 calculates the desired signal S5 having slope information. Based on the signal slope information, a correction signal is created that can linearly interpolate the missing part of the signal that occurred during the pulse noise mixed period in the input audio signal, and the correction signal is used to linearly interpolate the missing part of the signal. The signal S3 as shown in FIG.
is sent to the output terminal 8.

Next, with reference to FIG. 3, an example of the configuration of the differentiating circuit 6 and the sample and hold circuit 7, and the configuration and operation of the signal correction circuit 5 will be described. In FIG. 3, block 6 is a differentiating circuit 6, which includes a capacitor Cd, a resistor Rd, and an amplifier A3.
The block 7 is a sample and hold circuit 7, which is composed of a switch SWs, a capacitor C's, and an amplifier A4.

7a is a control signal S given as a sampling pulse.
The sample and hold circuit 7 is an input terminal of the switch SWs when the control signal S2 is at a high level, and causes the capacitor Cs to hold the signal level immediately before the switch SWs is turned off.

Block 5 is a signal correction circuit 5, and in the figure,
5a is an input terminal for the input audio signal, 5b is an output terminal, 5c is a supply terminal for the control signal S2, 5d is a supply terminal for the signal S5, A1 is the first amplifier, and A2 is the second amplifier.
The first amplifier A1 is of low output impedance and the second amplifier A2 is of high input impedance.

A switch SW that is turned off when the control signal S2 is at a high level is provided in the signal transmission path between the output side of the first amplifier A1 and the input side of the second amplifier A2. In addition, a charge storage capacitor C is provided between the input side of the second amplifier A2 and the ground, and a variable constant current circuit VC is provided on the input side of the second amplifier A2. The output side is connected.

In the example shown in the third diagram, the variable constant current circuit VC includes a phase inversion amplifier -A with a gain of -1, a transistor X1 whose emitter is connected to the positive power supply +VDC via a resistor R1, and the transistor described above. a transistor X2 whose collector is connected to the collector of transistor
Resistor R connected between and negative power supply -VDC
3, a series connection circuit of a variable resistor VR, and a resistor R4, the base of the transistor x1 is connected to the connection point of the resistor R3 and the variable resistor VR, and the base of the transistor and the connection point between the variable resistor VR and the variable resistor VR.

The variable resistor VR is used to correct imbalances in the circuit due to variations in the characteristics of the circuit's components, and if one circuit can be balanced correctly, it can be replaced with two fixed resistors. .

The variable constant current circuit VC operates in a standard operating state in which the voltages at two points are zero when the voltage at its terminal 5d is zero, and when the voltage at terminal 5d is positive, the voltage at two points is zero. The voltage at the point has the same positive polarity as the voltage at the terminal 5d, and when the voltage at the terminal 5d has negative polarity, the voltage at the two points has the same negative polarity as the voltage at the terminal 5d.

Therefore, the two points of the variable constant current circuit VC include terminals 5d and 5d.
Since a voltage appears with a polarity and a voltage value corresponding to the polarity and magnitude of the signal in the signal section indicating a constant signal level in the signal S5 given to If the capacitor C is connected, the capacitor C will be charged with a constant charging current determined in accordance with the signal level of the signal in the signal section indicating the constant signal level of the signal S5.

In the signal correction circuit 5 in FIG. 3, when the input audio signal Sl is not mixed with pulse noise, the control signal S2 supplied to the terminal 5c is at a low level, so the switch SW is turned on. Therefore, the input audio signal S supplied to the input terminal 5a
1 passes through the signal transmission path of first amplifier A1 → switch SW → second amplifier A → output terminal 5b, and is connected to input terminal 5.
a to the output terminal 5b.

At which time, the charge storage capacitor C connected between the signal transmission path described above and the ground shows a terminal voltage value according to the voltage value of the voltage transmitted to the signal transmission path described above. . In addition, in the above-mentioned state where no pulse noise is mixed into the input audio signal 81, the output terminal of the variable constant current circuit VC is connected to the switch Sw which is in the on state.
Since it is connected to the output side of the first amplifier A1 having an extremely low output impedance, such as approximately zero ohm, the current output from the variable constant current circuit VC of the variable constant current circuit VC has an extremely low output impedance of approximately zero ohm. Since the voltage generated by injecting into the output side of the first amplifier A1 having a low output impedance of approximately zero ohm is very small, the current generated by the variable constant current circuit VC is as follows. This does not cause any hindrance to the desired signal transmitted from the first amplifier A1 to the second amplifier A2.

Therefore, the signal to be supplied to the variable constant current circuit VC is as follows:
There is no need to extract and provide only the signal in the signal section showing a constant signal level in the signal S5, and the sample and hold circuit 7 is used to supply the variable constant current circuit VC.
The output signal S5 may be supplied as is.

Next, when pulse noise is mixed into the input audio signal Sl', the control signal S2 is generated corresponding to the period in which the pulse noise N1 to N3 is occurring, and the control signal S2 is generated during the high level period of the control signal S2. Switch SW is turned off. By turning off the previous switch sw,
The terminal voltage of the capacitor C is maintained at the signal level when the switch Sw is turned off (when the rPIJll signal S2 is set to high level).

Further, since the terminal 5d of the variable constant current circuit VC is supplied with a signal in the signal section indicating a constant signal level in the signal S5 in that state, the variable constant current circuit VC is supplied with the signal at its terminal 5d. A current having a polarity corresponding to the polarity of the received signal S2 and a constant current value corresponding to the signal level is output, thereby charging the charge storage capacitor C. The charging operation for the charge storage capacitor C is performed over a period in which pulse noise is occurring, and the terminal voltage of capacitor C increases linearly, but at the moment when the pulse noise is no longer mixed in. To,
Since the control signal S2 becomes low level and the switch Sw is turned on, the accumulated charge in the capacitor C is instantly discharged by the low output impedance of the first amplifier A1.

The variable constant current circuit VC receives a signal S5 supplied to the terminal 5d.
That is, by being driven by the signal S5 that includes the slope information of the desired signal in terms of polarity and a constant signal level, the polarity of the pulse S5 and the polarity and constant current value according to the signal level can be changed. A current flows into the charge storage capacitor C, and the terminal voltage of the capacitor C becomes the signal s5.
The polarity of the signal in the signal section showing a constant signal level is increased linearly with a slope corresponding to the signal level. Since the terminal voltage of the condenser C before being increased by the inflow of is the signal level of the input audio signal immediately before the switch SW is turned off, the period of the pulse noise mixed in the input audio signal S1 is It is clear that the signal loss that occurs in the signal corresponding to It has a waveform similar to .

In Fig. 2, f shows the correction signal for linear interpolation generated in the signal correction circuit 5 as a solid line, and the waveform of the desired signal in the absence of pulse noise as a dotted line. f in FIG. 2 is an explanatory diagram to facilitate understanding of the operation, and in actual operation, the signal correction circuit 5 outputs the second
A signal S3 as shown in C in the figure is output.

(Problems to be solved by the invention) The previously proposed pulse (
In the '1Jff sound reduction device, the signal supplied to input terminal 1 has a small signal level to white noise level ratio, and white noise with a relatively high signal level exists in the high range of the audio frequency band. In such a case, the white noise existing in the high frequency range is amplified by the differential operation of the differentiating circuit 6, so that the output signal from the sample and hold circuit 7 during the period in which pulsed noise occurs is Since the signal is a state in which the held portion of the amplified white noise is added to the held output signal of the desired signal,
A malfunction occurs in the interpolation operation performed during the period when pulse noise occurs, and not only does the signal interpolation during the signal missing period become incorrect, but also a new Conventional devices have the disadvantage that they cannot be well applied to signals from signal sources with a small signal level to white noise level ratio, due to problems such as noise generation.

(Means for Solving the Problems) The present invention provides a low-pass filter that connects the signal correction circuit and the differentiation circuit so that the low-frequency signal component in the output signal from the signal correction circuit is directly given to the differentiation circuit. In addition, a high-frequency signal component in the output signal from the signal correction circuit is provided between the signal correction circuit and the differentiation circuit in order to provide the high-frequency signal component in the output signal from the signal correction circuit to the differentiation circuit via the nonlinear circuit. By providing a series connection circuit of a filter and a nonlinear circuit, the nonlinear characteristics of the nonlinear circuit allow the signal from the signal source to be white even if the signal from the signal source has a small signal level to white noise level ratio. This makes it possible to easily obtain an output signal that is free from signal deterioration due to noise.

(Example) Hereinafter, specific contents of the pulse noise reduction device of the present invention will be described in detail with reference to the accompanying drawings. FIG. 4 is a block diagram of an embodiment of the pulse noise reduction device of the present invention, and FIG. 5 is a block diagram of an example configuration of a nonlinear circuit used in the pulse noise reduction device of the present invention. FIG. 6 is a circuit diagram, and FIG. 6 is an explanatory diagram of the operation of the nonlinear circuit.

In FIG. 4, components that are equivalent to each component in the pulse noise reduction device shown in FIG. 1 already described are given the same drawing symbols as those used in FIG. 1. .

In FIG. 4, 1 is an input terminal for an input audio signal S1 mixed with pulse noise, 2 is a delay circuit, and C8 is a delay circuit.
G is a control signal generation circuit composed of a pulse noise detection circuit 3 and a pulse shape shaping circuit 4, and this control signal generation circuit C8G detects pulse noise mixed in the input audio signal S1. A control signal S2 of pulse 1 corresponding to the period of existence of is generated.

Delay circuit 2 in FIG. The signal correction circuit 5, differentiation circuit 6, sample hold circuit 7, etc. are shown in Figures 1 and 3.
These components correspond to the delay circuit 2, signal correction circuit 5, differentiation circuit 6, sample hold circuit 7, etc. in the pulse noise reduction device explained with reference to the figure, and the components of each of these components are as follows. The specific configuration contents and operation description are as described in detail with reference to FIGS. 1 and 3.

In FIG. 4, the output signal S3 of the signal correction circuit 5 is sent to an output terminal 8, and is also sent to a low pass filter (low pass filter) 9 and a high pass filter (high pass filter) 10. given, the output signal S3b from the high-pass filter 10, that is, the high-frequency component S3 in the output signal S3 of the signal correction circuit 5
b is supplied to the nonlinear circuit 11. The output signal 83a from the low-pass filter 9 described above is given as one input to the adder circuit 12, and the output signal S'3c of the nonlinear circuit 11 is given as the other input to the adder circuit 12.
is given.

In the adder circuit 12 described above, the above-mentioned 2
The two signals S3a and S3c are added to form a signal 83', which is applied to the differentiating circuit 6. In the differentiating circuit 6, the above-mentioned signal 83''
A signal 84' which is differentiated is outputted and supplied to the sample and hold circuit 7, and a signal 85' outputted from the sample and hold circuit 7 is transmitted to the terminal 5d of the signal correction circuit 5
As a result, the signal correction circuit 5 performs the operation described above and sends out the signal S3 from the terminal 5b to the output terminal 8.

Now, the above-mentioned nonlinear circuit 11 may have a configuration as shown in FIG. 5 as a single component. In FIG. 5, Da and Db are diodes, Ra and Rh are resistors, and the nonlinear characteristics of this nonlinear circuit 11 are as follows.
The result is as shown by curve A in the figure.

The operation of the nonlinear circuit 11 described above will be explained below with reference to the characteristic curve diagram in FIG.

That is, when the high-frequency component S3b of the output signal S3 of the signal correction circuit 5 is given to the nonlinear circuit 11, the signal S3b becomes a state in which a slight loss over distortion B is given to it due to the nonlinear characteristic A of the nonlinear circuit 11. It is supplied from the nonlinear circuit 11 to the adder circuit 12 as an output signal S3c. On the other hand, the white noise component N given to the nonlinear circuit 11 does not appear in the output signal Sac of the nonlinear circuit 11 because it corresponds to the flat region C in the nonlinear characteristic A of the nonlinear circuit 11. 6. Therefore, if white noise N is mixed in the high-frequency component S3b of the output signal S3 from the signal correction circuit 5, which is supplied to the nonlinear circuit 11 via the high-pass filter 10, the white noise N is removed by the flat region C of the nonlinear characteristic A in the nonlinear circuit 11.

The influence of white flower noise on signal interpolation becomes greater as the No. 41 level of signal S1 supplied to input terminal 1 becomes smaller (
The smaller the ratio between the signal level of the signal S1 and the white noise level), the larger the white noise N mixed into the signal S3. This has a great effect on the pulse noise reduction device.

The influence of the nonlinear characteristic A of the nonlinear circuit 1'1 on the interpolation accuracy will be described as follows. That is, when the signal level of the input signal S1 is below the middle level, the crossover distortion in the output signal S3c of the nonlinear circuit n111 cannot be ignored, and the interpolation accuracy deteriorates slightly, but as described above, the signal correction circuit 5 By supplying the high frequency signal S3b in the output signal S3 to the nonlinear circuit 11, even if the interpolation accuracy is deteriorated.

According to the present invention, it is possible to obtain a major feature of not causing a large deterioration in sound quality due to random noise newly generated due to the influence of the white noise component, which is a problem that occurs when the nonlinear circuit 11 is not provided. The conventional problems mentioned above can be solved satisfactorily.

(Effects) As is clear from the above detailed explanation, the pulse noise reduction device of the present invention can simply attenuate the gain of the transmission system during a period in which pulse noise is mixed. Alternatively, the signal level during the period of pulsed noise is
Unlike the conventional pulse noise reduction device described above, which aims to reduce pulse noise by maintaining the signal level at the level just before the pulse noise, Since interpolation is also performed for missing signals that occur, it is possible to effectively reduce pulse noise without causing any unnaturalness to the auditory sense. Since it can be realized with a simple analog circuit, audio equipment with excellent performance can be easily provided at low cost.

Further, when the pulse noise reduction device of the present invention is applied to a signal from a signal source with a small input signal level to white noise level ratio, the low-frequency components of the signal are completely interpolated, and the signal Interpolation with sufficient precision can be easily performed for the high-frequency components of It can be effectively applied to reduce static noise, pop noise caused by dust or scratches on audio discs, dropout noise that occurs in audio signals due to signal defects in audio discs, and other pulse noises. Of course.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of the previously proposed pulse noise reduction device, Figs. 2 and 6 are waveform diagrams for explaining the operation, and Fig. 3 is a circuit of an example configuration of a signal correction circuit and its related circuits. FIG. 4 is a block diagram of a pulse noise reduction device of the present invention, and FIG. 5 is a circuit diagram of an example of the configuration of a nonlinear circuit. DESCRIPTION OF SYMBOLS 1... Input terminal, 2... Delay circuit, C8G... Control signal generation circuit, 5... Signal correction circuit, 6... Differential circuit, 7... Sample hold circuit, 8... Output terminal, 9...Low pass filter, 10...High pass filter, 11
...Nonlinear, circuit, 12...addition circuit, Patent applicant: To Victor Company of Japan, Ze, IQ゛Procedural correction band (voluntary) March 1982? ,・Mon; 31st 6-1 Mr. Kazuo Wakasugi, Commissioner of the Japan Patent Office 1゜Indication of the case Patent Application No. 37131 of 1982 2. Title of the invention もPulse noise reduction device [3. Case of the person making the amendment] Relationship with Patent Applicant Location 3-12 Moriya-cho, Kanayō-ku, Yokohama-shi, Kanagawa Name (43)
2) Victor Company of Japan Co., Ltd. 4, Agent Address: Tokyo Parts Medical Products 3-4819-915, 1920 (Shipping Date: 1920, Month, Day) 6, Subject of Amendment (1) Patent Claims in the Specification Scope column (2) Detailed explanation of the invention outside the specification Kiri 7, Contents of amendment (1) The scope of claims is amended as shown in the attached sheet. (2) "Naru." is replaced with "Naru," in line 18 of page 6 of the detailed loincloth.
Correct to. "2. Claim 1: means for detecting pulsed noise in an input audio signal containing pulsed noise and generating a control signal having a pulse width corresponding to the period during which the pulsed noise occurs. , a delay circuit having a delay time approximately equal to the time difference between a control signal generated by the control signal generating means described above in response to pulsed noise in the input audio signal, and the control signal and the corresponding pulsed noise; means for delaying an input audio signal containing pulse noise, the above-described control signal is supplied as a timing signal for operation, and a means for delaying a desired signal during a period in which pulse noise occurs in the input audio signal. The signal correction circuit described above is configured to perform a pulse noise removal operation and a linear interpolation operation for a desired signal during a period in which pulse noise is present by being supplied with a signal having slope information. 'Means for providing an output signal of the delay circuit;
means for sending the output signal from the signal correction circuit to an output terminal; a means for sending the output signal from the signal correction circuit to the adder circuit via a low-pass filter; means for providing an output signal to the adder circuit through a series connection circuit of a high-pass filter having the same cutoff frequency as the low-pass filter and a nonlinear circuit; 1. an output signal from the adder circuit; means for applying the output signal of the differentiating circuit to a sample-hold circuit to which the above-mentioned control signal is supplied as a sampling pulse; Pulse noise reduction comprising means for outputting a signal having slope information of the desired signal during the period in which it is occurring and providing it to the signal correction circuit described above! 2. As a signal correction circuit, charging operation using the output current of the variable constant current circuit to the charge storage capacitor is performed only during the period when pulse noise is occurring, and discharging operation is performed instantaneously at the end of the aforementioned period. Pulse noise reduction U3 according to claim 1 using a nonlinear circuit configured as described above, transmits only a signal indicating a signal level higher than a preset reference input level,
The pulse noise reduction device 4 according to claim 1, which uses a device configured to attenuate and block a low-level desired signal such as a white noise level or white noise, as a signal correction circuit, A first amplifier with a low output impedance, a second amplifier with a high input impedance, and a signal transmission path from the first amplifier to the second amplifier are provided, and pulse noise is generated. a variable constant current circuit that operates so that an output current value is determined by a signal having slope information of a desired signal during a period in which pulse noise is occurring; 5. As a variable constant current circuit for reducing pulse noise according to claim 1, using a device in which the output side and the charge storage capacitor are connected to the input side of the second amplifier described above. , the current value is set according to the signal level of the input signal thereto, and a constant current output of the polarity of the input signal thereto is obtained. Reduction of pulse noise described in Section 1■

Claims (1)

[Claims] 1. Means for detecting pulse noise in an input audio signal including pulse noise and generating a control signal having a pulse width corresponding to the period during which the pulse noise is present. , by a delay circuit having a delay time substantially equal to the time difference between a control signal generated by the control signal generating means described above in response to pulsed noise in the input audio signal and the corresponding pulsed noise. , a means for delaying an input audio signal containing pulse noise; and a means for delaying an input audio signal containing pulse noise, the control signal described above being supplied as a timing signal for operation, and delaying a desired signal during a period in which pulse noise is occurring in the input audio signal. By supplying a signal having slope information of means for providing an output signal of the delay circuit;
means for sending the output signal from the signal correction circuit to an output terminal; and means for feeding the output signal from the signal correction circuit to the addition circuit via a low-pass filter; means for supplying the output signal of the filter to the adder circuit through a series connection circuit of a high-pass filter having the same cutoff frequency as the low-pass filter and a nonlinear circuit; means for supplying the output signal of the differential circuit to a differentiating circuit; means for supplying the output signal of the differential circuit to the sample Honol H circuit to which the aforementioned control signal is supplied as a sampling pulse; A pulse noise reduction circuit 2 comprising means for outputting a signal having slope information of a desired signal during a period in which pulse noise is occurring in an input audio signal and applying it to the signal correction circuit described above. As a signal correction circuit, the charging operation using the output current of the variable constant current circuit to the charge storage capacitor is performed only during the period when pulse noise is occurring, and the discharging operation is performed instantaneously at the end of the said period. The pulse noise reduction circuit 3 according to claim 1 is configured as a nonlinear circuit, and transmits only a signal showing a signal level higher than a preset reference input level, The pulse noise reduction device 4 according to claim 1, which uses a device configured to attenuate and block a low level desired signal such as a white noise level or white noise, as a signal correction circuit, A first amplifier with a low output impedance, a second amplifier with a high input impedance, and a signal transmission path from the first amplifier to the second amplifier are provided, and pulse noise is generated. a variable constant current circuit that operates so that an output current value is determined by a signal having slope information of a desired signal during a period in which pulse noise is occurring; Pulse noise reduction circuit 5 according to claim 1, in which the output side and the charge storage capacitor are connected to the input side of the second amplifier, as a variable constant current circuit ，
Claim No. 1, wherein a current value is set according to the signal level of an input signal to the input signal, and a constant current output having the polarity of the input signal to the input signal is obtained. Pulse noise reduction circuit described in Section 1