JPS62286304A - Pulsive noise reducing device - Google Patents

Abstract

PURPOSE:To effectively reduce pulsive noise without unnaturality in audible sense by applying linear interpolation tying a signal level at the start point of the existing period of the pulsive noise invaded in an input audio signal and that at an end point. CONSTITUTION:If the input audio signal S1 includes pulsive noise, 1st-3rd switches SW3 are turned off by a control signal S2 sent from a control signal generating circuit CSG during the period to shut off the signal for the period. A 1st capacitor Ch1 keeps the signal level at the end of the period of pulsive noise and a 2nd hold capacitor Ch2 holds the signal level at the start of the pulsive noise period. A terminal voltage across a linear interpolation capacitor C is changed on a line tying the terminal voltage of the capacitor Ch1 and the inversion of the terminal voltage across the capacitor Ch2. Thus, the signal during the period of pulsive noise existence is subjected to linear interpolation in an excellent way.

Description

Detailed Description of the Invention 3. Detailed Description of the Invention (Field of Industrial Application) The present invention relates to audio signal systems in audio equipment, radio receivers, television receivers, video disc players, and other equipment. Contaminated from outside /
The present invention relates to a pulse noise reduction device that can reduce pulse noise in an audible manner.

(Prior art) Pulse noise 1, for example, ignition noise of a car or pulse noise generated in other electrical equipment, is applied to the audio signal system of various equipment such as electrical equipment or electronic equipment that has an audio signal system. It is well known that when audio signals are mixed in, the quality of audio signals deteriorates.

Conventionally, methods for reducing the quality deterioration of audio signals caused by the above-mentioned pulse noise include (a) reducing the gain of the signal transmission system during the period in which pulse noise occurs, or A method that attempts to reduce pulse noise by cutting off the transmission system (reducing the gain to zero... employing a squelch circuit);
(b) The most common method is to try to reduce pulse noise by maintaining the signal level of the signal during the pulse noise period at the signal level immediately before the pulse noise period. It has been put into practical use as a means of reducing noise.

(Problems to be Solved by the Invention) However, the conventional pulse noise reduction means as described in (a) and (b) above have the disadvantage that the signal is lost during the period of the pulse noise. , (a) mentioned above, (
Even by applying the method (b), there has been a problem that a sufficient noise reduction effect cannot be obtained.

Therefore, in order to interpolate the signal loss that occurs during the noise period, after converting the analog signal to a digital signal, a correction signal corresponding to the signal loss portion is created by applying the linear prediction method, and the correction signal is used to eliminate the noise. Although interpolation of signals with periods of Such solutions have not been applied to inexpensive general audio equipment.

Now, as mentioned above, when the pulse noise mixed in the signal is reduced, it is possible that the signal loss occurs in correspondence with the period of existence of the pulse noise. However, in order to solve the aforementioned problems, it is necessary to use complex and expensive circuits to interpolate the missing parts of the signal. However, it is difficult to apply it to general audio equipment.

There has been a need for good measures to solve the above-mentioned problems.

(Means for Solving the Problems) The present invention detects pulse noise contained in an input audio signal, and detects a signal having a pulse width corresponding to the period in which the pulse noise occurs. a control signal generating means for generating a control signal from the end of the period in which the pulse noise is occurring; means for obtaining a delayed input audio signal by applying the delayed input audio signal to the input audio signal; first to third switches that are controlled to be turned off only during the period of the pulse d of the control signal by the control signal; A first signal holding means is provided on the output side of the first switch that controls opening and closing of the human input audio signal, and a first signal holding means is provided on the output side of the second switch that controls opening and closing of the delayed input audio signal. a linear interpolation capacitor provided on the output side of the third switch for controlling the opening/closing of the delayed input audio signal; and the first signal holding means. means for supplying the output signal to the linear interpolation capacitor via the first voltage-current conversion means;
A pulse noise reduction device comprising means for inverting the phase of the output signal from the second signal holding means and supplying the output signal to the linear interpolation capacitor via the second voltage-current conversion means. This solves the problems of the conventional method.

(Example) Hereinafter, specific contents of the pulse noise reduction device of the present invention will be explained in detail with reference to the accompanying drawings.

FIG. 1 is a block diagram of an embodiment of the pulse noise reduction apparatus of the present invention, and FIG. 2 is a waveform diagram for explaining the operation of the pulse noise reduction apparatus shown in FIG. 1.

In FIG. 1 described above, 1 and 3 are input terminals of a pulse noise reduction device, and this input terminal 1 receives the input audio signal SL (second I12! a) ref.) is supplied. Further, 2 is an output terminal of the pulse noise reduction device, and from this output terminal 2 is output an output audio signal in which the existence period of the pulse noise in the input audio signal is linearly interpolated. . In FIG. 1, the dotted line connecting input terminals 1 and 3 indicates the connection when input terminal 3 is not provided.

In FIG. 1, C8G is a control signal generation circuit,
In the example shown in the first diagram, this control signal generation circuit C8G is composed of a pulse noise detection circuit 4, a waveform shaping circuit 5, and a delay circuit 6, and includes an input audio signal S1.
The pulse noise mixed in the pulse noise is detected, and a signal having a pulse width τ corresponding to the period in which the pulse noise occurs is detected from the end of the period in which the pulse noise occurs. It is sent out as a control signal S2 (see (g) in FIG. 2).

SWI to SW3 are first to third switches, and the first to third switches SWI to SW3 are configured to be in the OFF state only during the period of the pulse width τ of the control signal. Switching is controlled by control signals.

In addition, in Fig. 1, C is a capacitor for linear interpolation;
hi, Ch2 is a hold capacitor, R1°R2 is the first. The second resistors 7, 9, and 12 are amplifiers, and 11 is an amplifier having a phase inversion function. The input audio signal S1 supplied to the input terminal 1 is amplified by the amplifier 7 having a low output impedance and then supplied to the delay circuit 8 and the first switch SWl.

The delay circuit 8 applies a time delay τ approximately equal to the period τ of the pulse noise occurring in the input audio signal S1 supplied to the input terminal 1 to the input audio signal S1. A delayed input audio signal Sld as shown in FIG. 2(b) is output and supplied to the second switch SW2 and the third switch SW3.

Now, as shown in FIG. 2(a), the input audio signal S1 supplied to the input terminal 1 of the pulse noise reduction device is pulsed during the periods to-+tl and t3→t4, respectively. If it contains sexual noise, the first to third switches SW3 switch from time tl to t2.
It is turned off by the control signal S2 sent from the control signal generation circuit C5G during the period from t4 to t5.

Thereby, the first switch SWI described above.

The input audio signal S1 being supplied to it
The signals during the period from time t1 to t2 and the period from time t4 to t5 are cut off, and the second and third switches SW2, . SW3 cuts off the signals in the period from time t1 to t2 and the period from time t4 to t5 in the delayed input audio signal Sld supplied thereto.

As described above, since the first hold capacitor Chi is provided on the output side of the first switch SW1 that controls opening and closing of the input audio signal S1, the first hold capacitor Chi is connected to the input at time t1. The signal level of the audio signal s1 at time t1 is held, and at time t4, the signal level of the input audio signal S1 at time t4 is held, but as described above, the input audio held by the first hold capacitor Chi As is clear from FIG. 2(a), the signal level of the signal S1 is the signal level at the end of the existence period of the pulse noise mixed in the input audio signal S1. .

Furthermore, since the second hold capacitor Ch2 is provided on the output side of the second switch SW2 that controls the opening and closing of the delayed input audio signal S1d as described above, the second hold capacitor Ch2 is Time t
At time 1, the signal level at time t1 in the delayed input audio signal Sld is held, and at time t4, the signal level at time t4 in the delayed input audio signal Sld is held, but as described above, the second hold capacitor Ch2 The delayed input audio signal S held at
As is clear from FIG. 2(a), the signal level of 1d is the same as the delayed input audio signal Sl.
The signal level at the beginning of the existence period of the pulsed noise mixed in d (this is the same as the signal level at the beginning of the existence period of the pulsed noise mixed in the input audio signal SL) be.

The terminal voltage of the first hold capacitor Chi described above is amplified by the amplifier 10 with high input impedance, and then the first resistor R1 having a high resistance value is connected as a signal 34 (see (d) in FIG. 2). The terminal voltage of the second hold capacitor Ch2 is amplified by the amplifier 11 which functions as a phase inverter, and is then applied to the input side of the amplifier 12 via the signal S3 ((c ) is applied to the input side of the amplifier 12 via a second resistor R2 having a high resistance value.

By the way, the above-mentioned 1. As the second resistors R1 and R2, those having high resistance values are used as described above,
Further, by using an amplifier 12 having a high input impedance, the signals S4 and S3 are converted into voltages and currents, and are supplied as constant currents to the input side of the amplifier 12. It will be done.

During the period in which the high-level control signal S2 is being sent from the control signal generation circuit C8G, the third switch SW3 is turned off.
In this state, the above-mentioned constant current obtained by converting the signal S4 into voltage and current, and a constant current obtained by converting the signal S3 into voltage and current, are supplied to the linear interpolation capacitor C provided on the input side of the amplifier 12. However, as is clear from the explanation of the configuration described above,
Since one of the two signals S3 and S4 has its phase inverted by the amplifier 11 having a phase inversion function, the signal S4 is a voltage-current converted current, and the signal S3 is a voltage. The converted currents have polarities opposite to each other, and therefore, the linear interpolation capacitor C provided on the input side of the amplifier 12 has a polarity between the signals S4 and S3. It will be charged by a constant current corresponding to the difference signal, and the terminal voltage of the linear interpolation capacitor C will be the second
It will be in a state where it is rising at a constant slope like the straight line work shown in (e) of the figure.

The state of change in the terminal voltage of this linear interpolation capacitor C is determined by the signal level at the beginning of the existence period of the pulse noise mixed in the input audio signal SL and the pulse noise mixed in the input audio signal 48 S1. This is a straight line that connects the signal level at the end of the existence period of the input audio signal S1. Therefore, in the pulse noise reduction device of the present invention shown in FIG. The output signal S5 (see (f) in FIG. 2) whose existence period is well linearly interpolated can be sent to the output terminal 2.

As can be seen from the above explanation of the operation, the straight line provided on the input side of the amplifier 12 is charged by a constant current obtained by converting a signal corresponding to the difference between the signal S4 and the signal S3 into voltage and current. As is clear from the above, the manner in which the terminal voltage of the interpolation capacitor C changes depends on the signal level at the beginning of the existence period of the pulse noise mixed in the input audio signal S1 and the input audio signal S1. It is a straight line that connects the signal level at the end of the existence period of the pulse noise mixed in with the signal, but the direction of its slope depends on the slope of the original signal to which linear interpolation is applied. (e) in Figure 2 during the period from time t1 to t2 or from time t4 to t5 depending on whether
Linear interpolation may be performed with each line rising at a predetermined slope, as in the example shown in Figure 2, or vice versa, as in the example shown in Figure 2(a). (Needless to say, interpolation is performed using a straight line with a slope of , the first to third switches SW1 to SW3 are turned on, and the input side of the amplifier 12 has a low output impedance through the third switch SW3, which is turned on. Since it is connected to the output side of the amplifier 9 for viewing, in this state, the first. The above two currents supplied via the second resistors R1 and R2 flow toward the output side of the amplifier 9 which exhibits the low output impedance, so the linear interpolation capacitor is also affected by the above two currents. C will not be charged and the output signal S5 will not be adversely affected due to the presence of the aforementioned signals 33,34.

(Effects) As is clear from the above detailed explanation, the pulse noise reduction device of the present invention detects the pulse noise contained in the input audio signal, and detects the pulse noise that is generated. control signal generating means for generating a signal having a pulse width corresponding to the period in which the pulse noise occurs as a control signal from the end of the period in which the pulse noise occurs; and a pulse occurring in the input audio signal. means for obtaining a delayed input audio signal by applying a time delay approximately equal to the period of the sexual noise to the input audio signal; first to third switches; a first signal holding means provided on the output side of the first switch that controls opening and closing of the input audio signal; and a first signal holding means that controls opening and closing of the delayed input audio signal. A second signal holding means provided on the output side of the second switch, and a linear interpolation capacitor provided on the output side of the third switch that controls opening/closing of the delayed input audio signal. and means for supplying the output signal from the first signal holding means to the linear interpolation capacitor via the first voltage-current conversion means; A device for reducing pulse noise according to the present invention, comprising means for inverting the phase and then supplying the voltage to the linear interpolation capacitor via a second voltage-current conversion means. The device determines the signal level at the beginning of the existence period of the pulsed noise mixed in the input audio signal S1, and the signal level at the end of the existence period of the pulsed noise mixed in the input audio signal SL. An output signal subjected to linear interpolation that connects can be generated by a device with a simple circuit configuration, and the pulse noise reduction device of the present invention
The gain of the transmission system is simply attenuated during the pulse noise period, or the signal level during the pulse noise period is maintained at the signal level of the signal immediately before the pulse noise. Unlike the conventional pulse noise reduction device described above, which aims to reduce pulse noise, it also interpolates the signal loss that occurs during the period of pulse noise. It is possible to effectively reduce pulse noise without causing any unnaturalness, and the circuit configuration for interpolating missing No. 48 can be realized with a simple analog circuit. The pulse noise reduction device of the present invention can easily provide audio equipment with excellent performance at low cost. It can be effectively used to reduce noise, pop noises caused by dust or scratches on audio discs, dropout noises that occur in audio signals when video disc signals are missing, and other pulse noises. Note that the pulse noise reduction device of the present invention is used to reduce pulse noise when the period of existence of the pulse noise, which is a problem, is always approximately constant. When used to reduce pulse noise that occurs during the switching period of a rotating magnetic head in a magnetic recording/reproducing device, the delay circuits 6 and 8 used in the device are used to reduce the pulse noise that causes the problem described above. Since it is sufficient to use the delay circuits 6 and 8 whose delay time is set to be equal to the length of the existence period of the pulse noise, it is easy to effectively reduce pulse noise with a device having a simple configuration.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of the pulse noise reduction device of the present invention, and FIG. 2 is a waveform diagram for explaining the operation of the pulse noise reduction device. 1.3... Input terminal of pulse noise reduction device, 2.
... Output terminal of pulse noise reduction device, 4... Pulse noise detection circuit, 5... Waveform shaping circuit, 6, 8...
- Delay circuit, 7, 9.12... Amplifier, 11... Amplifier having a phase inversion function, C3G... Control signal generation circuit, SWI to SW3... First to third switches. R1, R2... 1st. Second resistor, C...Linear interpolation capacitor, Chi, Ch2...Hold capacitor, patent applicant: Victor Japan Co., Ltd., agent, patent attorney, Takao Konma, ? ,゛1. )C
ノ≧Shi, -1,5W2

Claims (1)

[Claims] Pulse noise contained in the input audio signal is detected, and a signal having a pulse width corresponding to the period in which the pulse noise occurs is detected at the end of the period in which the pulse noise occurs. means for generating a control signal as a control signal from the input audio signal; and means for obtaining a delayed input audio signal by applying a time delay approximately equal to the period of pulse noise occurring in the input audio signal to the input audio signal. and the first to third switches controlled to be turned off only during the pulse width period of the control signal by the control signal, and the output of the first switch that controls opening and closing of the input audio signal. a first signal holding means provided on the side, a second signal holding means provided on the output side of the second switch for controlling opening/closing of the delayed input audio signal, and a second signal holding means provided on the output side of the second switch for controlling opening/closing of the delayed input audio signal; The output signal from the linear interpolation capacitor provided on the output side of the third switch that controls opening/closing of the audio signal and the first signal holding means is transferred to the first voltage-current converting means. means for supplying the linear interpolation capacitor to the linear interpolation capacitor;
and means for inverting the phase of the output signal from the signal holding means and supplying the output signal to the linear interpolation capacitor via the second voltage-current conversion means.