JPH05199431A - Clamping circuit - Google Patents

Abstract

PURPOSE:To prevent the color deviation and the luminance difference on a reproduced picture by switching the reference voltage of an operational amplifier for level shift in accordance with input switching by a voltage compensating means to prevent the variance of a clamp voltage for input switching with a simple constitution. CONSTITUTION:An electronic analog switch 27 is switched in accordance with switching of an input changeover switch 3 accompanied with input switching and is turned on at the time of selecting a BS tuner but is turned off at the time of not selecting it. Consequently, a resistance 28 is connected in parallel to a voltage dividing resistance 25 and an offset voltage Vr of the slide piece of a variable resistance 21 is raised to a value higher than that for non-selection of the BS tuner when the BS tuner is selected. When the offset voltage Vr rises, an output voltage Vc0 of an operational amplifier 20 at the time of input rises, and a DC voltage (clamp voltage) Va at a point (a), namely, a voltage Va1 rises. At this time, the voltage Va1 is equalized to a voltage Va2 by setting of the resistance value of the resistance 28 to prevent the variance of the clamp voltage accompanied with switching of the clamp time constant.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a reception M of a BS tuner.
The present invention relates to a clamp circuit for performing a clamp process on a high-definition signal on which an energy diffusion signal such as a USE signal is superimposed and a high-definition signal on which an energy diffusion signal such as a reproduction MUSE signal of a laser disk is not superimposed.

[0002]

2. Description of the Related Art Conventionally, BS tuners have been used for MUSE decoders.
Receiving MUSE signal and reproducing MU such as laser disk
For clamping the SE signal, there is a clamp circuit shown in FIG.

In the figure, 1 is an input terminal on the BS tuner side, 2 is an input terminal on the auxiliary input side, 3 is an input selector switch, 4 is an input amplifier, and 5 is an 8.1 MHz low frequency band limiter. A pass filter, 6 is a transistor for impedance conversion, 7 is a clamp processing unit, and two electronic analog switches 8 and 9 for switching a clamp time constant, a capacitor 10 for cutting a direct current, and a resistor 11 for a time constant. , 12, and FETs 13 and 14 for output.

Reference numeral 15 is an amplifier for a buffer, and 16 is an A / D.
The converter 17 is a MUSE decoder digital main circuit unit, and has a digital decoder function of the MUSE signal and various control functions. Reference numeral 18 is a feedback control unit for detecting the clamp level and outputting the error voltage of the main circuit unit 16, and 19 is a clamp voltage generating unit. The control unit 18, the operational amplifier 20 for level shifting, and the reference voltage of this amplifier 20 are used. It is composed of a variable resistor 21 for setting an offset voltage, etc., and forms a clamp circuit together with the clamp processing unit 7.

Incidentally, + V and + B are positive power supply terminals, and -V and-.
B is a negative power supply terminal, 22 is an emitter resistance of the transistor 6, 23 and 24 are input resistances and feedback resistances of the amplifier 20, 2
Reference numerals 5 and 26 denote voltage dividing resistors between the power supply terminals + B and -B and both ends of the variable resistor 21.

When the input MUSE signal of the BS tuner is input (when the BS tuner is selected) by changing the input selector switch 3, the received MUSE signal of the input terminal 1 is changed to the input selector switch 3 and the input amplifier 4. , A low-pass filter 5 and a transistor 6 are supplied to the clamp processing unit 7, and when a reproduction MUSE signal of a laser disk or the like is input (B
When the S tuner is not selected), the reproduced MUSE signal from the input terminal 2 is supplied to the clamp processing unit 7 via the input changeover switch 3, the input amplifier 4, the low pass filter 5 and the transistor 6.

The clamp processing unit 7 cuts the DC component of the input MUSE signal by the capacitor 10 and performs clamp processing on the signal having the DC component as the clamp voltage supplied from the clamp voltage generation circuit 19. By the way, receive M
The USE signal is superposed with a triangular wave energy diffusion signal having a period of 30 Hz and a frequency shift of 600 KHz. If the diffusion signal is not sufficiently removed, vertical lines and flicker interference appear on the reproduced screen.

On the other hand, although the energy diffusion signal is not superimposed on the reproduced MUSE signal, a clamp error is apt to occur due to a dropout due to a scratch on the disk, and when this error occurs, bright line interference occurs on the reproduction screen.

Then, the receiving process is performed by the clamp process.
In order to sufficiently remove the energy spread signal from the signal, when the received MUSE signal is input, the BS tuner side clamp control pulse S1 is output from the main circuit section 17 in synchronization with the horizontal sync signal (HD) of the MUSE signal. By this pulse S1, the electronic analog switch 8 is turned on within each HD period, and the clamp time constant of the clamp processing unit 7 becomes a small time constant of the resistor 11 and the capacitor 10 that follow the energy diffusion signal.

When the reproduction MUSE signal is input, an auxiliary input side clamp control pulse S2 is output from the main circuit section 17 in synchronization with HD, and the pulse S2 turns on the electronic analog switch 9 within each HD period. Thus, the clamp time constant of the clamp processing unit 7 is switched to the large time constant of the resistor 12 and the capacitor 10 which do not follow the sudden fluctuation due to the dropout. Note that the resistance 12 is about 10 times larger than the resistance 11.

The MUSE signal clamped by the clamp processing unit 7 is supplied to the A / D converter 16 via the amplifier 15, converted into a digital signal by the converter 16 and supplied to the main circuit unit 17. , This main circuit part 1
7, the time axis expansion, interpolation, TCI decoding, etc. are applied to the base band video signal (high definition signal)
Is reconstructed.

The DC level (clamp level) of the clamped MUSE signal is aligned with the reference level corresponding to the center value of the input range of the A / D converter 16, and the digital conversion of the converter 16 is accurately performed. Therefore, the clamp control unit 18 in the main circuit unit 17 digitally detects the deviation of the DC level of the digitally converted MUSE signal supplied to the main circuit unit 17 from the reference level, and changes according to this deviation. Error voltage.

The error voltage is amplified by the operational amplifier 18 to form a clamp voltage, and the clamp voltage supplied to the clamp processing unit 7 is feedback controlled. The MUSE signal has line numbers 563 and 112.
A clamp level signal is included in line 5. Then, the clamp control unit 18 eliminates and detects sudden fluctuations, so that the average value of the clamp level signals of both lines is set as the detected value of the DC level.

Further, if the clamp voltage is largely deviated at the time of input switching and it takes time to pull in the feedback control, color deviation of the reproduced screen, luminance fluctuation, etc. occur during that time. Therefore, at the time of input switching, etc. The error voltage output from the clamp controller 18 is always the predetermined initial set voltage,
Moreover, the offset voltage of the operational amplifier 18 is adjusted in advance by adjusting the variable resistor 21 so that the DC voltage (clamp voltage) Va at the point a in FIG. 3 based on the set voltage becomes the specified voltage.

[0015]

In the conventional clamp circuit of FIG. 3, there is a problem that the DC voltage (clamp voltage) Va at the point a at the time of input switching fluctuates according to the clamp time constant.

That is, the error voltage output from the clamp controller 18 is Ve, and the resistance values of the resistors 23 and 24 are R.
Assuming that the offset voltage of the sliding piece of the variable resistor 21 connected to the non-inverting input terminal (+) of the operational amplifier 20 is adjusted to Vr by 23 and R24, the voltage of the inverting input terminal (-) of the operational amplifier 20 is set. Also becomes Vr, and the following formula 1 holds for the output voltage Vc of the operational amplifier 20 and the error voltage Ve.

[0017]

## EQU1 ## (Ve-Vc) / (R23-R24) = (Ve-Vr) / R23

Based on the equation (1), the output voltage Vc is given by the following equation (2).

[0019]

## EQU00002 ## Vc = (1 + R24 / R23) Vr- (R24 / R23) Ve

Further, the initial set voltage of the error voltage Ve at the time of input switching is set to Ve _0, and the output voltage Vc at this time is set.
Is Vc ₀ , the output voltage Vc _{0 at the} time of input switching becomes a prescribed constant voltage shown by the following equation (3).

[0021]

## EQU00003 ## Vc ₀ = (1 + R24 / R23) Vr− (R24 / R23) Ve ₀

One line period (one horizontal scanning period)
If the charging time constant is sufficiently small and the discharging time constant is sufficiently large as compared with the above, the DC voltage Va at the point a of the clamp processing unit 7 is the same as that of the resistors 11 and 12 that determine the clamping time constant. It is not affected and is held at Vc ₀ when the input is switched.

However, in practice, the influence of the leak current and the internal capacitance when the electronic analog switches 8 and 9 are off cannot be ignored, so that the electronic analog switch 8 is switched when the input is switched to the BS tuner selection. Based on this, the voltage on the output side of the switch 8 changes, for example, as shown by the solid line in FIG. 5 changes, for example, as shown by the solid line in FIG. 5, and in either case, the voltage when the switches 8 and 9 are off after the transient change becomes higher than the voltage Vc _{0 of the} on period Ton.

Further, when the BS tuner is selected, the output voltage of the electronic analog switch 8 is smoothed by the low-pass filter of the capacitor 10 and the resistor 11, and the DC voltage Va at point a immediately after the input is switched is shown by the broken line in FIG. As shown, the voltage Vc ₀
It becomes higher Va ₁ , and when the BS tuner is not selected, the output voltage of the electronic analog switch 9 is the capacitor 10 and the resistor 1
The DC voltage Va at the point a immediately after the input is switched is smoothed by the low-pass filter of No. 2 and is the voltage V as shown by the broken line in FIG.
Va ₂ is higher than c ₀ . Then, Va ₂ > Va ₁ is established based on the magnitude of the clamp time constant, and the clamp voltage at the time of input switching fluctuates according to the clamp time constant.

If the clamp voltage at the time of switching the input is changed and is different between when the BS tuner is selected and when the BS tuner is not selected, for example, the clamp voltage at the time of switching the input to the BS tuner non-selection becomes large. Even if the variable resistor 21 is adjusted so as to be Vc ₀ and the offset voltage of the operational amplifier 20 is changed, the clamp voltage at the time of switching the input to select the BS tuner deviates from Vc ₀ .

Then, the difference of the clamp voltage at the time of switching the input appears as the color shift and the brightness difference of the reproduction screen, and the reproduction quality is deteriorated. It is an object of the present invention to prevent fluctuations in clamp voltage when switching inputs with a simple configuration.

[0027]

In order to achieve the above-mentioned object, in the clamp circuit of the present invention, the reference voltage of the operational amplifier for level shifting of the clamp voltage generating section is switched in association with the input switching. And a voltage compensating means for compensating for a shift in clamp voltage due to switching of the clamp time constant of the unit.

[0028]

In the clamp circuit of the present invention constructed as described above, the reference voltage of the operational amplifier for level shifting is switched by the voltage compensating means in synchronism with the input switching.
Reproduction MUS of high-definition signal and laser disc on which energy spread signal such as tuner received MUSE signal is superimposed
The amplification amount (level shift amount) of the error voltage is different from that of the high-definition signal on which the energy diffusion signal such as the E signal is not superimposed, so that the clamp voltage to be formed is different.

Then, the shift of the clamp voltage due to the switching of the clamp time constant is canceled by the difference of the clamp voltage due to the switching of the reference voltage, and the fluctuation of the clamp voltage at the time of switching the input is prevented.

[0030]

EXAMPLES Examples will be described with reference to FIGS.

(One Embodiment) First, one embodiment will be described with reference to FIG. 1, the same reference numerals as those in FIG. 3 indicate the same or corresponding ones, and the difference from FIG. 3 is that the series circuit 2 of the electronic analog switch 27 and the resistor 28 is used.
The voltage compensating means formed by 9 is connected in parallel to the voltage dividing resistor 25.

The electronic analog switch 27 is switched in association with the switching of the input selector switch 3 associated with the input switching, and is turned on when the BS tuner is selected and turned off when the BS tuner is not selected. Therefore, when the BS tuner is selected, the resistor 28 is connected in parallel to the voltage dividing resistor 25, and the offset voltage Vr of the sliding piece of the variable resistor 21 is higher than when the BS tuner is not selected.

When the offset voltage Vr rises, the output voltage Vc ₀ of the operational amplifier 20 at the time of the input device rises, as is clear from the equation (3), and the DC voltage (clamp voltage) Va at the point a, that is, The voltage Va _{1 in} FIG. 4 also rises. At this time, by setting the resistance value of the resistor 28, the voltage Va ₁ is made equal to the voltage Va ₂ in FIG. 5 to prevent the fluctuation of the clamp voltage due to the switching of the clamp time constant.

Therefore, the variable resistance 21 causes the voltage Va to rise.
_If the offset voltage Vr when the BS tuner is not selected is set so that ₂ becomes Vc ₀ , in both cases of input switching to BS tuner selection and input switching to BS tuner non-selection. Also, the DC voltage Va becomes Vc _0, and the feedback control of the clamp voltage is quickly pulled in, and the color shift and the luminance difference of the reproduced screen due to the switching of the clamp time constant are prevented.

(Other Embodiment) Next, another embodiment will be described with reference to FIG. In FIG. 2, the same reference numerals as those in FIG. 1 indicate the same or corresponding ones. The difference from FIG. 1 is that instead of providing the series circuit 29 of the electronic analog switch 27 and the resistor 28 of FIG. The voltage compensating means formed by the series circuit 32 of 31 is connected in parallel to the voltage dividing resistor 26, and the electronic analog switch 29 is turned off when the BS tuner is selected and turned on when the BS tuner is not selected.

Also in this case, when the BS tuner is selected, the offset voltage Vr is higher than when it is not selected, and the same effect as that of the first embodiment can be obtained.

In both of the above embodiments, the high-definition signal on which the energy spread signal is superimposed is received MUSE.
MU that reproduces high-definition signals that have not been superimposed as signals
Although the SE signal has been described, it goes without saying that each may be a high-definition signal other than the MUSE signal, for example, a high-definition signal that is not band-compressed. Also,
Needless to say, the present invention can be applied to the case where high-definition signals of three or more types of sources are supplied by input switching.

[0038]

Since the present invention is constructed as described above, it has the following effects. The reference voltage of the operational amplifier for level shifting is switched by the voltage compensating means in conjunction with the input switching, and the reception MUS of the BS tuner is changed.
The high-definition signal on which the energy diffusion signal such as the E signal is superimposed and the high-definition signal on which the energy diffusion signal such as the reproduction MUSE signal of the laser disc is not superimposed are different in amplification amount (level shift amount) of the error voltage and are formed Difference occurs in the clamp voltage, and the difference in the clamp voltage at the time of input switching due to the switching of the clamp time constant of the clamp processing unit is canceled by this voltage difference. This prevents the deviation and eliminates the deviation, prevents the color deviation and the brightness difference of the reproduction screen, and improves the reproduction quality.

[Brief description of drawings]

FIG. 1 is a connection diagram of an embodiment of a clamp circuit according to the present invention.

FIG. 2 is a connection diagram of another embodiment of the present invention.

FIG. 3 is a connection diagram of a conventional example.

FIG. 4 is an explanatory diagram of a clamp voltage when the BS tuner of FIG. 3 is selected.

5 is an explanatory diagram of a clamp voltage when the BS tuner of FIG. 3 is not selected.

[Explanation of symbols]

7 Clamp Processing Section 19 Clamp Voltage Generation Section 20 Level Shift Operational Amplifier 29, 32 Series Circuit of Electronic Analog Switch and Resistor Forming Voltage Compensating Means

Claims (1)

[Claims] 1. A clamp time constant is switched between input of a high-definition signal on which an energy spread signal is superimposed and input of a high-definition signal on which the spread signal is not superimposed, and the input high-definition signal is changed by a DC clamp voltage. A clamp processing unit that clamps the diffused signal and sets a DC level to a reference level, and a level shift error voltage that changes according to a deviation of the DC level of the high-definition signal that has passed through the clamp processing unit from the reference level. And a clamp voltage generator that amplifies the clamp voltage to form the clamp voltage, and controls the feedback of the clamp voltage to clamp the input high-definition signal. Then, the reference voltage of the operational amplifier is switched and the clamp time constant is changed. The clamp circuit is provided with a voltage compensating means for compensating for the shift of the clamp voltage due to the switching of the clamp circuit.