JPS6323688B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention is directed to the reduction of pulse noise introduced from the outside into the audio signal system of audio equipment, radio receivers, television receivers, video disc players, etc. The present invention relates to a device for reducing pulse noise that can be performed audibly well.

(Prior art) Pulse noise, such as ignition noise of a car or pulse noise generated by other electrical equipment, is generated in the audio signal system of various equipment such as electrical equipment or electronic equipment that has an audio signal system. It is well known that if this happens, the quality of the audio signal will deteriorate.

Conventionally, methods for reducing the deterioration in audio signal quality caused by the above-described pulsed noise include (a) reducing the gain of the signal transmission system during the period in which pulsed noise occurs; Another method is to cut off the signal transmission system (lower the gain to zero...employ a squelch circuit) to reduce the pulse noise, (b) to reduce the signal level of the signal during the pulse noise period. The most common method of noise reduction has been to try to reduce pulse noise by maintaining the signal level at the level just before the period of pulse noise, but these (a) , The method (b) has the disadvantage that the signal is lost during the period of pulse noise,
Also, by applying the above-mentioned means (a) and (b),
The problem has been that a sufficient noise reduction effect cannot be obtained.

By the way, in order to interpolate the signal loss that occurs during the noise period, after converting the analog signal to a digital signal, a correction signal corresponding to the signal loss portion is created by applying the linear prediction method, and the correction signal is used to interpolate the signal loss that occurs during the noise period. Interpolation of signals during periods of noise is also used in some digital devices, but this requires the use of complex and expensive circuits. , such solutions have not been applied to general audio equipment.

Now, as mentioned above, when the pulse noise mixed in the signal is reduced, the signal dropout will occur depending on the period of existence of the pulse noise. The problem is that it is not always possible to obtain an audio signal of good quality, and the use of complex and expensive circuitry is required to interpolate the missing portions of the signal to solve the above-mentioned problems. This means that the problem is that it is difficult to apply to general audio equipment.

In order to solve the above-mentioned conventional problems, the present applicant's company first uses a differentiating circuit, a sample hold circuit, and a signal having slope information of the desired signal during a period in which pulse noise occurs in the input audio signal. and control signals are supplied,
An analog circuit with a simple circuit configuration that includes a signal correction circuit that is configured to remove pulse noise in the input audio signal and linearly interpolate the desired signal during periods where pulse noise occurs. We proposed a pulse noise reduction device that uses a circuit to generate a correction signal that can interpolate the missing portion of the signal during the period where pulse noise occurs, thereby obtaining a high quality audio signal. did.

FIG. 1 is a block diagram of the previously proposed pulse noise reduction device. In FIG. 1, 1 is an input terminal for an input audio signal S1 mixed with pulse noise, and 2 is a delay circuit. ,
CSG is a control signal generation circuit composed of a pulse noise detection circuit 3 and a pulse shaping circuit 4, and from this control signal generation circuit CSG,
A control signal S2 having a pulse width corresponding to the period in which pulsed noise mixed into the input audio signal S1 exists is generated.

As the pulse noise detection circuit 3 and the pulse shaping circuit 4 in the control signal generation circuit CSG, appropriate circuits may be selected from well-known configurations.

By the way, the control signal S2 generated from the control signal generation circuit CSG is required to correspond correctly to the position on the time axis of the pulse noise mixed in the input audio signal. By the time the generation circuit CSG detects the pulse noise mixed in the input audio signal and generates the control signal S2 having a pulse width corresponding to the period in which the pulse noise exists, Since there is a predetermined time delay determined depending on the operating characteristics of the pulse noise detection circuit 3 used, the pulse noise mixed in the input audio signal and the pulse noise generated in correspondence with the pulse noise are generated. The input audio signal supplied to the input terminal 1 is delayed by a delay circuit 2 having a delay time substantially equal to the time difference between the input audio signal and the control signal S2, and various signal processing to be performed using the control signal S2 is performed. is performed correctly at the location where pulsed noise exists in the input audio signal.

The input audio signal S1 indicated by a in FIG.
The information input audio signal S1 is given a necessary time delay by the delay circuit 2, and the location of pulse noise mixed in the input audio signal S1 shown in a in FIG. 2; This corresponds correctly to the position on the time axis of the control signal S2 indicated by b in FIG.

In FIG. 2, for the input audio signal, time t1 → time t2, time t3 → time t4,
Pulse noise N occurs in each period from time t5 to time t6.
1, N2, and N3 are included.

In FIG. 1, the input audio signal output from the delay circuit 2 is supplied to the input terminal 5a of the signal correction circuit 5. A concrete example of the configuration of the signal correction circuit 5 is as shown by the circuit in block 5 in FIG. 3, in which the control signal S2 generated by the control signal generation circuit CSG is ,
The signal S2 (e in FIG. 2) having the slope information of the desired signal is supplied to the control signal input terminal 5c and the signal S2 (e in FIG. 2) is supplied to the terminal 5d, so that the output terminal 5b receives the signal shown in c in FIG. A signal S3, such as
That is, the output signal S3 is outputted from which the pulse noise in the input audio signal S1 has been removed, and the desired signal during the period in which the pulse noise occurred has been linearly interpolated. For details of the signal correction circuit 5 described above,
This will be described below with reference to FIG.

Output signal S3 from the signal correction circuit 5 described above
is outputted to the output terminal 8 of the device and also supplied to the differentiating circuit 6. The differentiating circuit 6 outputs a differentiating signal S4 as shown in FIG. 2c.

The differential signal S4 described above is the original signal (desired signal)
It shows a phase difference of 90 degrees with respect to the output signal S3 from the signal correction circuit 5, etc., and also shows a signal section that is linearly interpolated in the signal S3 (where pulse noise was present in the original signal). A signal section exhibiting a constant signal level corresponds to a signal portion exhibiting a constant slope in the period (period).

Then, the signal level of the signal section showing the above-mentioned constant signal level in the differentiating circuit S4 becomes a positive signal level or a negative signal level depending on the direction of the slope in the original signal.
Thus, the polarity differs depending on the direction of the slope of the original signal, and the signal level of the signal section showing a constant signal level in the differential signal S4 described above differs depending on the degree of slope of the original signal. The size of the gap between the two levels is changing.

Differential output signal S4 output from the differentiating circuit 6
is supplied to the sample and hold circuit 7, and the sample and hold circuit 7 outputs a signal S5 as shown in e of FIG. This signal S5 is the above-mentioned signal S5 when the device is operating in a steady state.
Same as 4.

The sample and hold circuit 7 is essential for operation until the device enters steady state operation. The signal S2 generated by the control signal generation circuit CSG is used as the sampling pulse for the sample and hold circuit 7 described above.

The signal S5 outputted from the sample hold circuit 7 has a signal section showing a constant signal level corresponding to a signal section showing a constant signal level in the differential signal S4 mentioned above, and As shown in FIG.
The output signal S5 from the sample hold circuit 7 is also
The signal section indicating the constant signal level described above contains slope information of the desired signal.

Signal S output from sample hold circuit 7
5, that is, when the signal S5 having the slope information of the desired signal is supplied to the terminal 5d of the correction circuit 5, the signal correction circuit 5 calculates, based on the slope information of the desired signal contained in the signal S5, By creating a correction signal that can linearly interpolate the missing portion of the signal that occurred during the pulse noise mixing period in the input audio signal, and linearly interpolating the missing portion of the signal using the correction signal, A signal S3 as shown in FIG. 1 is sent to the output terminal 8.

Next, with reference to FIG. 3, an example of the configuration of the differentiating circuit 6 and the sample and hold circuit 7, and the configuration and operation of the signal correction circuit 5 will be described. In FIG. 3, block 6 is a differentiating circuit 6, and a capacitor
The block 7 is a sample and hold circuit 7, which is composed of a switch SWs, a capacitor Cs, and an amplifier A4.

Reference numeral 7a denotes an input terminal for the control signal S2 given as a sampling pulse, and the sample-and-hold circuit 7 is connected to the capacitor Cs when the switch SWs is turned off during the high level period of the control signal S2. Maintain signal level.

Block 5 is a signal correction circuit 5, and in the figure, 5a is an input terminal for input audio signals;
5b is an output terminal, 5c is a supply terminal for the control signal S2, 5d is a supply terminal for the signal S5, and A
1 is a first amplifier and A2 is a second amplifier, the first amplifier A1 having a low output impedance, and the second amplifier A2 having a high input impedance.

The output side of the first amplifier A1 and the second amplifier A2
A control signal S2 is connected to the signal transmission path between the input side of
A switch SW is provided which is turned off when The output side of the variable constant current circuit VC is connected to the input side of the second amplifier A2.

In the example shown in Figure 3, the variable constant current circuit VC includes a phase inversion amplifier -A with a gain of -1 and a positive power supply +
A transistor X1 whose emitter is connected to VDC via a resistor R1, a transistor X2 whose collector is connected to the collector of the transistor X1, and an emitter of the transistor X2 and a negative power supply -VDC. Resistor R2 connected between and the brass power supply +VDC
It consists of a resistor R3 connected between the negative power supply and the negative power supply -VDC, a series connection circuit of a variable resistor VR, and a resistor R4, and the base of the transistor X1 is connected between the resistor R3 and the variable resistor VR. The base of the transistor X2 is connected to the connection point between the resistor R4 and the variable resistor VR.

The variable resistor VR is used to correct imbalances in the circuit due to variations in the characteristics of the circuit components, and if the circuit can be balanced correctly, it can be replaced with two fixed resistors. .

The variable constant current circuit VC operates in a standard operating state in which the voltage at point Z is zero when the voltage at terminal 5d is zero, and when the voltage at point 5d is positive, Z The voltage at the point has the same positive polarity as the voltage at the terminal 5d, and when the voltage at the terminal 5d has negative polarity, the voltage at point Z has the same negative polarity as the voltage at the terminal 5d.

Therefore, at the Z point of the variable constant current circuit VC,
Since a voltage appears with a polarity and a voltage value corresponding to the polarity and magnitude of the signal in the signal section indicating a constant signal level in the signal S5 applied to the terminal 5d, there is a voltage between the Z point and the ground. When the capacitor C is connected, the capacitor C is charged with a constant charging current that is determined corresponding to the signal level of the signal section in which the signal S5 shows a constant signal level.

In the signal correction circuit 5 in FIG. 3, when the input audio signal S1 is not mixed with pulse noise, the control signal S2 is supplied to the terminal 5c.
is at a low level, the switch SW is turned on, and therefore the input terminal 5a
The input audio signal S1 supplied to the input terminal 5b passes through the signal transmission path of the first amplifier A1→switch SW→second amplifier A→output terminal 5b.
a to the output terminal 5b.

At this time, the charge storage capacitor C connected between the signal transmission path and the ground exhibits a terminal voltage according to the voltage value of the signal transmitted to the signal transmission path.

In addition, in the above state where no pulse noise is mixed in the input audio signal S1, the output terminal of the variable constant current circuit VC has an extremely low output of approximately zero ohm through the switch SW which is in the on state. The first with impedance
Since it is connected to the output side of the amplifier A1 of circuit
Since the voltage generated when the current output from VC is injected into the output side of the first amplifier A1 having a low output impedance of approximately zero ohms is very small, the variable constant current circuit described above
The current generated from VC does not cause any disturbance to the desired signal transmitted from the first amplifier A1 to the second amplifier A2.

Therefore, as a signal to be supplied to the variable constant current circuit VC, it is not necessary to extract and supply only the signal in the signal section showing a constant signal level in the signal S5.
The output signal S5 of the sample-and-hold circuit 7 may be supplied as is to the sample-and-hold circuit 7.

Next, when pulse noise is mixed in the input audio signal S1, a control signal S2 is generated corresponding to the period in which the pulse noise N1 to N3 is occurring, and the signal is generated during the high level period of the control signal S2. The switch SW is turned off. previous switch
By turning off SW, capacitor C
The terminal voltage of is maintained at the signal level when the switch SW is turned off (when the control signal S2 is set to high level).

Furthermore, since the terminal 5d of the variable constant current circuit VC is given a signal in a signal section indicating a constant signal level in the signal S5 in that state,
The variable constant current circuit VC outputs a current having a polarity corresponding to the polarity of the signal S2 applied to its terminal 5d and a constant current value corresponding to the signal level,
As a result, the charge storage capacitor C is charged. The charging operation for the charge storage capacitor C is performed over a period when pulse noise is occurring, and the terminal voltage of capacitor C increases linearly, but there is no pulse noise mixed in. At the moment when the voltage is low, the control signal S2 becomes low level and the switch SW is turned on, so that the accumulated charge in the capacitor C is instantly discharged by the low output impedance of the first amplifier A1.

The variable constant current circuit VC is driven by the signal S5 supplied to the terminal 5d, that is, the signal S5 that includes slope information in the desired signal with a polarity and a constant signal level, so that the variable constant current circuit VC generates a pulse S5. A current with a polarity and a constant current value that corresponds to the polarity and signal level flows into the charge storage capacitor C, and the terminal voltage of the capacitor C is the polarity of the signal in the signal section in which the signal S5 shows a constant signal level, and , is increased linearly with a slope corresponding to the signal level, but before the terminal voltage of the capacitor C is increased by the inflow of current from the variable constant current circuit VC, the terminal voltage of the capacitor C is , is the signal level of the input audio signal immediately before the switch SW is turned off, so the signal loss that occurred in the signal corresponding to the period of pulse noise mixed in the input audio signal S1 is due to signal correction. It is clear that the above-described operation of the circuit 5 results in excellent linear interpolation, and the signal S3 sent to the output terminal 8 has a waveform that approximates the original signal.

In Fig. 2, f shows the correction signal for linear interpolation generated in the signal correction circuit 5 as a solid line, and the waveform of the desired signal in the absence of pulse noise as a dotted line. FIG. 2f is an explanatory diagram for easy understanding of the operation, and in actual operation, the signal correction circuit 5 outputs a signal S3 as shown in FIG. 2c.

(Problems to be Solved by the Invention) In the previously proposed pulse noise reduction device explained with reference to FIGS. When the noise level ratio is small and white noise with a relatively high signal level exists in the high range of the audio frequency band, the white noise present in the high range is caused by the differential operation of the differentiator circuit 6. As a result, the output signal from the sample-and-hold circuit 7 during the period in which pulsed noise occurs is a state in which the held portion of the amplified white noise is added to the held output signal of the desired signal. As a result, a malfunction occurs in the interpolation operation performed during the period when pulse noise occurs, and not only does the interpolation of the signal during the period where the signal is missing occur incorrectly, but also due to the randomness of white noise. Conventional devices have the disadvantage that they cannot be applied well to signals from signal sources with a small signal level to white noise level ratio, because of problems such as the generation of new noise.

Furthermore, the conventional device does not perform the above-mentioned processing even when the signal to be processed is a so-called pre-emphasized signal, that is, a signal in which the high-frequency components of the signal are emphasized. The same drawbacks occur for signals from sources with small signal level to white noise level ratios.

Next, this point will be explained with reference to FIG. FIG. 4 is a block diagram showing a schematic configuration of a signal recording and transmission system that records or transmits audio signals as frequency modulated waves. In FIG. 12 is a pre-emphasis circuit having pre-emphasis characteristics as shown by the curve in FIG. 5, 13 is a frequency modulator, 14 is a recording medium or transmission line, 15 is a demodulation circuit, and 16 is a de-emphasis circuit. , 17 are output terminals, which are connected to the de-emphasis circuit 1 described above.
For example, the de-emphasis characteristic in the fifth
As shown by the curves in the figure, the pre-emphasis characteristics and the de-emphasis characteristics described above exhibit complementary symmetry with each other, as is well known.

Now, in the recording or transmission system shown in Fig. 4, the above-mentioned pulse noise may be generated in the signal reproduced from the recording medium or the signal transmitted through the transmission path. When applying a reduction device, it is necessary to provide an audio signal before being de-emphasized, such as the output signal from the demodulation circuit 15, as an input signal to the pulse noise reduction device. It is said that

In other words, a signal containing pulsed noise is
The pulse noise in the signal de-emphasized by the de-emphasis circuit 16 and output from the de-emphasis circuit 16 is in a state where the noise time width of the pulse noise is expanded due to the de-emphasis characteristic as shown in the curve in FIG. Therefore, if the output signal from the de-emphasis circuit 16 is applied to a pulse noise reduction device configured as described above, it will be difficult to perform a good interpolation operation on the signal. be.

Therefore, the signal to be given to the pulse noise reduction device must be the audio signal obtained from the signal transmission path to the input side of the de-emphasis circuit, but the signal must be the audio signal before de-emphasis is applied. is in a state where its high-frequency components are pre-emphasized and are emphasized, so when a signal in such a state is supplied to the pulse noise reduction device described above, It will be well understood from the foregoing explanation that in a pulse noise reduction device, it is not possible to perform an interpolation operation satisfactorily during a period in which pulse noise occurs in a signal.

As is clear from the above description, in the conventional pulse noise reduction device described above, in the case of a signal that is pre-emphasized from a signal source with a small signal level to white noise level ratio, Because of the difficulty in performing good interpolation operations, a solution was sought.

(Means for Solving the Problems) The present invention provides slope information of a desired signal during a period in which a control signal is supplied as a timing signal for operation and pulse noise is occurring in an input audio signal. By supplying the signal, it performs a pulse noise removal operation and a linear interpolation operation for the desired signal during the period when pulse noise occurs, and also performs linear interpolation operation for the desired signal during the period when pulse noise occurs in the input audio signal. , a signal correction circuit configured to always perform de-emphasis circuit operation, for example, a de-emphasis circuit in the signal transmission path between the output side of the first amplifier and the input side of the second amplifier with high input impedance. A circuit resistor, a first switch circuit, a de-emphasis circuit capacitor, etc. are provided, and a second amplifier is provided between the input side of the second amplifier and the input terminal of the signal having slope information of the desired signal. It is equipped with two switch circuits and a variable constant current circuit, and during a period when pulse noise is occurring in the input signal, the first switch circuit is turned off and the second switch circuit is turned on. Also, during the period when no pulse noise is generated in the input signal, the first switch circuit is turned on.
The present invention provides a pulse noise reduction device that does not have the above-mentioned problems by using a signal correction circuit configured to control the second switch circuit to turn off.

(Example) Hereinafter, specific contents of the pulse noise reduction device of the present invention will be described in detail with reference to the accompanying drawings. FIG. 6 is a block diagram of an embodiment of the pulse noise reduction device of the present invention, and also includes:
FIG. 7 is a waveform diagram for explaining the operation of the pulse noise reduction device of the present invention, and in FIG. 6, each component of the pulse noise reduction device shown in FIG. 1 and FIG. Components equivalent to those shown in FIG. 1 are given the same drawing symbols as those used in FIG.

In FIG. 6, 1 is an input terminal for an input audio signal S1 mixed with pulse noise, 2 is a delay circuit, and CSGa is a pulse noise detection circuit 3 and a pulse shaping circuit 4a. A control signal generation circuit, this control signal generation circuit
CSGa generates control signals S2a and S2b having a pulse width corresponding to the period in which pulsed noise mixed in the input audio signal S1 exists.

The delay circuit 2, differentiation circuit 6, sample hold circuit 7, etc. in FIG. These components correspond to the hold circuit 7, etc., and the specific configuration contents and operation explanations of each of these components are as described in detail with reference to FIGS. 1 and 3. be.

In FIG. 6, 5A is a signal correction circuit, and the signal correction circuit 5A includes a first amplifier A1, a resistor R, a first switch circuit SWa, and a high input impedance circuit between terminals 5a and 5b. Second
A series connection circuit with the amplifier A2 is provided, and a capacitor C and a second switch circuit SWb are provided on the input side of the second amplifier A2.
One end of the above-mentioned second
The second switch circuit SWb and the variable constant current circuit VC are provided between the input side of the amplifier A2 and the input terminal 5d of the signal having the slope information of the desired signal.

The control signal S2a generated by the control signal generation circuit CSGa is applied to the first switch circuit SWa through the terminal 5e.
In addition, the second switch circuit SWb described above includes
Control signal S generated by control signal generation circuit CSGa
2b is provided via terminal 5f.

The first switch circuit SWa is kept in an OFF state during a period when pulse noise is occurring in the input signal S1, and is kept in an ON state in a period other than the above, by a control signal S2a applied thereto. , On the other hand, the second switch circuit SWb is
The signal S2b applied thereto causes the first switch circuit SWa to enter an on/off state opposite to the on/off state, that is, the input signal S
During the period in which pulse noise occurs during the period 1, the switch is in the on state, and in the other periods, the switch is in the off state.

As a result, the signal correction circuit 5A operates in the following manner. That is, first, during a period in which pulse noise does not occur in the input signal, the first switch circuit SWa in the signal correction circuit 5A is in the on state, and the second switch circuit SWa is in the on state.
Since SWb is in the off state, the signal S1 input to the terminal 5a of the signal correction circuit 5A is
First amplifier A1 → resistor R → switch circuit SWa
→Amplifier SWb→It is output through the circuit of terminal 5b, but in the above state, the resistor R for the de-emphasis circuit and the capacitor C for the de-emphasis circuit are connected by the first switch circuit SWa. Therefore, the circuit consisting of the resistor R and capacitor C has terminals 5a and 5b.
The signal correction circuit 5A in this state operates as a de-emphasis circuit with predetermined characteristics for a signal passing between the de-emphasis circuit and the de-emphasis circuit.

When the signal correction circuit 5A is in the above operating state, the second switch circuit SWb is in the off state as described above, so that the terminal 5a and the terminal 5
For the signal transmitted in the transmission path between
The presence of the variable constant current circuit VC has no effect.

As mentioned above, by connecting the de-emphasis circuit consisting of the resistor R and the capacitor C to the signal transmission wave, the signal S transmitted through the transmission line is
1', a phase lag occurs, and the phase lag mentioned above is shown in FIG. 7 as from t ₀ to t'. The waveform diagram shown in FIG. 7 is a waveform diagram of each signal in the circuit shown in FIG.

As mentioned above, the signal correction circuit 5A operates as a de-emphasis circuit during the period when no pulse noise occurs in the signal, so the signal S3 output from the signal correction circuit 5A during this period is ' is in a state in which high-frequency signal components are reduced in accordance with a predetermined de-emphasis characteristic.

Since the signal correction circuit 5A operates as a de-emphasis circuit until just before pulse noise occurs in the input signal, the control signal generation circuit 5A operates as a de-emphasis circuit until pulse noise occurs in the input signal. The first switch circuit SWa is turned off by the control signal S2a generated by CSGa, and the second switch circuit SWb is turned on by the control signal S2b generated by the control signal generation circuit CSGa. When this is done, the differentiating circuit 6 performs an interpolation operation for the signal dropout period that occurs in the signal corresponding to the period in which pulse noise occurs.
This is accomplished by the operation of a series of circuits such as → sample hold circuit 7 → signal correction circuit 5A.

That is, in a state where pulse noise occurs in the input signal, the first switch circuit SWa is turned off.
When the second switch circuit SWb is turned on, the signal correction circuit 5A has the same configuration as the signal correction circuit 5 shown in FIG. It operates in the same manner as the signal correction circuit 5 already described with reference to, and interpolation for signals is performed satisfactorily.

As is clear from the above, in the pulse noise reduction device of the present invention, the signal correction circuit 5A operates as a de-emphasis circuit when no pulse noise is mixed in the input signal. , this state continues until just before pulse noise is mixed into the input signal, so the above-mentioned interpolation operation performed by the signal correction circuit 5A when pulse noise is mixed into the input signal is , is performed based on a signal in which de-emphasis has been applied to an input signal which has undergone pre-emphasis, and therefore, the differential output signal S4' generated by the differentiating operation of the differentiator circuit 6 In , the white noise is not enhanced, and the hold operation performed in the sample-and-hold circuit 7 to which the output signal S4' from the differentiating circuit 6 is applied, that is, the detection of slope information during the existence period of pulse noise in the desired signal. Therefore, the holding operation for this purpose is performed correctly, and the problems with the conventional devices described above can be satisfactorily solved by the device of the present invention.

(Effects) As is clear from the above detailed explanation, the pulse noise reduction device of the present invention simply attenuates the gain of the transmission system during the period when pulse noise is mixed, or , the signal level during the pulse noise period is maintained at the signal level immediately before the pulse noise, thereby reducing the pulse noise using the conventional method described above. Unlike a reduction device, since it also interpolates the signal loss that occurs during the period of pulse noise, it is possible to effectively reduce pulse noise without causing any unnaturalness to the auditory sense. Furthermore, since the circuit configuration for interpolating missing signals can be realized with a simple analog circuit, it is possible to easily provide audio equipment with excellent performance at low cost.

Furthermore, even if the white noise level input to the pulse noise reduction device of the present invention is relatively high, the high-frequency white noise level enhanced by the differentiating circuit can be reduced by switching the de-emphasis circuit. As a result, malfunctions caused by interpolation operations in signal correction circuits can be greatly reduced, and pulse noise can be easily reduced, which has a wider range of applications than conventional devices, and is useful for FM broadcast reception. Not only does it successfully reduce ignition noise from cars and motorcycles, which sometimes causes problems, and pulse noise generated from electrical devices with built-in motors, but it also reduces dust and dirt adhering to audio disks. Of course, the present invention can also be effectively applied to the reduction of pop noises caused by scratches, etc., dropout noises that occur in audio signals when a video disc signal is missing, and other pulse noises.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of the previously proposed pulse noise reduction device, Figs. 2 and 7 are waveform diagrams for explaining operation, and Fig. 3 is a circuit of an example configuration of a signal correction circuit and its related circuits. 4 is a block diagram of an example configuration of an FM signal recording and transmission system, FIG. 5 is a curve diagram of an example of pre-emphasis characteristics and de-emphasis characteristics, and FIG. 6 is a block diagram of a pulse noise reduction device of the present invention. be. 1...Input terminal, 2...Delay circuit, CSG,
CSGa...control signal generation circuit, 5,5A...signal correction circuit, 6...differentiation circuit, 7...sample hold circuit, 8...output terminal, SWa...first switch circuit, SWb...second switch circuit, VC
...Variable constant current circuit.

Claims (1)

[Scope of Claims] 1. Means for detecting pulsed noise in an input audio signal containing pulsed noise and generating a control signal having a pulse width corresponding to the period during which the pulsed noise occurs; A control signal generated by the above-mentioned control signal generating means in response to pulsed noise in the audio signal, and a delay circuit having a delay time approximately equal to the time difference between the control signal and the corresponding pulsed noise. , means for delaying an input audio signal containing pulsed noise, and slope information of a desired signal during a period in which the above-mentioned control signal is supplied as a timing signal for operation and pulsed noise is occurring in the input audio signal. By supplying a signal having a pulse noise, a pulse noise removal operation and a linear interpolation operation for the desired signal during the period when pulse noise occurs are performed, and at the same time, during a period when pulse noise does not occur in the input audio signal, includes a signal correction circuit configured to always operate as a de-emphasis circuit, means for supplying the output signal of the delay circuit to the correction circuit, and a means for supplying the output signal from the signal correction circuit to an output terminal. means for transmitting the output signal to a differentiating circuit; means for supplying the output signal of the differentiating circuit to a sample hold circuit to which the above control signal is supplied as a sampling pulse; and an input audio signal from the sample hold circuit. A device for reducing pulse noise, comprising: means for outputting a signal having slope information of a desired signal during a period in which pulse noise is occurring, and providing the signal to the signal correction circuit described above. 2. As a signal correction circuit, during a period when pulse noise is occurring in the input audio signal, a charging operation is performed on the de-emphasis circuit capacitor using the output current of the variable constant current circuit, and when the aforementioned period ends, the aforementioned charging operation is performed. Claim 1 uses a structure in which the de-emphasis circuit constituted by the de-emphasis circuit capacitor and the de-emphasis circuit resistor can be operated at the same time when the operation is stopped. Pulse noise reduction device. 3. As a signal correction circuit, a de-emphasis circuit resistor, a first switch circuit, and a de-emphasis circuit are installed in the signal transmission path between the output side of the first amplifier and the input side of the second amplifier with high input impedance. It includes a circuit capacitor, etc., and also includes a second switch circuit and a variable constant current circuit between the input side of the second amplifier and the input terminal of the signal having slope information in the desired signal. During the period when pulse noise is occurring in the input signal, the first switch circuit is turned off and the second switch circuit is turned on. During the period when the switch is off, the first switch circuit described above is on.
2. The pulse noise reduction device according to claim 1, wherein the second switch circuit is controlled to be turned off. 4. As a variable constant current circuit, one configured such that the current value is set according to the signal level of the input signal to the circuit and a constant current output of the polarity of the input signal to the circuit is obtained is used. A device for reducing pulse noise according to claim 2.