JPS632497B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention is directed to the reduction of pulse noise introduced from the outside into the audio signal system of audio equipment, radio receivers, television receivers, video disc players, etc. The present invention relates to a pulse noise reduction device that allows audible performance to be performed satisfactorily.

(Prior art) Pulse noise, such as ignition noise of a car or pulse noise generated by other electrical equipment, is generated in the audio signal system of various equipment such as electrical equipment or electronic equipment that has an audio signal system. It is well known that if this happens, the quality of the audio signal will deteriorate.

Conventionally, methods for reducing the deterioration in audio signal quality caused by the above-described pulsed noise include (a) reducing the gain of the signal transmission system during the period in which pulsed noise occurs; Another method is to cut off the signal transmission system (reducing the gain to zero... employing a squelch circuit) to reduce the pulse noise. The most common method of noise reduction has been to try to reduce pulse noise by maintaining the signal level at the level just before the period of pulse noise, but these (a) , The method (b) has the disadvantage that the signal is lost during the pulse noise period,
Further, even when applying the means (a) and (b) described above, there has been a problem that a sufficient noise reduction effect cannot be obtained.

By the way, in order to interpolate the signal loss that occurs during the noise period, after converting the analog signal to a digital signal, a correction signal corresponding to the signal loss portion is created by applying the linear prediction method, and the correction signal is used to interpolate the signal loss that occurs during the noise period. Interpolation of signals during periods of noise is also used in some digital devices, but this requires the use of complex and expensive circuits. , such solutions have not been applied to general audio equipment.

(Problem to be Solved by the Invention) As mentioned above, when the pulse noise mixed in the signal is reduced, signal dropouts occur depending on the period of existence of the pulse noise. Then, the problem is that even if the pulse noise is reduced, it is not possible to obtain an audio signal of good quality.
The problem is that the interpolation of missing portions of the signal requires the use of complex and expensive circuits, making it difficult to apply to general audio equipment.

(Means for Solving the Problems) The present invention provides a differential circuit, a sample and hold circuit, a gate circuit, and a pulse generator having slope information of a desired signal during a period in which pulse noise occurs in an input audio signal. A signal configured such that, by being supplied with a control signal, an operation for removing pulse noise in an input audio signal and a linear interpolation operation for a desired signal in audio in which pulse noise has occurred are performed. An analog circuit with a simple circuit configuration consisting of a correction circuit etc. is used to create a correction signal that can interpolate the missing part of the signal during the period of pulse noise, thereby making it possible to obtain an audio signal of good quality. The present invention provides a pulse noise reduction device.

(Example) Hereinafter, specific contents of the pulse noise reduction device of the present invention will be described in detail with reference to the accompanying drawings. FIG. 1 is a block diagram of an embodiment of the pulse noise reduction device of the present invention, in which 1 is an input terminal for an input audio signal S ₁ mixed with pulse noise; is a delay circuit,
CSG is a control signal generation circuit composed of a pulse noise detection circuit 3 and a pulse shaping circuit 4, and from this control signal generation circuit CSG,
A control signal _S2 having a pulse width corresponding to the period in which pulsed noise mixed in the input audio signal _S1 exists is generated.

As the pulse noise detection circuit 3 and the pulse shaping circuit 4 in the control signal generation circuit CSG, appropriate circuits may be selected from well-known configurations.

By the way, the control signal _S2 generated from the control signal generation circuit CSG is required to correspond correctly to the position on the time axis of the pulse noise mixed in the input audio signal. The signal generation circuit CSG detects the pulse noise mixed in the input audio signal, and generates the control signal _S2 with the pulse width corresponding to the period in which the pulse noise exists. Since there is a predetermined time delay determined depending on the operating characteristics of the pulse noise detection circuit 3 used, the pulse noise mixed in the input audio signal corresponds to the pulse noise. The input audio signal supplied to the input terminal 1 is delayed by a delay circuit 2 having a delay time approximately equal to the time difference between the control signal and the control signal generated by the control signal _S2 . To correctly perform various types of signal processing at positions where pulsed noise exists in an input audio signal. The input audio signal S ₁ shown at a in FIG. 2 is the input audio signal S ₁ given the required time delay by the delay circuit 2. The position of the pulse noise mixed in the signal S ₁ and the position on the time axis of the control signal S ₂ shown by b in FIG. 2 exactly match.

In Fig. 2, pulse noises N ₁ , N ₂ , and N ₃ are mixed into the input audio signal during each period from time t ₁ → t ₂ , time t ₃ → t ₄ , and time t ₅ → t _6. This is an example of what is being done.

In FIG. 1, the input audio signal output from the delay circuit 2 is supplied to the input terminal 5a of the signal correction circuit 5. The signal correction circuit ₅ has a specific configuration as shown in FIG. , a pulse (signal S ₆ . . . f in FIG. 2) having slope information of the desired signal is supplied to the terminal 5d, so that the output terminal 5b receives a signal S ₃ , as shown in c in FIG. That is, pulse noise in the input audio signal _S1 is removed, and
An output signal _S3 is sent out, which is a linearly interpolated version of the desired signal during the period in which the pulse noise occurred. A detailed explanation of the signal correction circuit 5 will be given later with reference to FIG.

The output signal _S3 from the signal correction circuit 5 described above is
It is output to the output terminal 9 of the device and is also supplied to the differentiating circuit 6. The differentiating circuit 6 differentiates the signal S ₃ shown in c of FIG. 2 and outputs a differential signal S ₄ shown in d of FIG. 2.

The differential signal _S4 mentioned above has a 90% difference with respect to the original signal (desired signal), the output signal _S3 from the signal correction circuit 5, etc.
shows the phase difference in degrees and the signal S ₃
A signal section that shows a constant slope corresponds to a signal section that shows a constant slope in the signal section that is linearly interpolated (period in which pulse noise was present in the original signal). It is said that

Then, the signal level of the signal section showing the above-mentioned constant signal level in the differential signal _S4 becomes a positive signal level or a negative signal level depending on the direction of the slope in the original signal. , the polarity differs depending on the direction of the slope of the original signal, and the signal level and zero level of the signal section showing a constant signal level in the differential signal S ₄ are determined according to the degree of slope in the original signal. The size of the gap is changing.

The differential output signal _S4 output from the differentiator circuit 6 is
The signal is supplied to the sample and hold circuit 7, and from the sample and hold circuit 7, a signal as shown in e of FIG.
_S5 is output. This signal S ₅ is the same as the signal S ₄ described above when the device is operating in steady state. The sample and hold circuit 7 operates until the device enters steady state operation.
It is essential. The control signal _S2 generated by the control signal generation circuit CSG is used as the sampling pulse for the sample and hold circuit 7 described above.

The output signal _S5 from the sample and hold circuit 7 is
However, since the aforementioned control signal _S2 is supplied to the gate circuit 8 as a gate signal, the gate circuit 8 outputs the signal f in FIG.
An output signal _S6 as shown in is output. this signal
Since the signal S ₆ has a signal level in a signal section indicating a constant signal level in the differential signal S ₄ described above, the signal S ₆ depends on its polarity and peak value. It shows the slope information of the desired signal.

When the signal S ₆ output from the gate circuit 8, that is, the pulse S ₆ having the slope information of the desired signal during the period in which pulse noise occurs in the input audio signal, is supplied to the terminal 5d of the signal correction circuit 5. Based on the signal _S6 , the signal correction circuit 5 creates a correction signal that can linearly interpolate the missing portion of the signal that occurred during the pulse noise mixing period in the input audio signal, and uses the correction signal to perform linear interpolation. Linear interpolation is performed on the missing part of the signal, and the second
A signal _S3 as shown in c in the figure is sent to the output terminal 9.

Next, the structure and operation of the signal correction circuit will be explained with reference to a block circuit diagram of an example structure of the signal correction circuit shown in FIG.

In FIG. 3, 5a is an input terminal for input audio signals, 5b is an output terminal, 5c is a supply terminal for control signal S ₂ , 5d is a supply terminal for signal S ₆ (pulse S ₆ ), and A ₁ is a supply terminal for signal S 6 (pulse S 6 ). The first amplifier A ₂ is a second amplifier, the first amplifier A ₁ being of low output impedance and the second amplifier A ₂ being of low output impedance.
is of high input impedance.

The signal transmission path between the output side of the first amplifier _A1 and the input side of the second amplifier _A2 includes a switch SW that is turned off when the control signal _S2 is at a high level. and a second amplifier
A charge storage capacitor C is provided between the input side of _A2 and ground, and the second amplifier
The output side of the variable constant current circuit VC is connected to the input side of _A2 .

In the example shown in Figure 3, the variable constant current circuit VC includes a phase inversion amplifier -A with a gain of -1 and a positive power supply +
A transistor X ₁ whose emitter is connected to Vcc via a resistor R ₁ and the aforementioned transistor
A transistor X 2 whose collector is connected to the collector _of X ₁ , a resistor R ₂ connected between the emitter of the transistor X ₂ and the negative power supply -Vcc, a positive power supply +Vcc and a negative power supply - It consists of a resistor _R3 connected between Vcc and a series connection circuit of a variable resistor VR and a resistor _R4 , and _the base of the transistor
It is connected to the connection point between R ₃ and variable resistor VR, and the base of transistor X ₂ is connected to the connection point between resistor R ₄ and variable resistor
Connected to the connection point with VR.

The variable resistor VR is used to correct imbalances in the circuit due to variations in the characteristics of the circuit components, and can be replaced with two fixed resistors if the circuit can be properly balanced.

The variable constant current circuit VC operates in a standard operating state in which the voltage at point Z is zero when the voltage at its terminal 5d is zero, and when the voltage at the terminal 5d is positive, The voltage at point Z has the same positive polarity as the voltage at terminal 5d, and when the voltage at terminal 5d has negative polarity, the voltage at point Z has the same negative polarity as the voltage at terminal 5d.

Therefore, at the Z point of the variable constant current circuit VC,
Since a voltage appears whose polarity and voltage value correspond to the polarity and magnitude of the signal _S6 applied to the terminal 5d, if the capacitor C is connected between the above-mentioned point Z and the ground, the capacitor C Signal S ₆
The battery is charged with a constant charging current determined in accordance with the signal level of the signal _S6 and having the same polarity as the polarity of the signal S6.

In the signal correction circuit 5 shown in FIG. 3, when the input audio signal _S1 is not mixed with pulse noise, the control signal _S2 supplied to the terminal 5c is at a low level, so the switch SW is turned on. Therefore, the input audio signal _S1 supplied to the input terminal 5a is input to the first amplifier.
The signal passes through the signal transmission path A ₁ → switch SW → second amplifier A ₂ → output terminal 5b, and is transmitted from input terminal 5a to output terminal 5b. At this time, the charge storage capacitor C connected between the signal transmission path and the ground exhibits a terminal voltage value according to the voltage value of the signal transmitted to the signal transmission path. In addition, in the above state where pulse noise is not mixed in the input audio signal _S1 ,
Since the terminal 5d of the variable constant current circuit VC is at zero voltage, the Z point of the variable constant current circuit VC is also at zero voltage, but since the output impedance of the variable constant current circuit VC is extremely high, the variable constant current circuit VC
The presence of this does not have any adverse effect on the above-mentioned signal transmission operation.

Next, when pulse noise is mixed into the input audio signal S ₁ , the control signal S ₂ is generated corresponding to the period in which the pulse noise N ₁ to _{N 3} is occurring, and the high level of the control signal S ₂ is generated. switch over a period of
SW is turned off. By turning off the switch SW described above, the terminal voltage of the capacitor C remains at the signal level at the time when the switch SW described above was turned off (when the control signal _S2 was at a high level). Retained.

In addition, a signal is connected to terminal 5d of the variable constant current circuit VC.
When S ₆ (pulse S ₆ ) is applied, the variable constant current circuit VC outputs a current with a constant current value corresponding to the peak value with a polarity corresponding to the polarity of the signal S ₆ applied to the terminal 5d, As a result, the charge storage capacitor C is charged. The charging operation for the charge storage capacitor C is performed over a period when pulse noise is occurring, and the terminal voltage of capacitor C increases linearly, but there is no pulse noise mixed in. At the moment when the control signal S ₂
becomes a low level and the switch SW is turned on, so that the accumulated charge in the capacitor C is instantly discharged by the low output impedance of the first amplifier _A1 .

The variable constant current circuit VC is driven by the signal S ₆ supplied to the terminal 5d, that is, the pulse S ₆ (signal S ₆ ) having the slope information of the desired signal in polarity and peak value. , a current with a polarity and a constant current value corresponding to the polarity and peak value of the pulse S ₆ flows into the charge storage capacitor C, and the terminal voltage of the capacitor C is linearly adjusted with a slope corresponding to the peak value of the pulse S ₆ . However, before the terminal voltage of the capacitor C is increased by the inflow of current from the variable constant current circuit VC, the terminal voltage of the capacitor C is equal to the input audio voltage immediately before the switch SW is turned off. Since the signal level is the signal level of the signal, the signal loss that occurs in the signal corresponding to the period of pulse noise mixed in the input audio signal _S1 can be suppressed by the above-described operation of the signal correction circuit 5. It is clear that linear interpolation is performed, and the signal _S3 sent to the output terminal 9 has a waveform that approximates the original signal.

2g shows the correction signal for linear interpolation created in the signal correction circuit 5 as a solid line, and the waveform of the desired signal in the absence of pulse noise as a dotted line. Figure 2g is an explanatory diagram to facilitate understanding of the operation; in actual operation, the signal correction circuit 5 outputs the signal _S3 as shown in Figure 2c. be.

(Effects) As is clear from the above detailed explanation, the pulse noise reduction device of the present invention simply attenuates the gain of the transmission system during the period when pulse noise is mixed, or Pulse noise is reduced by the conventional method described above, which aims to reduce pulse noise by maintaining the signal level during the period of pulse noise at the signal level of the signal immediately before the pulse noise. Unlike noise reduction devices, it also interpolates signal loss that occurs during periods of pulsed noise, making it possible to effectively reduce pulsed noise without causing any unnatural sound. Moreover, since the circuit configuration for interpolating the missing signal can be realized with a simple analog circuit, it is possible to easily provide audio equipment with excellent performance at low cost.

Note that the pulse noise reduction device of the present invention can be expected to be sufficiently effective when the time span in which the pulse noise occurs is narrow, but when the time span in which the pulse noise occurs is wide, it cannot be corrected. The effect may be slightly reduced. However, ignition noise from cars and motorcycles, pulse noise generated from electrical equipment with a built-in electric motor, pop noise caused by dust or scratches on the audio disk, audio when the video disk signal is lost, etc. Of course, the present invention can be effectively applied to dropout noise and other pulsed noises occurring in signals.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of the pulse noise reduction device of the present invention, FIG. 2 is a waveform diagram for explaining the operation, and FIG. 3 is a circuit diagram of an example configuration of a signal correction circuit. DESCRIPTION OF SYMBOLS 1...Input terminal, 2...Delay circuit, CSG...Control signal generation circuit, 3...Pulse noise detection circuit, 5...Signal correction circuit, 4...Pulse shaping circuit, 6...Differential circuit, 7...Sample hold circuit, 8... Gate circuit, VC...variable constant current circuit, C...capacitor for charge storage, _A1 , _A2 ...first and second amplifiers, SW...
Switch.

Claims (1)

[Scope of Claims] 1. Means for detecting pulsed noise in an input audio signal containing pulsed noise and generating a control signal having a pulse width corresponding to the period during which the pulsed noise occurs; A delay circuit having a control signal generated by the control signal generating means described above in response to pulsed noise in an audio signal, and a delay time approximately equal to the time difference between the control signal and the corresponding pulsed noise. means for delaying an input audio signal containing pulsed noise; the output signal of the delay circuit is supplied with the control signal as a timing signal for operation; By supplying a pulse having slope information of the desired signal during the period in which pulsed noise occurs, it is possible to perform a pulse noise removal operation and a linear interpolation operation for the desired signal during the period in which pulsed noise occurs. means for applying an output signal from the signal correction circuit to an output terminal and a differentiating circuit; means for applying the output signal of the sample and hold circuit to the gate circuit to which the control signal is supplied as a gate signal; A device for reducing pulse noise, comprising means for outputting a pulse having slope information of a desired signal during a period in which it is occurring, and providing the pulse to the signal correction circuit described above. 2. Signal correction configured such that the charge storage capacitor is charged with the output current of the variable constant current circuit only during the period when pulse noise is occurring, and the discharge operation is performed instantaneously at the end of the period. A pulse noise reduction device according to claim 1, which uses a circuit. 3. A signal correction circuit is provided in a first amplifier, a second amplifier, and a signal transmission path between the first and second amplifiers, and is configured to correct signal transmission during a period in which pulse noise occurs. The output side and charge storage of a variable constant current circuit which is equipped with a switch circuit for shutting off and which operates so that the output current value is determined by the input of a pulse having slope information of a desired signal during a period when pulse noise is occurring. 2. The pulse noise reduction device according to claim 1, wherein the second amplifier is connected to the input side of the second amplifier. 4. A variable constant current circuit configured such that a constant current value is set according to the signal level of an input signal to the circuit, and a constant current output with a polarity corresponding to the polarity of the input signal to the circuit is obtained. The pulse noise reduction device according to claim 3 is used.