JPS59148971A - 論理回路シミュレ−ション方法 - Google Patents

論理回路シミュレ−ション方法

Info

Publication number
JPS59148971A
JPS59148971A JP58021448A JP2144883A JPS59148971A JP S59148971 A JPS59148971 A JP S59148971A JP 58021448 A JP58021448 A JP 58021448A JP 2144883 A JP2144883 A JP 2144883A JP S59148971 A JPS59148971 A JP S59148971A
Authority
JP
Japan
Prior art keywords
logic circuit
circuit model
logic
machine language
model
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58021448A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0457031B2 (enrdf_load_stackoverflow
Inventor
Masayuki Miyoshi
三善　正之
Katsuro Wakai
若井　勝郎
Nobuhiko Onizuka
鬼塚　宣彦
Zentaro Kato
加藤　善太郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP58021448A priority Critical patent/JPS59148971A/ja
Publication of JPS59148971A publication Critical patent/JPS59148971A/ja
Publication of JPH0457031B2 publication Critical patent/JPH0457031B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/32—Circuit design at the digital level
    • G06F30/33—Design verification, e.g. functional simulation or model checking

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Management, Administration, Business Operations System, And Electronic Commerce (AREA)
JP58021448A 1983-02-14 1983-02-14 論理回路シミュレ−ション方法 Granted JPS59148971A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58021448A JPS59148971A (ja) 1983-02-14 1983-02-14 論理回路シミュレ−ション方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58021448A JPS59148971A (ja) 1983-02-14 1983-02-14 論理回路シミュレ−ション方法

Publications (2)

Publication Number Publication Date
JPS59148971A true JPS59148971A (ja) 1984-08-25
JPH0457031B2 JPH0457031B2 (enrdf_load_stackoverflow) 1992-09-10

Family

ID=12055240

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58021448A Granted JPS59148971A (ja) 1983-02-14 1983-02-14 論理回路シミュレ−ション方法

Country Status (1)

Country Link
JP (1) JPS59148971A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4918594A (en) * 1986-02-07 1990-04-17 Hitachi, Ltd. Method and system for logical simulation of information processing system including logic circuit model and logic function model
US5146460A (en) * 1990-02-16 1992-09-08 International Business Machines Logic simulation using a hardware accelerator together with an automated error event isolation and trace facility

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4918594A (en) * 1986-02-07 1990-04-17 Hitachi, Ltd. Method and system for logical simulation of information processing system including logic circuit model and logic function model
US5146460A (en) * 1990-02-16 1992-09-08 International Business Machines Logic simulation using a hardware accelerator together with an automated error event isolation and trace facility

Also Published As

Publication number Publication date
JPH0457031B2 (enrdf_load_stackoverflow) 1992-09-10

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