JPS5914670A - Transistor - Google Patents

Abstract

PURPOSE:To obtain a transistor which contains Zener diodes having less irregular Zener withstand voltages by epitaxially growing low and high impurity density layers of the same conductive type on one conductive type semiconductor substrate, and forming a Zener diode layer and the emitter layer of the transistor in the layer while surrounding with reverse conductive type layer. CONSTITUTION:An N type layer 2 is epitaxially grown on an N<+> type semiconductor substrate 1, an N<+> type layer 3 is further epitaxially grown on the layer. Then, two P type base layers 4 are diffused until the layers 4 are introduced into the layer 2 except the part 7 which is operated as a Zener diode, the layers 3, 2 as emitter layers are contained in one layer 4, the two layers 4 are connected by a P<+> type layer 5 under the part 7. In this manner, Zener diodes are composed of the layers 3, 5 and a transistor having the Zener diode between the collector and the base is obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a transistor having a Zener diode between the collector and the space.

When transistors are used with inductive loads, very large surge voltages are generated that can destroy the transistors. In order to prevent this destruction, a transistor is known that has a built-in Zener diode between the collector and the paste for surge absorption.

Taking an NPN transistor as an example, it is known that a highly doped N-type layer is formed by diffusion in a part directly under the P-type base region, and the junction is used as a Zener diode. Since the mold layer is formed by diffusion, it is difficult to control its concentration and the Zener sub-pressure varies widely.

The present invention eliminates these drawbacks and provides a transistor with a built-in Zener diode that has little variation in Zener breakdown voltage and can be manufactured using the same manufacturing method as conventional transistors.

The feature of the present invention is that a low concentration impurity layer of the same conductivity type is epitaxially grown on a high concentration impurity substrate having a first conductivity type, and a high concentration layer of the same conductivity type is further epitaxially grown on top of that. The layer is formed with a second conductivity type impurity except for a portion thereof, and a high concentration of the second conductivity type is formed in the main surface of the base layer.
In the emitter layer formed with the conductivity type impurity of Apprentice 1 in which the conductivity type impurity is formed shallowly, the first high concentration conductivity type impurity epitaxial layer and the second high concentration conductivity type impurity layer form a Zener junction. It is in the transistor that is connected.

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows a circuit diagram of a transistor having a Zener diode between the collector and the spacer.

FIG. 2(a) is a plan view of the pattern of the present invention, FIG. 2(b)
shows its cross-sectional view. In Figure 2, 1 is a high concentration N''W
Substrate 2 is the N-type epitaxial I@ grown on it.
, 3 are nine N1 type epitaxial layers grown thereon. Further, 4 is a P-type space layer, 5 is a high concentration P+ layer for base contact, and 6 is an N-type emitter layer. In this structure, a Zener diode is formed by an N+m epitaxial layer and a high concentration P''71 for the base contact, and by growing the N type epitaxial layer in advance to a desired concentration with good control, variations in Zener breakdown voltage can be reduced. It is possible to form fewer Zener diodes.

The transistor of the present invention can be manufactured as follows. For example, an NPN planar transistor shown in FIG. 2 will be explained. First, a normal N-type epitaxial layer (about 35μ at about 7Ω-cm in this example) is grown on a highly doped N+-type substrate.
Furthermore, an N+ type epitaxial layer (approximately 0.20-
Prepare a shrimp wafer with a thin layer (approximately 5μ) grown on it.

Then perform normal diffusion. First, a P-type base layer 4 (resistance of about 7,000/depth of about 15 μm in this example) is formed on the surface of the N+-type epitaxial layer except for the part 7 that acts as a Zener diode, and a base contact is formed inside the P-type space layer. A P+ layer (in this example, resistance of about 3,500/depth of about 2.5 μm) is formed, and then an N-type emitter layer is added and heated so that the desired hFE is produced. Thereafter, a surface treatment using a normal phosphor glass layer or the like is applied to #1, and an aluminum electrode is formed to complete the process. As described above, the diffusion is no different from the diffusion of ordinary transistors and can be manufactured using exactly the same method, and in this example, it is possible to obtain a Zener diode-containing transistor with a very small variation of about 70"V. .

In this example, an NPN) transistor was used as an example, but a PN
It is obvious that a transistor (P) can be easily obtained by simply reversing its conductivity type, and the same is true for a Darlington transistor with a Zener diode.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram of a transistor having a Zener diode between the collector spaces, Fig. 2(a) is a plan view of an embodiment of the present invention, and Fig. 2(b) is a cross-sectional view of the person-A'. . In the figure, 1...N+ type semiconductor substrate, 2
...N type epitaxial layer, 3...N
+ type epitaxial layer, 4...P type paste layer,
5... P type layer, 6... N type emitter layer, 7... Zener diode section.

Claims (1)

[Claims] A low concentration epitaxial scrap of one conductivity type is provided on a high concentration semiconductor substrate of one conductivity type, a high concentration epitaxial layer of one conductivity type is provided on the low concentration epitaxial layer, and a reverse conductivity is provided in the high concentration epitaxial layer. A mold base region is provided, a highly concentrated opposite conductivity type impurity region is shallowly formed within the main surface of the space region, an emitter region of one conductivity type is formed within the space region, and an emitter region of one conductivity type is formed between the highly concentrated epitaxial layer and the high concentration epitaxial layer. A transistor characterized in that impurity regions of opposite conductivity type form a Zener diode.