JPS59141847A - クロツク位相制御回路 - Google Patents

クロツク位相制御回路

Info

Publication number
JPS59141847A
JPS59141847A JP58016406A JP1640683A JPS59141847A JP S59141847 A JPS59141847 A JP S59141847A JP 58016406 A JP58016406 A JP 58016406A JP 1640683 A JP1640683 A JP 1640683A JP S59141847 A JPS59141847 A JP S59141847A
Authority
JP
Japan
Prior art keywords
output
differentiator
data
timing
sampler
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58016406A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0151218B2 (enrdf_load_html_response
Inventor
Junji Namiki
並木　淳治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP58016406A priority Critical patent/JPS59141847A/ja
Publication of JPS59141847A publication Critical patent/JPS59141847A/ja
Publication of JPH0151218B2 publication Critical patent/JPH0151218B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/027—Speed or phase control by the received code signals, the signals containing no special synchronisation information extracting the synchronising or clock signal from the received signal spectrum, e.g. by using a resonant or bandpass circuit
    • H04L7/0272—Speed or phase control by the received code signals, the signals containing no special synchronisation information extracting the synchronising or clock signal from the received signal spectrum, e.g. by using a resonant or bandpass circuit with squaring loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP58016406A 1983-02-03 1983-02-03 クロツク位相制御回路 Granted JPS59141847A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58016406A JPS59141847A (ja) 1983-02-03 1983-02-03 クロツク位相制御回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58016406A JPS59141847A (ja) 1983-02-03 1983-02-03 クロツク位相制御回路

Publications (2)

Publication Number Publication Date
JPS59141847A true JPS59141847A (ja) 1984-08-14
JPH0151218B2 JPH0151218B2 (enrdf_load_html_response) 1989-11-02

Family

ID=11915356

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58016406A Granted JPS59141847A (ja) 1983-02-03 1983-02-03 クロツク位相制御回路

Country Status (1)

Country Link
JP (1) JPS59141847A (enrdf_load_html_response)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5495316B2 (ja) * 2010-03-31 2014-05-21 Ｎｅｃネットワーク・センサ株式会社 Ｐｃｍ信号復調回路、該復調回路に用いられるｐｃｍ信号復調方法及びｐｃｍ信号復調プログラム

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4944219B1 (enrdf_load_html_response) * 1968-08-09 1974-11-27
JPS567531A (en) * 1979-06-30 1981-01-26 Toshio Sakurai Code transmission unit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4944219B1 (enrdf_load_html_response) * 1968-08-09 1974-11-27
JPS567531A (en) * 1979-06-30 1981-01-26 Toshio Sakurai Code transmission unit

Also Published As

Publication number Publication date
JPH0151218B2 (enrdf_load_html_response) 1989-11-02

Similar Documents

Publication Publication Date Title
US4918709A (en) Data demodulator baud clock phase locking
EP0467712B1 (en) Phase demodulator for psk-modulated signals
US6072370A (en) Clock extraction circuit
JPH01103041A (ja) パルス位置変調信号の語クロツクの導出方法及び回路装置
JPH06338916A (ja) データ端末
JPS59141847A (ja) クロツク位相制御回路
JPH0974384A (ja) 通信装置
CA1167118A (en) Means for subdividing a baud period into multiple integration intervals to enhance digital message detection
EP0320058A2 (en) Data demodulator carrier phase error detector
RU2237978C2 (ru) Способ корреляционного приёма сигналов с относительной фазовой модуляцией и устройство для его осуществления
JPS59183560A (ja) クロツク位相制御回路
KR100289404B1 (ko) 국소대칭강제파형부를 이용한 패턴지터를 줄이는 장치 및 방법
JPS6261440A (ja) クロツク制御回路
JPH02132938A (ja) 弾性表面波マッチドフィルタを用いた受信復調回路
JP3353331B2 (ja) クロック抽出方法及びクロック抽出回路
JPH0535616B2 (enrdf_load_html_response)
JPH06152669A (ja) クロック再生回路
JPH0748673B2 (ja) スペクトラム拡散受信機
JPH01126035A (ja) スペクトラム拡散受信機
JPH01212038A (ja) ピーク値演算型位相保持方式
JPS61281655A (ja) 自動周波数制御回路
JPS63316523A (ja) バイフェ−ズ信号復調回路
JPH0710053B2 (ja) スペクトラム拡散受信装置
JPH0787398B2 (ja) スペクトラム拡散受信機
JPH0748703B2 (ja) スペクトラム拡散受信機