JPS59139657A - Lead frame for electronic element - Google Patents
Lead frame for electronic elementInfo
- Publication number
- JPS59139657A JPS59139657A JP58226838A JP22683883A JPS59139657A JP S59139657 A JPS59139657 A JP S59139657A JP 58226838 A JP58226838 A JP 58226838A JP 22683883 A JP22683883 A JP 22683883A JP S59139657 A JPS59139657 A JP S59139657A
- Authority
- JP
- Japan
- Prior art keywords
- package
- lead
- leads
- envelope
- lsi
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は高密度、高速ロジック用セラミックパッケージ
型ＬＳＩ（大規模集積回路）などのリードフレームに関
する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a lead frame for a ceramic package type LSI (Large Scale Integrated Circuit) for high-density, high-speed logic.
従来、高密度、高速ロジック用セラミックパッケージ型
ＬＳＩ （以下単にＬＳＩパッケージと称する。）は積
層セラミックパッケージ構造からなり、プリント基板（
プリント板）等の配線基板にリードを介して取り付けら
れる。このＬＳＩパッケージはプリント板側のセラミッ
ク板（セラミック基板）からなる外囲器（ペース）内に
半導体菓子（ペレット）を固定するとともに、プリント
板から離れる他のセラミック板からなる外囲器（キャッ
プ）の外面に放熱用の金属からなるヒートシンク（フィ
ン）が設けられている。Conventionally, high-density, high-speed logic ceramic package type LSIs (hereinafter simply referred to as LSI packages) have a multilayer ceramic package structure, and a printed circuit board (
It is attached to a wiring board such as a printed board (printed board) via leads. This LSI package fixes semiconductor pellets in an envelope (pace) made of a ceramic plate (ceramic board) on the printed board side, and also has an envelope (cap) made of another ceramic plate separated from the printed board. A heat sink (fin) made of metal for heat radiation is provided on the outer surface of the device.
しかし、従来の積層セラミックパッケージ構造では次の
ような欠点がある。However, the conventional laminated ceramic package structure has the following drawbacks.
ｆｉｌ 積層セラミックパッケージ構造は多数枚のセ
ラ・ミこツク板を積み重ねたり、各セラミック板にスス
ルーホールを設けてこの孔に導電材を充満させ。fil The laminated ceramic package structure consists of stacking a large number of ceramic plates, or by providing a through hole in each ceramic plate and filling the hole with a conductive material.
セラミック板上下面の配線を電気的に接続させるなど複
雑となることから製造コストが高い。Manufacturing costs are high due to the complexity of electrically connecting the wiring on the top and bottom surfaces of the ceramic plate.
（２）積層セラミックパッケージ構造はセラミック基板
に形成するメタライズ層の加工寸法の公差を±１％以内
の値にすることがむずかしい。したがってセラミック板
上にメタライズされて形成されたリードの内端とペレッ
トの電極とをワイヤで接続するボンディング作業にあっ
て、公差が太きいため自動化が困難となり、ボンディン
グ加工時間が太き（なる。また、信頼性も悪くなる。(2) In the laminated ceramic package structure, it is difficult to keep the tolerance of the processing dimensions of the metallized layer formed on the ceramic substrate within ±1%. Therefore, in the bonding process in which the inner end of the lead formed by metallization on the ceramic plate is connected with the electrode of the pellet using a wire, automation is difficult due to the wide tolerance, and the bonding process time is long. Moreover, reliability also deteriorates.
ｔ３１ 配線が導電性ペーストのメタライズによるた
め、抵抗が高（なりやすく、低抵抗にするためにメタラ
イズ幅を大きくとることからパッケージ全体が大きくな
り易い。t31 Since the wiring is formed by metallization of conductive paste, the resistance tends to be high (and the metallization width is widened to make the resistance low, so the overall package tends to become large).
（４１メタライズ配線間隔はスルーホールの孔径との関
係から、スルーホール径（たとえば一般的な技術的最小
値は０．３龍ψ）よりも小さくできない。このためＬＳ
Ｉパッケージの小型化が図れない。すなわち、従来では
ゲート数が１００．１７−ド数が５０程度のものが最も
大規模なものであるが、素子数９０００個、ゲート数４
００．リード数１００程度のＬＳＩが要求される現在に
あっては、従来の積層パッケージ構造で作ると極めて大
きなものとなってしまい好ましくない。(41 The metallized wiring spacing cannot be made smaller than the through-hole diameter (for example, the general technical minimum value is 0.3 ψ) due to its relationship with the through-hole diameter. For this reason, the LS
It is not possible to downsize the I package. In other words, conventionally, the largest scale device has a gate count of 100.17 - a gate count of about 50, but a device with a gate count of 9000 and a gate count of 4
00. In today's world where LSIs with about 100 leads are required, making them using the conventional stacked package structure would result in an extremely large package, which is undesirable.
（５１放熱板はベレットを取り付けたベースに直接固定
されず、キャップに固定されている。したがって、熱の
大部分はベース、ベースとキャップとの接合枠部、キャ
ップ、放熱板の順序で伝わるため、放熱性が低い。また
、セラミック自体は金属等に較べて熱伝導度が低いとい
う欠点もある。(51 The heat sink is not directly fixed to the base to which the pellet is attached, but is fixed to the cap. Therefore, most of the heat is transmitted in this order: the base, the joint frame between the base and the cap, the cap, and the heat sink. , has low heat dissipation properties.Furthermore, ceramics themselves also have the disadvantage of having lower thermal conductivity than metals and the like.
本発明はこのような欠点を解消するものであって、その
目的は低床なＬＳＩパッケージを提供することにある。The present invention aims to eliminate these drawbacks, and its purpose is to provide a low-profile LSI package.
また１本発明の他の目的は、自動ワイヤボンディングの
可能な構造のＬＳＩパッケージを提供することにある。Another object of the present invention is to provide an LSI package having a structure that allows automatic wire bonding.
また、本発明の他の目的は、ＬＳＩパッケージの小型化
を図ることにある。Another object of the present invention is to reduce the size of an LSI package.
また、本発明のさらに他の目的は気密性等の信頼度の高
いＬＳＩパッケージを提供することにある。Still another object of the present invention is to provide an LSI package with high reliability such as airtightness.
また１本発明の他の目的は配線の低抵抗化を図ることに
ある。Another object of the present invention is to reduce the resistance of wiring.
さらに１本発明の他の目的は熱抵抗を可及的に低くする
ことによって放熱性の良好なＬＳＩパッケージを提供す
ることにある。Another object of the present invention is to provide an LSI package with good heat dissipation by lowering the thermal resistance as much as possible.
このような目的を達既するために本発明の一実施例の概
要は、パッケージ支持用リードを外枠につった構造のリ
ードフレームとし、有効な封止技術を提供するものであ
る。In order to achieve such an object, an embodiment of the present invention provides an effective sealing technique by using a lead frame having a structure in which package supporting leads are suspended from an outer frame.
第１図は本発明のＬＳＩパッケージの一実施例を示す。FIG. 1 shows an embodiment of an LSI package of the present invention.
同図において１は例えば矩形のセラミック板からなる第
１外囲器である。この第１外囲器１はプリント板などか
らなる配線板（図示せず）に対面（図では上面がプリン
ト板に対面する。）する。そして、その反対面（図中下
面）の中央部は窪み２を有している。３は前記第１外囲
器１と同じ大きさのセラミック板からなる第２外囲器で
あって、その中央部は円形又は角形に抜けている。In the figure, reference numeral 1 denotes a first envelope made of, for example, a rectangular ceramic plate. This first envelope 1 faces a wiring board (not shown) made of a printed board or the like (in the drawing, the upper surface faces the printed board). The center portion of the opposite surface (lower surface in the figure) has a depression 2. Reference numeral 3 denotes a second envelope made of a ceramic plate having the same size as the first envelope 1, and the center portion of the second envelope is cut out in a circular or square shape.
そして、この円形部又は角形は２段の段付孔となってい
て、下面の広径部には熱伝導度の良好なモリブデン、タ
ングステンなどからなる金属板（支持板）４がガラス５
を介して固定されている。また、金属とガラスは接合強
度が弱いことから、補強板６を用い、この補強板６と第
２外囲器３どで前記支持板４を挾み込むようにしている
。すなわち、補強板６は外周は第２外囲器３と同じ形状
をし、内周は第２外囲器３の内径部と同じ大きさになっ
ていて、ガラス７で第２外囲器３および支持板４に接着
している。This circular or square part has a two-stage stepped hole, and a metal plate (supporting plate) 4 made of molybdenum, tungsten, etc., which has good thermal conductivity, is attached to the glass 5 in the wide diameter part on the bottom surface.
has been fixed through. Further, since the bonding strength between metal and glass is weak, a reinforcing plate 6 is used, and the supporting plate 4 is sandwiched between the reinforcing plate 6 and the second envelope 3. That is, the reinforcing plate 6 has an outer periphery that has the same shape as the second envelope 3, an inner periphery that has the same size as the inner diameter of the second envelope 3, and a glass 7 that is connected to the second envelope 3. and is adhered to the support plate 4.
また、８は前記第１外囲器１と第２外囲器３との間にガ
ラス９を介して挾持固着される複数のリードである。こ
のリード８はコバール、鉄−ニッケル４２合金等の薄板
をエツチングやプレスによって形成されたものであり、
第１外囲器ｌと第２外囲器３とからなるパッケージ部１
０の内にあっては、第２外囲器３の上面に沿って延びる
とともに、パッケージ部１０の外にあっては２箇所で屈
曲し、その先端部は第１外囲器１の上面とほぼ同一の平
面上あるいは前記上面よりわずかに突出した面に沿うよ
うに延びている。そして、これらのり一ド８の外端部は
プリント配線基板（図示せず）の端子部に重なり合うよ
うになっている。Further, reference numeral 8 denotes a plurality of leads which are sandwiched and fixed between the first envelope 1 and the second envelope 3 with a glass 9 interposed therebetween. This lead 8 is formed by etching or pressing a thin plate of Kovar, iron-nickel 42 alloy, etc.
Package part 1 consisting of a first envelope l and a second envelope 3
0, it extends along the top surface of the second envelope 3, and is bent at two places outside the package part 10, with its tip end meeting the top surface of the first envelope 1. They extend along substantially the same plane or along a surface slightly protruding from the upper surface. The outer ends of these glues 8 overlap terminal portions of a printed wiring board (not shown).
また、１１は素子数がたとえば９０００個を有するシリ
コン板からなるＬＳＩ素子（ベレット）であって、前記
支持板４のパッケージ部１０の内面に例えば金−シリコ
ン共晶合金層１２を介して固定されている。１３は金線
あるいはアルミニウム線等からなるワイヤであって、超
音波ボンディング方法や熱圧着方法でベレットの電極と
リード８０内端を繋いでいる。１４は銅、アルミニウム
等の熱伝導度の良好な金属等からなる柱状のヒートシン
クであり、圧接又は鑞付けによって前記支持板４の外面
（図中下面）に固定されている。なお、このヒートシン
クには第５図に示すように。Reference numeral 11 denotes an LSI element (bellet) made of a silicon plate having, for example, 9,000 elements, and is fixed to the inner surface of the package portion 10 of the support plate 4 via, for example, a gold-silicon eutectic alloy layer 12. ing. Reference numeral 13 denotes a wire made of gold wire, aluminum wire, or the like, which connects the electrode of the pellet and the inner end of the lead 80 by ultrasonic bonding or thermocompression bonding. A columnar heat sink 14 is made of a metal with good thermal conductivity such as copper or aluminum, and is fixed to the outer surface (lower surface in the figure) of the support plate 4 by pressure welding or brazing. In addition, this heat sink is as shown in Fig. 5.
放熱フィンを取り付け、放熱性をさらに高めてもよい。A heat dissipation fin may be attached to further improve heat dissipation.
つぎに、このようなＬＳＩパッケージの製造工程につい
て第２図を用いて簡単に説明する。ｔａｒ、第３図で示
すようなリードフレーム１５をＪ４［−ｆる。このリー
ドフレーム１５はシリコンの熱膨張係数と近似するコバ
ールや４２合金等からなる薄い板、たとえば０．１市の
厚さの板をエツチング技術や精密プレス技術を用いて形
成する。この場合、各リード８間の距離は板厚とほぼ同
じ程度まで狭く形成できる。また寸法公差は±０．２〜
０．３％にすることができる。各リード８は矩形枠から
なるリム１６の各辺から枠中央に向かって延びている。Next, the manufacturing process of such an LSI package will be briefly explained using FIG. 2. tar, J4[-f] the lead frame 15 as shown in FIG. This lead frame 15 is formed from a thin plate made of Kovar, 42 alloy, or the like, which has a coefficient of thermal expansion similar to that of silicon, for example, a plate having a thickness of 0.1 cm, using etching technology or precision pressing technology. In this case, the distance between each lead 8 can be narrowed to approximately the same extent as the plate thickness. Also, the dimensional tolerance is ±0.2 ~
It can be reduced to 0.3%. Each lead 8 extends from each side of a rim 16 made of a rectangular frame toward the center of the frame.
また、矩形枠の四隅は幅広に形成されており、核部には
円形あるいは長孔からなるハンドリングおよび位置決め
用のガイド孔１７が設けられている。Further, the four corners of the rectangular frame are formed wide, and a guide hole 17 for handling and positioning, which is a circular or elongated hole, is provided at the core.
また、矩形枠の四隅にはダミーリード１８が設けられて
いる。このダミーリード１８には凹部１９が設げられ、
外力を加えると簡単に凹部１９で破断するようになって
いる。この凹部１９は第１・第２外囲器１．３の外周縁
部上に位置する部分に設けられている。Furthermore, dummy leads 18 are provided at the four corners of the rectangular frame. This dummy lead 18 is provided with a recess 19,
It is designed to easily break at the recess 19 when external force is applied. This recess 19 is provided in a portion located on the outer peripheral edge of the first and second envelopes 1.3.
（ｂｌ、このようなリードフレーム１５の各リード８の
先端のワイヤ取付部に蒸着法あるいはめっき法によって
アルミニウム被膜あるいは金被膜を形成する。（Ｃ１，
ヒートシンク１４を固定した支持板４を補強板６および
高信頼度の低融点フリットガラスを用いて第２外ｌ器３
に固定する５ｆｄｌ、ペレット１１を支持板のペレット
を取り付ける部分に部分的に形成したＡｕ層を介して支
持板４に固定する。 （ｅｌ、ペレットの電極とリード
との間をワイヤボンディングにより電気的に接続する。(bl) An aluminum film or a gold film is formed on the wire attachment portion at the tip of each lead 8 of such a lead frame 15 by vapor deposition or plating. (C1,
The support plate 4 to which the heat sink 14 is fixed is attached to the second outer container 3 using a reinforcing plate 6 and highly reliable low-melting frit glass.
The pellet 11 is fixed to the support plate 4 via an Au layer partially formed on the part of the support plate where the pellet is attached. (el, electrically connect between the electrode of the pellet and the lead by wire bonding.
（ｆ）、第１外囲器１を第２外囲器３に低融点ガラスフ
リットを介して重ね合せ、第４図に示すように、加熱溶
融により一体的に気密封止する。(f) The first envelope 1 is stacked on the second envelope 3 via a low-melting glass frit, and as shown in FIG. 4, the first envelope 1 and the second envelope 3 are integrally hermetically sealed by heating and melting.
（ｇ）、パッケージ部１０から突出するリード８０表面
に半田をめっきする。（ｈｌ、リード８のみをリム１６
の付は根部分で切断する。この状態では。(g) The surfaces of the leads 80 protruding from the package portion 10 are plated with solder. (HL, lead 8 only, rim 16
Cut the nosuke at the root. In this condition.
各リードは電気的に独立していることから、＋１＋。+1+ because each lead is electrically independent.
リードフレームのまま取り扱って各パッケージの特性測
定を行ない１選別分類する５（Ｊｌ、前記測定の結果、
良品はリードを折り曲げ成形する。、（ｋ）。Handle the lead frame as it is, measure the characteristics of each package, and classify it into 1 sorting 5 (Jl, as a result of the above measurement,
For non-defective products, the leads are bent and molded. , (k).
リム部をダミーリード１８の凹部１９から破断させて、
第１図で示すＬＳＩパッケージを得ろ。By breaking the rim portion from the recess 19 of the dummy lead 18,
Obtain the LSI package shown in Figure 1.
このようにして製造されたＬＳＩパッケージはつぎのよ
うな効果を奏する。The LSI package manufactured in this manner has the following effects.
ｆｉ＋ 金属板からリードフレームを形成し、このリ
ードフレームを第１・第２外囲器で挟持接着するだけで
あり、従来のように、スルーホール部等を有するセラミ
ック板の積層などにくらベニ数が小さくなるため、製造
コストが軽減される。fi+ A lead frame is formed from a metal plate, and this lead frame is sandwiched and bonded between the first and second envelopes. is smaller, reducing manufacturing costs.
（２）リードは、、−ドフレームの状態で第１・第２外
囲器で挟持接着することから、各リードの間隔は加工時
の寸法が保持された状態で第１・第２外囲器に固定され
る。このため、ワイヤボンディングにあっては、自動ボ
ンター−を用いても正確なワイヤボンディングができる
。したがって、ワイヤボンディングの作業性が著しく向
上する。(2) Since the leads are sandwiched and bonded between the first and second envelopes in a closed frame state, the interval between each lead is adjusted so that the dimensions at the time of processing are maintained. fixed to the vessel. Therefore, in wire bonding, accurate wire bonding can be performed even if an automatic bonder is used. Therefore, the workability of wire bonding is significantly improved.
（３） リードは従来のメタライズに代わり、コバ−
ル、鉄−ニッケル４２合釘等の金属で形作られるため、
抵抗が低くなる。(3) Leads are made of cover instead of conventional metallization.
Because it is made of metal such as iron-nickel 42 dowels,
resistance becomes lower.
（４１金属板からリードフレームを作るため、各リード
間の距離は０．１１８１１１程度にまで狭くすることが
できる。このため、従来の積層セラミックパッケージ構
造に較べて製品の小型化を図ることができる。(Since the lead frame is made from a 41 metal plate, the distance between each lead can be narrowed to about 0.118111. Therefore, the product can be made smaller compared to the conventional laminated ceramic package structure. .
（５＋ 放熱板（ヒートシンク）は回路票子を取付゛
・ｊけた第２外囲器側に固定されている。したがって。(5+ The heat sink is fixed to the second envelope side where the circuit board is attached. Therefore.
伝熱抵抗が軽減され、放熱効果が向上する。Heat transfer resistance is reduced and heat dissipation effect is improved.
（６）第１・第２外囲器、支持板各部の接着は低融点ガ
ラスシール方式としているため、気密性等の信頼度が高
い。(6) Since the first and second envelopes and each part of the support plate are bonded using a low melting point glass sealing method, the reliability of airtightness etc. is high.
（７）第１・第２外囲器はアルミナからなる絶縁物で形
成されているため、容置を低減できる。(7) Since the first and second envelopes are made of an insulator made of alumina, the storage space can be reduced.
（８）従来の積層セラミックパッケージ、構造に較べて
材質組合せを単純化できる。また、この−例として、第
２外囲器への支持板の取り付けを銀鑞等で行なうと、セ
ラミックにメタライズ、メッキ等が必要となるが、封止
用ガラスで取付けることにより工程を簡略化できる。(8) Material combinations can be simplified compared to conventional laminated ceramic packages and structures. In addition, as an example of this, if the support plate is attached to the second envelope using silver solder, etc., metallization, plating, etc. will be required on the ceramic, but the process will be simplified by attaching it with sealing glass. can.
（９） リードはプリント基板（プリント配線基板）
に重ね合せる構造となっている。したがって、プリント
基板においては、リードを挿し込む孔を設けなくともよ
いことから、プリント基板の配線パターンの微細化を図
ることができ、実装密度の向上を図ることができる。ま
た、各リードはプリント基板に半田等を介して固定され
るが、この際。(9) Leads are printed circuit boards (printed wiring boards)
It has a structure in which it is superimposed on the Therefore, since there is no need to provide holes for inserting leads in the printed circuit board, the wiring pattern of the printed circuit board can be made finer, and the packaging density can be improved. Also, each lead is fixed to the printed circuit board via solder or the like.
パッケージ部に外力が加わっても、リードの屈曲部が弾
力的に作用するため、リードがプリント基板から剥離す
ることがない。Even if an external force is applied to the package portion, the bent portions of the leads act elastically, so the leads will not peel off from the printed circuit board.
第５図にはダミーリード１８によりリム１６に支持され
たＬＳＩパッケージ２０をプリント基板（プリント配線
基板）２２に取付けた。ＬＳＩパッケージ２０のヒート
シンク１４には放熱フィン２１が取り付けられている。In FIG. 5, an LSI package 20 supported on a rim 16 by dummy leads 18 is attached to a printed circuit board (printed wiring board) 22. A radiation fin 21 is attached to the heat sink 14 of the LSI package 20.
ＬＳＩパッケージはダミーリード１８によりリム１６に
支持された状態で市販することもできる。その場合、市
販されたＬＳＩパッケージは使用者側でプリント基板に
取付けることになるが取付けにあｆ−っては、前記リー
ドフレーム１５のリム１６の隅部のガイド孔１７を利用
してプリント基板２２に位置決めを行ない、リード８を
半田でプリント基板２２の導電層に固定し、その後、リ
ム１６を把んでプリント基板２２から遠ざかるように引
き離すことにより。The LSI package can also be sold on the market in a state where it is supported on the rim 16 by dummy leads 18. In that case, the commercially available LSI package must be attached to the printed circuit board by the user. 22, fix the leads 8 to the conductive layer of the printed circuit board 22 with solder, and then grasp the rim 16 and pull it away from the printed circuit board 22.
ダミーリード１８の凹部１９を破断し、パッケージをリ
ム１６から分離することができる。このように、ダミー
リード１８によりリム１６に支持接続された状態でＬＳ
Ｉパッケージを販売しても前記ガイド孔１７を利用して
プリント基板への取り付けを正確に行うことができ、ま
た凹部１９の部分から簡単にパッケージをリム１６から
分離することができる。The recess 19 of the dummy lead 18 can be broken to separate the package from the rim 16. In this way, the LS is supported and connected to the rim 16 by the dummy lead 18.
Even if an I-package is sold, the guide hole 17 can be used to accurately attach the package to the printed circuit board, and the package can be easily separated from the rim 16 through the recess 19.
なお１本発明は前記実施例に限定されない。たとえば、
前記第２外囲器中央の支持板とヒートシンク等の放熱部
を例えばＭｏ、＃Ｉ化ベリリウム等の同一材料で一体的
に形成してもよい。また、第２外囲器を金属板で作り、
第１外囲器と接する周縁部に絶縁物を被着させる構造で
もよい。また、第６図に示すように、第２外囲器３０へ
の支持板３１の取り付けは補強板を用いることなく、ガ
ラス３２で固定するようにしてもよいっこの際、支持板
３１０周縁を被うようにガラスを耐着させる。Note that the present invention is not limited to the above embodiments. for example,
The support plate at the center of the second envelope and a heat dissipating portion such as a heat sink may be integrally formed of the same material, such as Mo or #I beryllium. In addition, the second envelope is made of a metal plate,
A structure may be adopted in which an insulating material is coated on the peripheral portion in contact with the first envelope. Further, as shown in FIG. 6, the support plate 31 may be attached to the second envelope 30 by fixing it with the glass 32 without using a reinforcing plate. Cover with glass to make it resistant to adhesion.
以上のようなＬＳＩパッケージによれば、リードを金属
を用いて形成することから、従来のようにメタライズし
たものよりも電気抵抗が低くなる。According to the LSI package as described above, since the leads are formed using metal, the electrical resistance is lower than that of a conventional metallized package.
したがって、１リードの幅を狭くできる。またリード間
隔を狭くすることができるので、ＬＳＩバ、ツケージの
小型化を図ることができる。Therefore, the width of one lead can be narrowed. Furthermore, since the lead spacing can be narrowed, it is possible to downsize the LSI board and the package.
また、ペレットを固定した外囲器側に、しかも熱伝導度
の良好な板に放熱体を固定する構造となることから、従
来の此種ＬＳＩパッケージに較べて極めて放熱性が良好
となる。Furthermore, since the structure is such that the heat dissipation body is fixed on the side of the envelope to which the pellets are fixed, and on a plate with good thermal conductivity, the heat dissipation performance is extremely good compared to conventional LSI packages of this type.
また５金属板からリードフレームを作るため。Also for making lead frames from 5 metal plates.
各部の位置関係が正しく保たれる。また、リードフレー
ムに設けたガイド孔等を用いることにより、各種の組立
、取り付けの自動化を図ることができる、
また、上記説明のような、ガラス封止構造によれば気密
性が優れ、信頼度の高いＬＳＩパッケージを提供するこ
とができる。The positional relationship of each part is maintained correctly. In addition, by using guide holes provided in the lead frame, various assemblies and installations can be automated.In addition, the glass-sealed structure as explained above provides excellent airtightness and reliability. It is possible to provide an LSI package with high performance.
さらに、この発明によれば、各部の構造が単純化できる
ため、材料軽減９組立の容易性等の理由 、から、安
価なＬＳＩパッケージを提供することができるなど多く
の効果を奏する。Further, according to the present invention, since the structure of each part can be simplified, there are many advantages such as material reduction, ease of assembly, and the ability to provide an inexpensive LSI package.
第１図は本発明を適用したセラミックパッケージ型半導
体装置の一例による断面図、第２図圓÷餘は同じく製造
工程を示す工程図、第３図は本発明のリードフレームの
平面図、第４図は封止工程後の組立状態を示す平面図、
第５図はダミーリードによりリム１６に支持接続されｒ
、−ＬＳＩパッケージをプリント基板に取り付けた状態
を示す断面図、第６図はその他のパッケージの一部断面
図である。
１・・・第１外囲器、２・・・守み、３・・・第２外囲
器。
４・・・金属板（支持板）、訃・・ガラス、６・・・補
強板。
７・・・ガラス、８・・・リード、９・・・ガラス、１
０・・・ノくツケージ部、１１・・・回路素子、１２・
・・金−シリコン共晶合金層、１３・・・ワイヤ、１４
・・・ヒートシンク、１５・・・リードフレーム、１６
・・・リム、１７・・・ガイド孔、１８・・・ダミーリ
ード、１９・・・凹部。
２０・・・ＬＳＩ−パッケージ、２１・・・放熱フィン
。
２２・・・プリント基板、３０・・・第２外囲器、３１
・・・支持板、３２・・・ガラス。
第１図
第 ２ 図FIG. 1 is a cross-sectional view of an example of a ceramic packaged semiconductor device to which the present invention is applied; FIG. 2 is a process diagram showing the manufacturing process; FIG. The figure is a plan view showing the assembled state after the sealing process.
FIG. 5 shows the r
, - A sectional view showing a state in which an LSI package is attached to a printed circuit board, and FIG. 6 is a partial sectional view of another package. 1...first envelope, 2...protection, 3...second envelope. 4...Metal plate (support plate), Death...Glass, 6...Reinforcement plate. 7...Glass, 8...Lead, 9...Glass, 1
0... Cross cage part, 11... Circuit element, 12.
...Gold-silicon eutectic alloy layer, 13...Wire, 14
... Heat sink, 15 ... Lead frame, 16
... Rim, 17 ... Guide hole, 18 ... Dummy lead, 19 ... Recess. 20...LSI-package, 21...radiating fin. 22... Printed circuit board, 30... Second envelope, 31
...Supporting plate, 32...Glass. Figure 1 Figure 2
Claims (1)
保持用リードと、それらを一体に支持する枠体よりなり
、上記複数のリードとパッケージ保持用リードは接合部
材を介して、少なくとも、あらかじめ形成された封止体
と接合されるべき位置まで延在してなることを特徴とす
る電子素子用リードフレーム。1. Consisting of a plurality of leads with one end being a free end, a package holding lead, and a frame that integrally supports them, the plurality of leads and the package holding lead are connected at least in advance through a joining member. A lead frame for an electronic device, which extends to a position where it is to be bonded to a formed sealing body.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58226838A JPS59139657A (en) | 1983-12-02 | 1983-12-02 | Lead frame for electronic element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58226838A JPS59139657A (en) | 1983-12-02 | 1983-12-02 | Lead frame for electronic element |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2477377A Division JPS53110371A (en) | 1977-03-09 | 1977-03-09 | Ceramic package type semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59139657A true JPS59139657A (en) | 1984-08-10 |
Family
ID=16851357
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58226838A Pending JPS59139657A (en) | 1983-12-02 | 1983-12-02 | Lead frame for electronic element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59139657A (en) |
-
1983
- 1983-12-02 JP JP58226838A patent/JPS59139657A/en active Pending
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