JPS59126652A - Semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a device of excellent contact characteristic and reliability by a method wherein the dimension and shape of an open hole used in an inner circuit are unified to several kinds in consideration of using frequency, thus enabling to provide an open hole having the optimum dimension and shape according to characteristic in an insulation film. CONSTITUTION:At the region A of peripheral circuit parts related with input- output protection, the open hole 11 of the insulation film 1 to connect an impurity diffused layer 2 and the open holes 12 and 12 to connect the source and drain region 5 and 5 of an output transistor 4 are one large open hole respectively corresponding individualy to the dimension and shape of each connection part. A power line is widely dispersed by the connection passing through this open hole, and then connection is performed with good contact characteristic. Besides, with respect to a signal line 7 belonging to the inner circuit B and a power source line 8, connection is performed by providing two kinds of the small open hole 13 of the signal line 7 used in unification even at the part other than the inner circuit and the large open hole 14 of the power source line.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device including a conductor that conductively connects the upper and lower sides of an insulating film through an opening formed in the film.

In a semiconductor device, a semiconductor layer sandwiching an insulating film and a metal wiring or two metal wirings can be electrically connected through the openings formed by laminating and etching each layer in the insulating film. It is often done. When creating these openings, the pattern on the mask is transferred to the substrate, but even in the same semiconductor substrate, the phosphorography conditions differ depending on the size and shape of the opening, so The pattern causes dimensional errors or shape changes with respect to the designed pattern. That is, as shown in FIG. 1(a), a pattern P with a width of 10 μm is formed on the mask.

Under the conditions for accurately transferring P1′ in fbl of the same figure, the putter 7Pl with a 3 μm opening in (a) of the same figure is transferred as shown in fb of the same figure).
In extreme cases, it may be impossible to form a pattern.

In order to eliminate these drawbacks, as shown in Figure 2,
Peripheral circuit parts and numbers related to input and output such as the input protection part A of the semiconductor device and the output part A' with the transistor 4 connected to the output terminal, and the signal wiring of the internal circuit B excluding these peripheral circuit parts. It has been proposed that all the openings 3 in the device, such as in the power wiring 7 and the power supply wiring 8, be made the same in size and shape. In other words, an input protection section using an impurity diffusion layer 2 of a conductivity type opposite to that of the substrate in region A in FIG.
In the output section using the large transistor 4, the source/drain region 5.5 is used to protect the diode junction from excessive external input such as static electricity.
It is necessary to widely disperse the electric field at the contact part of the
For this reason, it is desirable to make the contact hole formed in the insulating layer 1 as large as possible. For this,
In FIG. 2, the electric field was distributed by repeatedly arranging small holes 3 staked in all areas.

However, this poses durability problems compared to using one large aperture. Furthermore, when forming an opening connected to the signal m7 and the power supply line 8 in the internal circuit B area of FIG.
The line width of the power supply line 8 is larger than that of the signal line 7.
If one hole 3 is used for the power supply line 8, but two holes 3, 3 of the same size are used to connect the power supply line 8, the contact characteristics and pattern design are unreasonable.

An object of the present invention is to eliminate the above-mentioned conventional drawbacks, and to make it possible to provide an opening in an insulating film with an optimal size and shape in accordance with the required characteristics of the input/output protection section and the internal circuit, thereby making it possible to contact the input/output protection section and the internal circuit. Our goal is to provide semiconductor devices with superior characteristics and reliability.

In the present invention, the dimensions and shapes of the apertures used in the internal circuit are unified into several types in consideration of the frequency of use. in this case,
Pattern changes occur due to the above-mentioned differences in transfer conditions, so in order to establish phosphorography conditions, the types of holes to be set should be kept to the minimum necessary. The dimensions and shape are not particularly limited. This is to satisfy the required contact characteristics. Since the peripheral circuit section has more leeway in pattern design than the internal circuit, there is no problem with the degree of integration of the semiconductor device even if the above rules are applied.

Next, the present invention will be explained using examples. FIG. 3 is a plan view showing the main parts of the present invention. In the figure, in region A of the peripheral circuit section related to input/output protection, an opening 11 in the insulating film 1 for connection to the impurity diffusion layer 2 is connected to the source/drain region 5.5 of the output transistor 4. The openings 12, 12 for the purpose of
Each hole has one large hole according to the shape, and when the connection is made through this hole, the stain force lines are widely dispersed and the connection is made with good contact characteristics. In addition, for the signal #7 and the power supply line 8 belonging to the internal circuit B, two of the small aperture 13 of the signal line 7 and the large aperture 14 of the power supply WM8, which are also used in other parts of the internal circuit, are connected. Connections are made by providing various types of apertures.

In this way, the peripheral circuit section is provided with one independent large hole that matches the connection characteristics of each, and the internal circuit is made with several limited and unified apertures, thereby eliminating problems caused by pattern changes. A highly reliable semiconductor fold base that sufficiently satisfies the contact characteristics required in each circuit section can be obtained at a high yield.

[Brief explanation of drawings]

FIGS. 1(a) and (b) are plan views for explaining the misalignment between the mask pattern and the transfer, and FIG. 2 is a plan view showing unified connection holes common to the peripheral circuit section and internal circuit in a conventional semiconductor device. 3 are plan views showing connection holes according to the present invention. 1... Insulating film, 2... Impurity diffusion layer,
3...unified openings, 4...transistor region, 5...source/drain region, 6...gate wiring, 7... ····Signal line,
8...Power line, 11.12...Independent openings in the peripheral circuit section, 13.14...Openings in two buildings for limited unification of internal circuits, A, A'...Peripheral circuit section, B...Internal circuit.

Claims (1)

[Claims] In a semiconductor device including a conductor that conductively connects the upper and lower sides of the insulating film through an opening in the insulating film, the opening is unified in several types only in the internal circuit excluding peripheral circuits related to input protection. A semiconductor device characterized in that it has dimensions and shape.