JPS59123918A - Buffer memory controlling system - Google Patents

Abstract

PURPOSE:To protect controlling information and increase reliability of data by providing error correction code only for controlling information written from an MPU and higher in importance than transferred data out of information stored in a buffer memory. CONSTITUTION:Controlling information from the MPU1 goes into an error correction circuit 32 and a selector circuit 31. This circuit 31 detects that the input is controlling information and selects the circuit 32 automatically, and adds controlling information to the first one bit and adds error correction code ECC to succeeding one bit and writes in the buffer memory 3. Transferred data from the corresponding section 4 of circuit are directly stored in the memory 3 without addition of ECC by the circuit 32 even if they are inputted to the circuits 31 and 32. Reverse operation is performed when controlling information and transferred data are read from the memory 3. To add ECC to transferred data, the circuit 31 is made always on, and when ECC is not added, the circuit 31 is made always off.

Description

DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to a buffer memory control system, particularly a buffer memory that protects data in which control information and transfer data are mixed.

This paper relates to a file memory control method.

(2) Prior Art and Problems In general, a data transfer device, as shown in FIG. The data is stored in an MPU (microprocessor).

) Add control information from 1. When the buffer memory 6 becomes full of data, the data with control information added is transferred to the file memory corresponding section 5, and the file memory 51...
Store it in 5n. Conversely, when transmitting data from the file memories 51...5n to the outside, the data is stored in the fl buffer memory 3 and transferred to the line corresponding section 4 according to the control information, and then the data is sent to the telephones 41...4.
sent to n.

However, the control information is important because it determines the order of data, etc., and even the slightest error is unacceptable compared to the data. Conventionally, as a buffer memory control method for detecting whether or not control information is erroneous, there is a method in which error correction is performed on the entire buffer memory, but this method has problems such as a decrease in effective memory capacity and a decrease in cycle time. be. There is also a method that corrects errors only in a predetermined part of the buffer memory, but this method cannot correct errors except in a predetermined part, and the parity bit addition method has its own problems such as lack of reliability. there were.

(3) Purpose of the Invention The purpose of the present invention is to protect control information by providing an error correction code only to the control information written from the MPU and having higher importance than the transfer data among the information stored in the buffer memory. The objective is to improve the reliability of the data.

(4) Structure of the Invention According to the present invention, in a method for controlling a buffer memory that stores a mixture of control information read/written by a microprocessor and transfer data input/output via a line corresponding section, the above-mentioned control An error correction circuit and a selection circuit are provided between the bus that transmits information and transfer data and the buffer memory, the selection circuit judges whether it is control information, the error correction circuit adds an error correction code only to the control information, and Conversely, a buffer memory control method is provided in which error correction is performed only when control information continues.

(5) Embodiments of the Invention The present invention will now be described by way of embodiments with reference to the accompanying drawings.

FIG. 2 is a block diagram of a buffer memory control system according to the present invention.

The difference from the conventional method is that an error correction circuit 32 and a selection circuit 61 are connected between the bus B and the buffer memory 6.

The error correction circuit 62 adds an error correction code to the control information transmitted from the MPU 1.
gOode; Rtoo), and conversely, it has the function of correcting errors in control information to the MPU1. The selection circuit 31 determines whether the information from the MPUj, that is, the control information, is the information from the line correspondence section 4, that is, transfer data, and switches to add EOO if it is control information, and adds moa if it is transfer data. If access is from the MPU, the error correction is performed, and if not, the error correction is not performed.

First, control information from the MPU 1 enters the error correction circuit 32 and the selection circuit 31. The selection circuit 61 detects that the input is control information, automatically selects the error correction circuit 32, adds control information to the first byte, adds Woo to the next byte, and Write to buffer memory 6.

Further, even if the transfer data from the line correspondence section 4 is input to the error correction circuit 31 and the selection circuit 62, the selection circuit w132 switches the data so as not to add Boo and stores it directly in the buffer memory 3.

Further, when reading control information and transfer data from the buffer memory 6, the operation opposite to the above is performed.

Furthermore, if the transfer data is important and you want to add KO and G, the selection circuit 31 is always on;
It is also possible to not add moo to all information by turning it off all the time.

(6) Effects of the Invention As described above, according to the present invention, EOO is added only to control information from the MPU, and lco is added to other data.

Since the control information is not added, the control information is protected and the reliability of the data is improved.

[Brief explanation of drawings]

Figure 1 is a configuration diagram of a conventional buffer memory control method, Figure 2
The figure is a configuration diagram of a buffer memory control method according to the present invention. 1...MPU, 2...Memory, 3-...Buffer memory 4-
...Line correspondence section, 5...File memory correspondence section, 61
. . . selection circuit, 32 . . . error correction circuit.

Claims (1)

[Claims] A method for controlling a buffer memory that stores a mixture of control information that is omitted by the microprocessor and transfer data that is input/output via the line support section. An error correction circuit and a selection circuit are provided, and when writing data to the buffer memory, the selection circuit judges whether it is control information or not.The error correction circuit adds an error correction code only to the control information, and vice versa. 1. A buffer memory control method characterized in that error correction is performed only when reading control information is read to a buffer memory.