JPS59119765A - Manufacture of field effect type semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a GaAs Schottky gate FET for ultrasonic jfrequency wave by a method wherein a recess is formed in an active layer by etching through a window of an insulation film, and a gate electrode is adhered on the insulation film at the same time with the recess. CONSTITUTION:A non-doped buffer layer 12 and the active layer 13 are superposed on a semi-insulation GaAs substrate 11, thus forming a source and a drain electrode of AuGe 14 and 15. They are covered with an SiO2 film 16, a resist mask 17 having a window of the width of a gate length is applied, and anisotropic etching is performed, resulting in window opening 19 through the film 16. The mask 17 is removed, a resist 20 having a window 21 wider than the window 19 by corresponding to the window 19, and the recess 22 of a fixed depth and eaves under the film 16 are formed by etching with the mixed solution of HF and H2O2. Next, Al is evaporated, thus forming an Al film 23 and a gate electrode 24, and the mask 20 is removed. By this constitution, the exfoliation of the gate electrode does not generate even when a gate length is shortened, the resistance between the source and the drain reduces by the thinned active layer, therefore a device of superhigh frequency and high performance can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION (1) Field of the Invention The present invention relates to a field effect semiconductor device, and particularly to a method for manufacturing a field effect transistor (SBFET) made of a gallium arsenide (GaAs) compound semiconductor. It is.

(2) Background of the Technology GaAs Schottky r-) field effect transistors have excellent high frequency characteristics and can achieve high output, so research and development are progressing and they are being put into practical use. In particular, various structures and manufacturing methods have been proposed to improve the performance (higher frequency, higher output, higher efficiency) and reliability of this field effect transistor. In order to improve the performance, it is important to shorten the f-t length and reduce the parasitic resistance between the source and the dart (source series resistance Ra) and the gate resistance (Rg).

(3) Prior Art and Problems A recess (concave) structure in the dirt electrode portion has been proposed as a method for improving the performance of GaAa Schottky gate field effect transistors. As shown in Figure 1, the recess 4 is
It is formed by selectively etching the active layer 3 on the buffer layer 2 that has been continuously grown epitaxially on the aAs substrate 1, and the recess depth is set so that the thickness of the active film directly under the y-upper electrode 5 is the optimum value. Set. Further, simply shortening the dart length causes an increase in dart resistance (Rg), so increasing the dart electrode thickness aims to reduce the dart resistance. In this case, the contact area between the dirt electrode 5 and the active layer 3 decreases, and the height of the dirt electrode 5 increases, making it easier for the dirt electrode 5 to peel off during a cleaning process, for example. Generally, a series 4 is formed by etching using electron beam phosphorography suitable for microfabrication using a resist layer 6 for electron beam exposure as a mask, as shown in FIG. form, and at this time recess 4
A gate electrode 5 is formed thereon. Then, at the same time as removing the resist layer 6, the metal vapor deposited film 7 thereon is also removed (this is a so-called lift-off method). The recess 4 and the dirt electrode 5 are formed in a self-aligned manner, and the resist layer only needs to be formed once, which is advantageous in terms of the manufacturing process. However, since the positive resist is exposed to electron beams, the developed windows (holes) have a curved groove shape, and the recess width is larger than the dart electrode width (Figure 1).
. Therefore, the active layer 3 parts thinned by the recess 4 are on both sides of the dart electrode, and the series resistance of the active layer is large in this part, so the source-to-dart resistance (R8)
cannot be reduced.

(4) Object of the Invention The object of the present invention is to prevent peeling of the dart electrode even if the dart length is shortened in a GaAs Schottky dart field effect transistor with a recess structure, and to prevent separation of the dart electrode from occurring between the source and drain in the active layer thinned by the recess. It is an object of the present invention to provide a method for manufacturing a semiconductor device of a GaAs Schottky gate field effect transistor that reduces resistance and operates with high performance at ultra-high frequencies.

(5) Structure of the Invention An object of the present invention is to sequentially form a first insulating film and a second insulating layer using a different etchant from the first insulating film on a semiconductor active layer in which source and drain electrodes are formed. forming an opening in a region corresponding to the dart electrode of the second insulating layer, and then removing the first insulating film using the second insulating layer as a mask to form an opening in the first insulating film. and further etching and removing the semiconductor active layer to a predetermined depth using the first insulating film as a mask to form a recess.
This is achieved by a method for manufacturing a semiconductor device characterized by including the step of depositing metal to be a dart electrode on the recess and the first insulating film around the recess.

According to the manufacturing method of the present invention, the recess is formed by etching through the window provided in the insulating film.

A dart electrode is made from a conductor layer formed simultaneously on the insulating film through the window and on the recess by a vacuum evaporation method or a slatting method.

(6) Embodiments of the invention Hereinafter, the present invention will be described in detail by way of embodiments of the invention with reference to the accompanying drawings.

As shown in FIG. 2, a non-doped buffer layer 12 (thickness: 3 to 5 μm) and an active layer 13 (
Active layer, thickness: 0.1 to 0.5 fitn) is formed. Note that the impurity concentration of this active layer is 1 to 3×10
number/σ3. Next, AuGe (Ge: 12wt%
) and Au are formed into a predetermined pattern by photoetching or lift-off to form a source electrode 14 and a drain electrode 15 on the active layer 3. Approximately 45
These electrodes 14 and 1 are formed by annealing heat treatment at 0°C.
Make 5 an ohmic contact.

Next, as shown in FIG.
~0.211m) by sputtering method, reduced pressure vapor phase growth method (C
It is formed on the entire surface by a VD method (VD method) or the like. At this time, the insulating film 16 is made of silicon dioxide (StO2). A resist layer 17 is formed on this insulating film 16, and dirt electrodes to be formed are exposed to electron beams. This resist layer 17 forms holes 18 in the shape of turn grooves.
A commercially available positive resist for electron beam exposure was used for hole 1.
The width on the upper surface side of 8 is set to 0.2 to 0.5 mm, which corresponds to the width of the dart electrode (that is, the dart length).

Next, using this resist layer 17 as a mask, the insulating film 16 made of silicon dioxide is selectively etched anisotropically by a dry etching method using CHF gas to form the window 19.
Open it (Figure 4). The width of this window is 0.2~0. ! 5#
It becomes s. Then, the resist layer 17 is removed.

As shown in FIG. 5, another resist layer 2o is formed of the same positive resist as the resist layer 17, and holes 21 corresponding to the windows 19 are formed in the resist layer 2o by electron beam exposure. At this time, the width on the upper surface side of this hole 21 is set to 0.5~
It is set to 1.0 μm. That is, the window 19 also forms a wide hole.

Using the resist layer 20 and the insulating film 16 as a mask, the active layer 13 is etched with a mixed aqueous solution of hydrofluoric acid and hydrogen peroxide to form a recess 22 (FIG. 6).

At this time, the depth of the recess 22 is set to a value determined from the set characteristics of the field effect transistor. Insulating film 1
The active layer 13 near the window 19 under the active layer 6 is also etched as an undercut as shown in FIG.

Next, a metal (aluminum) constituting a dirt electrode with Schottky barrier properties is deposited on the entire surface of the GaAs substrate 11 in a direction substantially perpendicular to it by vapor deposition or sputtering to form a metal film 23 on the resist layer 20. At the same time resist layer 2
A gate electrode 24 is formed in the hole 21 (FIG. 7).

By removing the resist layer 20, the metal film 23 thereon is also removed to obtain a GaAs Schottky gate field effect transistor as shown in FIG. In this transistor, the dart electrode 24 extends into the recess (recess) of the active layer 13 through a window 16 provided in the insulating film 16, and the r-t length is defined by the window 19 (FIG. 6). There is. Furthermore, in the formation of the recess 22 (FIG. 6), since the width of the recess 22 is defined by the window 19, the dirt electrode 24 is expected to fill almost the entire recess 22 (excluding the undercut portion). ,therefore,
Since there is no active layer thinned by recesses, which is a problem with conventional field effect transistors, the source-to-dart resistance can be reduced accordingly. Further, since the dirt electrode 24 is also placed on the insulating film 16, the dirt electrode 24 has a large adhesion area on the lower surface and is difficult to peel off.

Moreover, as is clear from FIG. 8, the volume of the dart electrode 24 can be made larger than in the conventional case, so that the dart resistance is reduced.

In the embodiments described above, the dirt electrodes were formed by the lift-off method, but the dirt electrodes can also be formed by the photoetching method. That is, a window 19 is formed in the insulating film 16.
(FIG. 4), a recess 22 is formed by selective etching using this insulating film 16 as a mask, and a metal film is formed on the entire surface by a vapor deposition method or a sprinkling method. By selectively etching using an etching method, a dart electrode 24 (FIG. 8) is obtained.

(7) Effects of the Invention The GaAs Schottky gate field effect transistor manufactured according to the manufacturing method of the present invention can be used especially as a small signal (low noise) transistor, and the manufacturing method can be used to It is also applicable to mobility transistors, such as HFIVIT.

[Brief explanation of the drawing]

FIG. 1 is a schematic cross-sectional view of a semiconductor device showing a part of the manufacturing process of a conventional field effect semiconductor device, and FIGS. 2 to 8 show a method for manufacturing a field effect semiconductor device according to the present invention. FIG. 2 is a schematic cross-sectional view of a field-effect semiconductor device in a manufacturing process for explaining. DESCRIPTION OF SYMBOLS 1... GaAs substrate, 3... Active layer, 4... Recess (concave), 5... Dart electrode, 11... Ga
AI! 1 substrate, 13... active layer, 14... source electrode, 15... drain electrode, 16... insulating film, 1
7...Resist layer, 19...Window, 20...Resist layer, 23...Metal film, 24...Dart electrode = Patent applicant Fujitsu Limited Patent application agent Akira Aoki Kazuyuki Shinishidate Patent Attorney Yukio Uchida Patent Attorney Akira Yamaguchi

Claims (1)

[Claims] 1. A first insulating film and a second insulating layer having a different etchant from the first insulating film are sequentially laminated on the semiconductor active layer in which the source and drain electrodes are formed, and the second insulating layer is forming an opening in a region corresponding to the dirt electrode, then removing the first insulating film using the second insulating layer as a mask to form an opening in the first insulating film; The semiconductor active layer is etched away to a predetermined depth using the film as a mask to form a recess, and then a metal to be a dirt electrode is deposited on the recess and the first insulating film around the recess. A method for manufacturing a semiconductor device, characterized in that: