JPH0319244A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To form gate metal wherein only the sectional area of a gate is increased by making a gate pattern of the uppermost layer larger than the gate pattern of an intermediate layer by controlling the gate pattern of each layer of a three-layer resist. CONSTITUTION:On an N-type active layer 1, PMGI resist 2 is formed; thereon PMMA resist 3 excellent in sensitivity to electron beam is formed; thereon resist 4 sensitive to UV rays is formed. By using UV rays, a gate pattern is formed on the resist 4; by projecting electron beam in the inside of the pattern of the resist 4, a pattern is developed on the resist 3; by using the pattern of the resist 3 as a mask, the resist 2 is developed, and a pattern is formed; by using this as a mask, etching is performed, and an aperture part is formed on the layer 1; after gate metal is vapor-deposited on the whole surface, the resists 2, 3, 4, etc., are eliminated with organic releasing liquid, thereby forming gate metal 5 only on the aperture part of the layer 1. Hence only the sectional area of the metal 5 can be made large, so that electric resistance can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, particularly a compound semiconductor device.

BACKGROUND OF THE INVENTION In recent years, compound semiconductor devices have been expected to be used as high-frequency, low-noise transmitting/receiving amplifying elements used in high-speed arithmetic elements in computers, satellite broadcasting buttons, satellite communications, etc. due to the high mobility of compound semiconductors.

Hereinafter, a conventional method for manufacturing a compound semiconductor device will be described with reference to the drawings.

FIG. 2 shows the process of forming a conventional gate key gate in a compound semiconductor device. In FIG. 2a, 1 is a gallium arsenide n-type active layer which becomes a channel layer of a field effect transistor. 2 is a PMCI resist which has excellent adhesion to the n-type active layer 1 and is weakly sensitive to electron beams.

3 is a PMM▲ resist which has strong sensitivity to electron beams and is excellent in forming submicron patterns. In FIG. 2d, 5 is a gate metal for forming a Shockey gate.

A process for forming a Schottky gate in the compound semiconductor device constructed as described above will be explained.

In FIG. 2a, a PMCI resist 2 with excellent adhesion is coated on the gallium arsenide n-type active layer 1 and dried. Next, a PM with excellent electron beam sensitivity is placed on top of the PMCI resist 2.
The M▲ resist 3 is applied and dried. Next, selective irradiation with an electron beam is performed to form a submicron gate pattern on the PMM▲ resist 3 by development. In FIG. 2b, the PMGI resist 2 is selectively developed using the gate pattern formed on the PMM▲ resist 3 as a mask to form a gate pattern. As shown in FIG. 2C, a recess-shaped opening is formed in the n-type active layer 1 by wet etching using the gate pattern of PM (rI resist 2 as a mask). In FIG. 2D, a gate metal 6 is deposited on the entire surface. In FIG. 2 6, PMfd resist 2 and PMM
Dissolve A resist 3 using an organic stripper and remove PM.
M▲The gate metal 6 on the resist 3 is removed together and the gate metal 6 is selectively left only in the opening of the n-type active layer 1 to form a Schottky gate.

Problems to be Solved by the Invention However, in the above structure, the gate metal 6 formed in the opening of the n-type active layer 1 as shown in FIG.
The cross-sectional area of the trapezoid, which is a simple trapezoid, is determined by the amount of deposited gate metal 6 and the gate pattern dimensions of the PMM▲ resist 3, so as the gate pattern is made finer, the cross-sectional area of the trapezoid becomes smaller. However, there was a problem in that the electrical resistance of the gate metal 5 increased.

In view of the above drawbacks, the present invention provides a method for manufacturing a semiconductor device in which the cross-sectional shape of the gate metal 5 formed in the opening of the n-type active layer 1 is made into a mushroom shape, thereby reducing the electrical resistance of the gate metal 6. It provides:

Means for Solving the Problems In order to solve the above problems, the method for manufacturing a semiconductor device of the present invention includes a step of forming a first organic thin film on an n-type active layer, and a step of forming a first organic thin film on an n-type active layer. forming a second organic thin film on the thin film; forming a third organic thin film on the second organic thin film; and forming a first opening in the third organic thin film. forming a second opening as small as the first opening in the second organic thin film; forming a third opening in the first organic thin film using the second opening as a mask; a step of forming a fourth opening in the n-type active layer using the third opening as a mask, and a step of depositing the metal on the entire surface, and then forming the first, second, and third organic thin films. The process includes a step of dissolving the metal film in an organic solvent and removing the metal film on the third organic thin film together to form a mushroom-shaped metal film only in the fourth opening.

By controlling the cross-sectional area of the opening of the n-type active layer and controlling the action, a large mushroom-shaped gate metal can be formed, so that the electrical resistance can be significantly reduced.

EXAMPLE Hereinafter, an example of the present invention will be described with reference to the drawings.

FIG. 1 shows a step of forming a Schottky gate in a compound semiconductor device according to an embodiment of the present invention. In FIG. 1B, 1 is a gallium arsenide n-type active layer.

2 is a PMGI resist which has excellent adhesion to the n-type active layer 1 and is weakly sensitive to electron beams. No. 3 is a PMM resist that has strong sensitivity to electron beams and is excellent in forming submicron patterns. 4 is a photoresist sensitive to ultraviolet light. In FIG. 1, 5 is a gate metal for forming a Schottky gate.

The operation of the Schottky gate forming process of the compound semiconductor device constructed as described above will be described below.

In FIG. 1a, a PMCI resist 2 with excellent adhesion is applied and dried on a gallium arsenide n-type active layer 1. Next, a 9PMM▲ resist 3, which is highly sensitive to electron beams, is coated on the PMG electroresist 2 and dried. Furthermore, P
MM▲A photoresist 4 sensitive to ultraviolet rays is coated on the resist 3 and dried. Next, an undercut-shaped gate pattern is formed on the photoresist 4 by selective exposure to ultraviolet rays and development with controlled dimensions. As shown in FIG. 1B, a submicron gate pattern, which is as small as the gate pattern of the photoresist 4, is formed in the PMM▲ resist 3 by selective irradiation of an electron beam onto the inside of the gate pattern of the photoresist 4 by development. In FIG. 1C, using the gate pattern of the PMM▲ resist 3 as a mask, the dimensions of the PMDI resist 2 are controlled by selective development to form a gate pattern. In Figure 1d,
Wet etching is performed using the gate pattern of the PMCI resist 2 as a mask to form a recess-shaped opening in the n-type active layer 1. In FIG. 16, gate metal 5
A metal film is formed on the opening of the n-type active layer 1, on the PMM resist ♦, and on the photoresist 4 by evaporating the metal film over the entire surface. In Fig. 1 f, PMGI resist 2 and PMM▲
Resist 3 and photoresist 4 are dissolved in an organic stripping liquid to form PMM▲ on resist 3 and photoresist 4.
The upper gate metal 5 is removed at the same time, and a mushroom-shaped gate metal 5 is formed only over the opening of the n-type active layer 1.

As described above, according to this example, Fig. 1a, Fig. 1b,
As shown in FIG. 1C, the gate pattern can be arbitrarily controlled by independently controlling the dimensions of each layer of the three-layer resist, and as shown in FIG. Mushroom-shaped gate metal 6 formed on the part
Since the cross-sectional area can be controlled and increased, electrical resistance can be reduced.

Although a gallium arsenide n-type active layer is used in the embodiment, the active layer is not limited to gallium arsenide, and may be any compound semiconductor. For example, aluminum gallium arsenide can be considered. First, although a photoresist was used as the uppermost resist layer of the three-layer resist, the uppermost resist layer is not limited to a photoresist, and any resist may be used as long as an undercut shape can be obtained.

Effects of the Invention As described above, the present invention allows gate patterns to be formed in the openings of the n-type active layer by controlling the gate patterns of each layer of the three-layer resist and making the gate pattern of the top layer larger than the gate pattern of the intermediate layer. With a length of submicron 1"1, it is possible to form a mushroom-shaped gate metal with a large cross-sectional area of the gate. This allows the electrical resistance of the gate metal to be arbitrarily reduced, and its practical effects are as follows. There is something big.

[Brief explanation of the drawing]

FIG. 1 is a process diagram for forming a Schottky gate in a compound semiconductor device according to an embodiment of the present invention, and FIG. 2 is a process diagram for forming a Schottky gate in a conventional compound semiconductor device. 1... Gallium arsenide n-type active layer, 2...
-PMGI resist, 3...PMM▲resist, 4...photoresist, 6...gate metal.

Claims (1)

[Claims] forming a first organic thin film on the n-type active layer;
forming a second organic thin film sensitive to electron beams on the first organic thin film; and forming a second organic thin film sensitive to light or electron beams on the second organic thin film. a step of forming a third organic thin film; a step of forming a first opening in the third organic thin film by selective exposure or selective electron beam irradiation; forming a second opening smaller than the first opening in the second organic thin film by irradiation; and forming a third opening in the first organic thin film using the second opening as a mask. forming a fourth opening in the n-type active layer using the third opening as a mask; A semiconductor device comprising the steps of forming a metal film in the opening, and removing the metal film on the third organic thin film by dissolving the first, second, and third organic thin films. Production method.