JP2667250B2 - Method for manufacturing semiconductor device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a compound semiconductor device.

2. Description of the Related Art In recent years, compound semiconductor devices have been expected as high-speed operation elements such as computers and high-frequency low-noise transmission / reception amplification elements used for satellite broadcasting and satellite communication because of the high mobility of compound semiconductors.

Hereinafter, a conventional method for manufacturing a compound semiconductor device will be described with reference to the drawings.

FIG. 2 is a sectional view showing a step of forming a Schottky gate of a conventional compound semiconductor device. In FIG. 2, 1
Is a gallium element n-type active layer which becomes a channel layer of the field effect transistor. Reference numeral 2 denotes a PMGI resist that has excellent adhesion to the n-type active layer 1 and has low sensitivity to an electron beam. Reference numeral 3 denotes a PMMA resist having a strong sensitivity to an electron beam and excellent in forming a submicron pattern. 5
Is a gate metal for forming a shocky gate.

Next, a Schottky gate forming step of the compound semiconductor device will be described.

In FIG. 2a, a PMGI resist 2 having excellent adhesion is applied on the potassium n-type active layer 1 and dried. Next, PMGI
On the resist 2, a PMMA resist 3 having excellent electron beam sensitivity is applied and dried. Next, a submicron gate pattern is formed on the PMMMA resist 3 by development by performing selective irradiation with an electron beam. In FIG. 2B, the PMGI resist 2 is selectively developed using the gate pattern formed on the PMMA resist 3 as a mask to form a gate pattern. In FIG. 2c, wet etching is performed by using the gate patterns of the PMMA resist 3 and the PMGI resist 2 as a mask.
A recess-shaped opening is formed in the mold active layer 1. FIG. 2d
, A gate metal 5 is deposited on the entire surface. In FIG. 2e, the PMGI resist 2 and the PMMA resist 3 are dissolved using an organic solvent in the organic system, and the gate metal 5 on the PMMA resist 3 is removed together so that only the opening of the n-type active layer 1 is formed. A Schottky gate is formed leaving the gate metal 5 selectively.

However, in the above configuration, the gate metal 5 formed in the opening of the n-type active layer 1 as shown in FIG.
Is a simple trapezoid, the cross-sectional area of which is gate metal 5
Therefore, there is a problem that the cross-sectional area of the trapezoid becomes smaller and the electric resistance of the gate metal 5 increases as the gate pattern is miniaturized, because it is determined by the amount of vapor deposition and the gate pattern size of the PMMA resist 3.

In view of the above-described disadvantage, the present invention provides a method of manufacturing a semiconductor device in which the gate metal 5 formed in the opening of the n-type active layer 1 has a mushroom cross-sectional shape and can reduce the electrical resistance of the gate metal 5. To provide.

Means for Solving the Problems A method of manufacturing a semiconductor device according to the present invention includes a step of forming a first organic thin film on an n-type active layer, and a step of forming an electron beam on the first organic thin film. Forming a second organic thin film having sensitivity, forming a third organic thin film having sensitivity to light on the second organic thin film, and forming a third organic thin film by selective exposure. Forming a first opening in the system-based thin film, and irradiating the inside of the first opening with a selective electron beam to form a second opening smaller than the first opening in the second organic-based thin film Forming, forming a third opening in the second organic thin film through the second opening with dimensional control, and forming a fourth opening in the n-type active layer through the third opening. Forming a metal film on the n-type active layer through the first, second, third, and fourth openings; Removing the metal film on the third organic thin film by dissolving the second and third organic thin films.

Operation With this configuration, a large mushroom type gate metal can be formed by controlling the cross-sectional area in the opening of the n-type active layer, so that the electric resistance can be significantly reduced.

Embodiment Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a sectional view showing a step of forming a Schottky gate of a compound semiconductor device according to one embodiment of the present invention.
In FIG. 1, reference numeral 1 denotes a gallium arsenide n-type active layer.
Reference numeral 2 denotes a PMGI resist that has excellent adhesion to the n-type active layer 1 and has low sensitivity to an electron beam. Reference numeral 3 denotes a PMMA resist having a strong sensitivity to an electron beam and excellent in forming a submicron pattern. Reference numeral 4 denotes a photoresist having sensitivity to ultraviolet rays. Reference numeral 5 denotes a gate metal for forming a Schottky gate.

Next, a method of manufacturing a Schottky gate of a compound semiconductor device will be described below.

In FIG. 1A, a PMGI resist 2 having excellent adhesion is applied on a gallium arsenide n-type active layer 1 and dried. next,
Excellent sensitivity to electron beam on PMGI resist 2
A PMMA resist 3 is applied and dried. Further, a photoresist 4 having sensitivity to ultraviolet rays is applied on the PMMA resist 3 and dried. Next, a gate pattern having an undercut-shaped first opening is formed in the photoresist 4 by dimensional control by selective exposure to ultraviolet light and development. In FIG. 1B, the inside of the gate pattern of the photoresist 4 is selectively irradiated with an electron beam to form a gate pattern having a submicron-sized second opening in the PMMA resist 3 smaller than the gate pattern of the photoresist 4. It is formed by development. In FIG. 1c, the PMMA resist 3
Using the gate pattern as a mask, the PMGI resist 2 is dimensionally controlled by selective development to form a gate pattern having a third opening. In FIG. 1d, wet etching is performed using the gate pattern of the PMGI resist 2 as a mask to form a fourth recess-shaped opening in the n-type active layer 1. In FIG. 1e, a gate metal 5 is deposited on the entire surface to form a metal film on the fourth opening of the n-type active layer 1, on the PMMA resist 3, and on the photoresist 4. In FIG. 1f, the PMGI resist 2, the PMMA resist 3 and the photoresist 4 are dissolved in an organic release solution to remove the gate metal 5 on the photoresist 4 at the same time, and the fourth opening of the n-type active layer 1 is formed. A mushroom type gate metal 5 is formed only on the top.

As described above, according to the present invention, FIG. 1a, FIG.
As shown in FIG. C, the gate pattern can be arbitrarily controlled by independently performing dimensional control for each layer of the PMGI resist 2, the PMMA resist 3 and the photoresist 4, and as shown in FIG. Since the cross-sectional area of the mushroom-type gate metal 5 formed in the fourth opening of the mold active layer 1 can be controlled and increased, electric resistance can be reduced.

In the embodiment, the gallium element n-type active layer is used. However, the active layer is not limited to gallium element and may be any compound semiconductor. For example, aluminum gallium arsenide can be considered.

As described above, the present invention controls the gate pattern of each layer of the PMGI resist 2, the PMMA resist 3 and the photoresist 4 to change the gate pattern of the third organic thin film into the gate pattern of the second organic thin film. By increasing the width of the gate electrode, it is possible to form a mushroom-type gate metal in the fourth opening of the n-type active layer in which the gate length remains submicron and only the cross-sectional area of the gate is increased. Can be arbitrarily reduced, and its practical effect is significant.

[Brief description of the drawings]

FIG. 1 is a view showing a process of forming a Schottky gate of a compound semiconductor device according to an embodiment of the present invention, and FIG. 1 ... gallium arsenide n-type active layer, 2 ... PMGI resist,
3 ... PMMA resist, 4 ... photoresist, 5 ... gate metal.

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁶ Identification code Agency reference number FI Technical display location H01L 29/812 H01L 21/30 573 21/302 H

Claims (1)

(57) [Claims] 1. A step of forming a first organic thin film on an n-type active layer, and forming a second organic thin film sensitive to an electron beam on the first organic thin film. The process of
A third light-sensitive layer on the second organic thin film;
Forming a first opening in the third organic thin film by selective exposure; and performing selective electron beam irradiation inside the first opening to form the first opening. A second organic thin film having a second thickness smaller than the first opening;
Forming an opening, forming a third opening in the first organic thin film by dimensional control through the second opening, and forming the n-type active layer through the third opening. Forming a fourth opening in the layer;
Forming a metal film on the n-type active layer through third and fourth openings; and dissolving the first, second, and third organic thin films to form a metal film on the third organic thin film. A step of removing the metal film.