JPS59117289A - Universal printed circuit board and method of producing - Google Patents

Universal printed circuit board and method of producing

Info

Publication number
JPS59117289A
JPS59117289A JP23157282A JP23157282A JPS59117289A JP S59117289 A JPS59117289 A JP S59117289A JP 23157282 A JP23157282 A JP 23157282A JP 23157282 A JP23157282 A JP 23157282A JP S59117289 A JPS59117289 A JP S59117289A
Authority
JP
Japan
Prior art keywords
printed wiring
wiring board
pattern
producing
circuit pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23157282A
Other languages
Japanese (ja)
Inventor
文夫 山本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP23157282A priority Critical patent/JPS59117289A/en
Publication of JPS59117289A publication Critical patent/JPS59117289A/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 本発明はユニバーサル印刷配線板およびその製造方法に
関し、時に基板表面に格子状に設けた導電性パターンを
選択的に分離して所望の回路パターンを形成する印刷配
線板に関するものでろる。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a universal printed wiring board and a method for manufacturing the same, and more particularly to a printed wiring board in which a desired circuit pattern is formed by selectively separating conductive patterns provided in a lattice shape on the surface of the board. It's a thing.

従来、印刷配線板の表面の導電性パターンは、第1図(
5)、(B)に示す如く、格子状の交点に設けた円パタ
ーンに接続する格子線上に画線される個別のパターン1
および2の配置によって設けた印刷配線板が提供されて
きた。このため、1印刷配線板ごとに1点1様にパター
ン配置された原画を必要としてきた。
Conventionally, the conductive pattern on the surface of a printed wiring board is as shown in Figure 1 (
5) As shown in (B), individual patterns 1 are drawn on the grid lines connecting to the circular patterns provided at the intersections of the grid.
Printed wiring boards provided by the arrangements of and two have been provided. For this reason, each printed wiring board requires an original drawing with a pattern arranged one by one.

一方、近年印刷配線板の生産体系は、多品種小量生産の
傾向が強まシ、印刷配線板自体の製造コストからそれに
伴なう原画の作成コストが割高になる。また1部の回路
パターンの変更による改版の都度、原画を新たに作成し
なければならない。
On the other hand, in recent years, the production system for printed wiring boards has increasingly tended toward high-mix, low-volume production, and the manufacturing cost of the printed wiring boards themselves and the cost of creating original images associated therewith have become relatively high. Furthermore, each time a revision is made due to a change in the circuit pattern of one part, a new original image must be created.

そのため、印刷配線板の製造工程は最初から最後まで回
路パターンが個別な製品の小ロツト生産になシ、生産管
理工数が増大するなどの欠点がるる。
Therefore, the manufacturing process of printed wiring boards has disadvantages such as small-lot production of products with individual circuit patterns from beginning to end, and an increase in production control man-hours.

本考案の目的はかかる従来欠点を解消した印刷配線板を
提供することにある。
An object of the present invention is to provide a printed wiring board that eliminates such conventional drawbacks.

すなわち、本発明によれば印刷配線板の?3縁基板表面
に異なる形状の導電性パターンを仮想格子側にそって配
置したことを特徴とする印刷配線板および絶縁基板表面
に異なる形状の導電性パターンを仮想格子線にそって配
置する工程と、上記導電性パターンを選択的に分離する
工程を含むことを特徴とする印刷配線板の製造方法が得
られ、さらに、上記の異なる形状を円と直線幅との組合
せからなることを特徴とする。
That is, according to the present invention, the ? A process of arranging conductive patterns of different shapes along the virtual grid lines on the surface of a printed wiring board and an insulating substrate, characterized in that conductive patterns of different shapes are arranged along the virtual grid lines on the surface of the three-edge substrate; , there is obtained a method for manufacturing a printed wiring board, which is characterized in that it includes a step of selectively separating the conductive pattern, and further characterized in that the different shapes are a combination of a circle and a straight line width. .

以下、本発明の実施例を第2図から第4図を参照して説
明する。
Embodiments of the present invention will be described below with reference to FIGS. 2 to 4.

第2図は4電性パターンのY軸及びX軸方向の個別回路
パターン1,2を格子状に重ねて配置した本発明の網目
状の回路パターン3の配置状態を示す。
FIG. 2 shows the arrangement of a mesh-like circuit pattern 3 of the present invention in which individual circuit patterns 1 and 2 in the Y-axis and X-axis directions of a four-electroconductivity pattern are arranged one over the other in a grid pattern.

第3図(5)、(B)は前述の網目状パターン3に穴明
けを行なって所望の個別回路パターン4および5に選択
分離した配置を示す。
FIGS. 3(5) and 3(B) show an arrangement in which holes are formed in the mesh pattern 3 described above and desired individual circuit patterns 4 and 5 are selectively separated.

先ず第2図の如く回路パターン3をアデティブ工法によ
る触媒入シ絶縁基板、または金属層を表面に有する基板
に形成する。次に第3図(ト)、 CB)に示す如く回
路パターン3の幅tよυ大きく、かつ座6の領域内に喰
い込まない直径を有するドリル9によって孔を明は回路
パターン3の一部を切断し、非導電性部7を形成する。
First, as shown in FIG. 2, a circuit pattern 3 is formed on a catalyst-filled insulating substrate or a substrate having a metal layer on its surface by an additive method. Next, as shown in FIGS. 3(G) and CB), a hole is drilled into a part of the circuit pattern 3 using a drill 9 that is larger than the width t of the circuit pattern 3 and has a diameter that does not penetrate into the area of the seat 6. is cut to form a non-conductive part 7.

この非導電性部7は貞通孔かまたは非貫通孔とする。非
貫通孔の場合には第4図で示すごとく、ドリル9の降下
する距離(h)を制御して裏面の回路パターン8f:切
断することなく所望の回路パターンを配置した両面また
は片面の印刷配線板を形成する。第5図は本発明の第2
の実施例でるシ、第1の実施例と同一の網目状の回路パ
ターン3t−自動制御されたカッター(図示省略)によ
シ所定位置の回路パターンの導体層(幅および厚さ)を
切Wrシて、パターン除去部を設ける。
This non-conductive portion 7 is a through hole or a non-through hole. In the case of a non-through hole, as shown in FIG. 4, the descending distance (h) of the drill 9 is controlled to produce circuit pattern 8f on the back side: printed wiring on both sides or one side with the desired circuit pattern placed without cutting. Form a board. FIG. 5 shows the second embodiment of the present invention.
In this embodiment, the same mesh-like circuit pattern 3t as in the first embodiment - the conductor layer (width and thickness) of the circuit pattern at a predetermined position is cut by an automatically controlled cutter (not shown). Then, a pattern removal section is provided.

以上、本発明によシ次の効果がある。As described above, the present invention has the following effects.

(1)原画枚数を多量に使用することがなくなる。(1) There is no need to use a large number of original images.

(11)生産管理工数が低減する。(11) Production control man-hours are reduced.

(iil)  リードタイプの短縮ができる。(iii) Lead type can be shortened.

(1v)所望のパターン配置の両面又は片面の印刷配線
板を形成することが出釆る。
(1v) It is possible to form a double-sided or single-sided printed wiring board with a desired pattern arrangement.

なお、本発明の応用範囲は、これに限定されるものでは
なく、他の応用を何らさまたげるものではない。
Note that the scope of application of the present invention is not limited to this, and does not preclude other applications in any way.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(5)、(B)は従来の印刷配線板の個別パター
ン配置表面の部分拡大図、第2図は本発明一実施例の印
刷配線板の網目状パターン配置表面の部分拡大図、第3
図(5)、(B)は第2図の印刷配線板の選択・分離後
のパターン配置表面の部分拡大図、第4図は第3図の印
刷配線板の選択・分離状態の断面拡大図、第5図は本発
明の他の実施例による第2図の印刷配線板の選択・分離
後のパターン配置表面の部分拡大図。 〔図中の符号〕 1.2,4.5・・・・・・個別回路パターン、3・・
・べ網目状の)回路パターン、6・・・・・・座、7・
・・・・・非導電性部、8・・・・・・裏面の回路パタ
ーン、9・・・・・・ドIJ Jぺt・・・・・・網目
状の回路パターンの幅、h・・・・・・ドリルの降)す
る距離。 −42; $3図(A) l 第3図(5) ぐ 第 夕図
FIGS. 1(5) and (B) are partially enlarged views of the individual pattern arrangement surface of a conventional printed wiring board; FIG. 2 is a partially enlarged view of the mesh pattern arrangement surface of the printed wiring board according to an embodiment of the present invention; Third
Figures (5) and (B) are partially enlarged views of the pattern arrangement surface after selection and separation of the printed wiring board in Figure 2, and Figure 4 is an enlarged cross-sectional view of the printed wiring board in the selection and separation state of Figure 3. , FIG. 5 is a partially enlarged view of the pattern arrangement surface after selection and separation of the printed wiring board of FIG. 2 according to another embodiment of the present invention. [Symbols in the diagram] 1.2, 4.5...Individual circuit pattern, 3...
・Mesh-like) circuit pattern, 6... seat, 7.
...Non-conductive part, 8...Circuit pattern on back side, 9...Do IJ JPet...Width of mesh-like circuit pattern, h.・・・・・・Distance the drill will descend. -42; Figure 3 (A) l Figure 3 (5) Evening map

Claims (3)

【特許請求の範囲】[Claims] (1)  絶縁基板表面に異なる形状の導電性パターン
を仮想格子線にそって配置したことを特徴とする印刷配
線板。
(1) A printed wiring board characterized by having conductive patterns of different shapes arranged along virtual grid lines on the surface of an insulating substrate.
(2)絶縁基板表面に、異なる形状の導電性パターンを
仮想格子線にそって配置する工程と、前記導電性パター
ンを選択的に分離する工程を含むことを特徴とする印刷
配線板の製造方法。
(2) A method for manufacturing a printed wiring board, comprising the steps of arranging conductive patterns of different shapes along virtual grid lines on the surface of an insulating substrate, and selectively separating the conductive patterns. .
(3)前記異なる形状を円と直線幅との組合せからなる
ととを特徴とする特許請求の範囲第1項記載の部属り配
線板。
(3) The component wiring board according to claim 1, wherein the different shapes are a combination of a circle and a straight line width.
JP23157282A 1982-12-24 1982-12-24 Universal printed circuit board and method of producing Pending JPS59117289A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23157282A JPS59117289A (en) 1982-12-24 1982-12-24 Universal printed circuit board and method of producing

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23157282A JPS59117289A (en) 1982-12-24 1982-12-24 Universal printed circuit board and method of producing

Publications (1)

Publication Number Publication Date
JPS59117289A true JPS59117289A (en) 1984-07-06

Family

ID=16925613

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23157282A Pending JPS59117289A (en) 1982-12-24 1982-12-24 Universal printed circuit board and method of producing

Country Status (1)

Country Link
JP (1) JPS59117289A (en)

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